1 // Memory I/O handlers for Sega/Mega CD.
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2 // Loosely based on Gens code.
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3 // (c) Copyright 2007, Grazvydas "notaz" Ignotas
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6 #include "../PicoInt.h"
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8 #include "../sound/ym2612.h"
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9 #include "../sound/sn76496.h"
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14 #ifndef UTYPES_DEFINED
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15 typedef unsigned char u8;
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16 typedef unsigned short u16;
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17 typedef unsigned int u32;
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18 #define UTYPES_DEFINED
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21 //#define rdprintf dprintf
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22 #define rdprintf(...)
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23 //#define wrdprintf dprintf
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24 #define wrdprintf(...)
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26 #ifdef EMU_CORE_DEBUG
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27 extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];
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28 extern int lrp_cyc, lwp_cyc;
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29 #undef USE_POLL_DETECT
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32 // -----------------------------------------------------------------
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35 #define POLL_LIMIT 16
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36 #define POLL_CYCLES 124
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37 // int m68k_poll_addr, m68k_poll_cnt;
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38 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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40 #ifndef _ASM_CD_MEMORY_C
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41 static u32 m68k_reg_read16(u32 a)
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45 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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49 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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52 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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53 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)
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54 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }
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55 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);
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58 d = Pico_mcd->s68k_regs[4]<<8;
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61 d = *(u16 *)(Pico_mcd->bios + 0x72);
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64 d = Read_CDC_Host(0);
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67 elprintf(EL_UIO, "m68k FIXME: reserved read");
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70 d = Pico_mcd->m.timer_stopwatch >> 16;
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71 dprintf("m68k stopwatch timer read (%04x)", d);
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76 // comm flag/cmd/status (0xE-0x2F)
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77 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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81 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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89 #ifndef _ASM_CD_MEMORY_C
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92 void m68k_reg_write8(u32 a, u32 d)
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95 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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100 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
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104 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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105 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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106 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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107 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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108 SekResetS68k(); // S68k comes out of RESET or BRQ state
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109 Pico_mcd->m.state_flags&=~1;
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110 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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112 Pico_mcd->m.busreq = d;
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115 dprintf("m68k: prg wp=%02x", d);
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116 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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119 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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120 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);
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122 if ((dold>>6) != ((d>>6)&3))
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123 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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124 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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125 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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126 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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128 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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130 //dold &= ~2; // ??
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132 if ((d & 2) && !(dold & 2)) {
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133 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
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137 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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140 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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141 #ifdef USE_POLL_DETECT
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142 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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143 SekSetStopS68k(0); s68k_poll_adclk = 0;
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144 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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150 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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153 Pico_mcd->bios[0x72] = d;
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154 dprintf("hint vector set to %08x", PicoRead32(0x70));
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157 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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159 //dprintf("m68k: comm flag: %02x", d);
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160 Pico_mcd->s68k_regs[0xe] = d;
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161 #ifdef USE_POLL_DETECT
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162 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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163 SekSetStopS68k(0); s68k_poll_adclk = 0;
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164 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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170 if ((a&0xf0) == 0x10) {
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171 Pico_mcd->s68k_regs[a] = d;
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172 #ifdef USE_POLL_DETECT
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173 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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174 SekSetStopS68k(0); s68k_poll_adclk = 0;
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175 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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181 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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184 #ifndef _ASM_CD_MEMORY_C
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187 u32 s68k_poll_detect(u32 a, u32 d)
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189 #ifdef USE_POLL_DETECT
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190 // needed mostly for Cyclone, which doesn't always check it's cycle counter
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191 if (SekIsStoppedS68k()) return d;
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192 // polling detection
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193 if (a == (s68k_poll_adclk&0xff)) {
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194 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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195 if (clkdiff <= POLL_CYCLES) {
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197 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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198 if (s68k_poll_cnt > POLL_LIMIT) {
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200 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
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202 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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206 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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212 #define READ_FONT_DATA(basemask) \
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214 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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215 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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216 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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217 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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218 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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219 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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223 #ifndef _ASM_CD_MEMORY_C
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226 u32 s68k_reg_read16(u32 a)
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230 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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234 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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236 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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237 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);
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238 return s68k_poll_detect(a, d);
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240 return CDC_Read_Reg();
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242 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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244 d = Pico_mcd->m.timer_stopwatch >> 16;
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245 dprintf("s68k stopwatch timer read (%04x)", d);
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248 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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249 return Pico_mcd->s68k_regs[31];
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250 case 0x34: // fader
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251 return 0; // no busy bit
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252 case 0x50: // font data (check: Lunar 2, Silpheed)
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253 READ_FONT_DATA(0x00100000);
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256 READ_FONT_DATA(0x00010000);
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259 READ_FONT_DATA(0x10000000);
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262 READ_FONT_DATA(0x01000000);
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266 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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268 if (a >= 0x0e && a < 0x30)
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269 return s68k_poll_detect(a, d);
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274 #ifndef _ASM_CD_MEMORY_C
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277 void s68k_reg_write8(u32 a, u32 d)
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279 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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281 // Warning: d might have upper bits set
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284 return; // only m68k can change WP
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286 int dold = Pico_mcd->s68k_regs[3];
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287 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);
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291 if ((d ^ dold) & 5) {
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292 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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295 #ifdef _ASM_CD_MEMORY_C
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296 if ((d ^ dold) & 0x1d)
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297 PicoMemResetCDdecode(d);
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300 dprintf("wram mode 2M->1M");
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301 wram_2M_to_1M(Pico_mcd->word_ram2M);
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305 dprintf("wram mode 1M->2M");
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306 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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308 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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310 wram_1M_to_2M(Pico_mcd->word_ram2M);
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315 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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320 dprintf("s68k CDC dest: %x", d&7);
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321 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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324 //dprintf("s68k CDC reg addr: %x", d&0xf);
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330 dprintf("s68k set CDC dma addr");
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334 dprintf("s68k set stopwatch timer");
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335 Pico_mcd->m.timer_stopwatch = 0;
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338 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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341 dprintf("s68k set int3 timer: %02x", d);
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342 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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344 case 0x33: // IRQ mask
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345 dprintf("s68k irq mask: %02x", d);
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346 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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347 CDD_Export_Status();
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350 case 0x34: // fader
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351 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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354 return; // d/m bit is unsetable
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356 u32 d_old = Pico_mcd->s68k_regs[0x37];
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357 Pico_mcd->s68k_regs[0x37] = d&7;
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358 if ((d&4) && !(d_old&4)) {
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359 CDD_Export_Status();
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364 Pico_mcd->s68k_regs[a] = (u8) d;
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365 CDD_Import_Command();
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369 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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371 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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375 Pico_mcd->s68k_regs[a] = (u8) d;
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379 #ifndef _ASM_CD_MEMORY_C
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380 static u32 OtherRead16End(u32 a, int realsize)
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384 if ((a&0xffffc0)==0xa12000) {
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385 d=m68k_reg_read16(a);
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390 if (SRam.data != NULL) d=3; // 64k cart
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394 if ((a&0xfe0000)==0x600000) {
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395 if (SRam.data != NULL) {
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396 d=SRam.data[((a>>1)&0xffff)+0x2000];
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397 if (realsize == 8) d|=d<<8;
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403 d=Pico_mcd->m.bcram_reg;
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407 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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414 static void OtherWrite8End(u32 a, u32 d, int realsize)
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416 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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418 if ((a&0xfe0000)==0x600000) {
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419 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {
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420 SRam.data[((a>>1)&0xffff)+0x2000]=d;
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427 Pico_mcd->m.bcram_reg=d;
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431 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
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434 #define _CD_MEMORY_C
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435 #undef _ASM_MEMORY_C
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436 #include "../MemoryCmn.c"
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437 #include "cell_map.c"
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438 #endif // !def _ASM_CD_MEMORY_C
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441 // -----------------------------------------------------------------
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442 // Read Rom and read Ram
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444 #ifdef _ASM_CD_MEMORY_C
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445 u32 PicoReadM68k8(u32 a);
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447 u32 PicoReadM68k8(u32 a)
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455 case 0x00>>1: // BIOS: 000000 - 020000
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456 d = *(u8 *)(Pico_mcd->bios+(a^1));
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458 case 0x02>>1: // prg RAM
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459 if ((Pico_mcd->m.busreq&3)!=1) {
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460 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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461 d = *(prg_bank+((a^1)&0x1ffff));
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464 case 0x20>>1: // word RAM: 200000 - 220000
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465 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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467 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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468 int bank = Pico_mcd->s68k_regs[3]&1;
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469 d = Pico_mcd->word_ram1M[bank][a^1];
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471 // allow access in any mode, like Gens does
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472 d = Pico_mcd->word_ram2M[a^1];
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474 wrdprintf("ret = %02x", (u8)d);
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476 case 0x22>>1: // word RAM: 220000 - 240000
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477 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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478 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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479 int bank = Pico_mcd->s68k_regs[3]&1;
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480 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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481 d = Pico_mcd->word_ram1M[bank][a^1];
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483 // allow access in any mode, like Gens does
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484 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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486 wrdprintf("ret = %02x", (u8)d);
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488 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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489 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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490 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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491 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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493 if ((a&0xe700e0)==0xc00000) {
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494 d=PicoVideoRead(a);
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495 if ((a&1)==0) d>>=8;
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498 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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499 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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500 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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501 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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503 d = *(u8 *)(Pico.ram+((a^1)&0xffff));
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506 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram
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507 if ((a&0xffffc0)==0xa12000)
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508 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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510 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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512 if ((a&0xffffc0)==0xa12000)
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513 rdprintf("ret = %02x", (u8)d);
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518 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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519 #ifdef EMU_CORE_DEBUG
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520 if (a>=Pico.romsize) {
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522 lastread_d[lrp_cyc++&15] = d;
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530 #ifdef _ASM_CD_MEMORY_C
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531 u32 PicoReadM68k16(u32 a);
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533 static u32 PicoReadM68k16(u32 a)
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541 case 0x00>>1: // BIOS: 000000 - 020000
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542 d = *(u16 *)(Pico_mcd->bios+a);
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544 case 0x02>>1: // prg RAM
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545 if ((Pico_mcd->m.busreq&3)!=1) {
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546 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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547 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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548 d = *(u16 *)(prg_bank+(a&0x1fffe));
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549 wrdprintf("ret = %04x", d);
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552 case 0x20>>1: // word RAM: 200000 - 220000
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553 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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555 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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556 int bank = Pico_mcd->s68k_regs[3]&1;
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557 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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559 // allow access in any mode, like Gens does
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560 d = *(u16 *)(Pico_mcd->word_ram2M+a);
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562 wrdprintf("ret = %04x", d);
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564 case 0x22>>1: // word RAM: 220000 - 240000
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565 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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566 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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567 int bank = Pico_mcd->s68k_regs[3]&1;
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568 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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569 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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571 // allow access in any mode, like Gens does
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572 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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574 wrdprintf("ret = %04x", d);
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576 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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577 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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578 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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579 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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581 if ((a&0xe700e0)==0xc00000)
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582 d=PicoVideoRead(a);
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584 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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585 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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586 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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587 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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589 d=*(u16 *)(Pico.ram+(a&0xfffe));
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592 if ((a&0xffffc0)==0xa12000)
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593 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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595 d = OtherRead16(a, 16);
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597 if ((a&0xffffc0)==0xa12000)
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598 rdprintf("ret = %04x", d);
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603 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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604 #ifdef EMU_CORE_DEBUG
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605 if (a>=Pico.romsize) {
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607 lastread_d[lrp_cyc++&15] = d;
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615 #ifdef _ASM_CD_MEMORY_C
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616 u32 PicoReadM68k32(u32 a);
\r
618 static u32 PicoReadM68k32(u32 a)
\r
626 case 0x00>>1: { // BIOS: 000000 - 020000
\r
627 u16 *pm=(u16 *)(Pico_mcd->bios+a);
\r
628 d = (pm[0]<<16)|pm[1];
\r
631 case 0x02>>1: // prg RAM
\r
632 if ((Pico_mcd->m.busreq&3)!=1) {
\r
633 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
634 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
635 d = (pm[0]<<16)|pm[1];
\r
638 case 0x20>>1: // word RAM: 200000 - 220000
\r
639 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
641 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
642 int bank = Pico_mcd->s68k_regs[3]&1;
\r
643 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);
\r
644 d = (pm[0]<<16)|pm[1];
\r
646 // allow access in any mode, like Gens does
\r
647 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);
\r
648 d = (pm[0]<<16)|pm[1];
\r
650 wrdprintf("ret = %08x", d);
\r
652 case 0x22>>1: // word RAM: 220000 - 240000
\r
653 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
654 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?
\r
656 int bank = Pico_mcd->s68k_regs[3]&1;
\r
657 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
658 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
660 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
\r
661 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
\r
663 // allow access in any mode, like Gens does
\r
664 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
665 d = (pm[0]<<16)|pm[1];
\r
667 wrdprintf("ret = %08x", d);
\r
669 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
\r
670 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
\r
671 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
\r
672 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
\r
674 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);
\r
676 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
\r
677 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
\r
678 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
\r
679 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {
\r
681 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
682 d = (pm[0]<<16)|pm[1];
\r
686 if ((a&0xffffc0)==0xa12000)
\r
687 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
\r
689 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
691 if ((a&0xffffc0)==0xa12000)
\r
692 rdprintf("ret = %08x", d);
\r
697 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
698 #ifdef EMU_CORE_DEBUG
\r
699 if (a>=Pico.romsize) {
\r
701 lastread_d[lrp_cyc++&15] = d;
\r
709 // -----------------------------------------------------------------
\r
711 #ifdef _ASM_CD_MEMORY_C
\r
712 void PicoWriteM68k8(u32 a,u8 d);
\r
714 void PicoWriteM68k8(u32 a,u8 d)
\r
716 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
717 #ifdef EMU_CORE_DEBUG
\r
718 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
721 if ((a&0xe00000)==0xe00000) { // Ram
\r
722 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
727 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
728 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
729 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
736 if ((a&0xfc0000)==0x200000) {
\r
737 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
738 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
739 int bank = Pico_mcd->s68k_regs[3]&1;
\r
741 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
743 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
\r
745 // allow access in any mode, like Gens does
\r
746 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
751 if ((a&0xffffc0)==0xa12000) {
\r
752 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
753 m68k_reg_write8(a, d);
\r
762 #ifdef _ASM_CD_MEMORY_C
\r
763 void PicoWriteM68k16(u32 a,u16 d);
\r
765 static void PicoWriteM68k16(u32 a,u16 d)
\r
767 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);
\r
768 #ifdef EMU_CORE_DEBUG
\r
769 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
772 if ((a&0xe00000)==0xe00000) { // Ram
\r
773 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
778 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
779 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
780 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
781 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
788 if ((a&0xfc0000)==0x200000) {
\r
789 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
790 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
791 int bank = Pico_mcd->s68k_regs[3]&1;
\r
793 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
795 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
797 // allow access in any mode, like Gens does
\r
798 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
804 if ((a&0xffffc0)==0xa12000) {
\r
805 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
806 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
807 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
808 #ifdef USE_POLL_DETECT
\r
809 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
810 SekSetStopS68k(0); s68k_poll_adclk = 0;
\r
811 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
\r
816 m68k_reg_write8(a, d>>8);
\r
817 m68k_reg_write8(a+1,d&0xff);
\r
822 if ((a&0xe700e0)==0xc00000) {
\r
823 PicoVideoWrite(a,(u16)d);
\r
832 #ifdef _ASM_CD_MEMORY_C
\r
833 void PicoWriteM68k32(u32 a,u32 d);
\r
835 static void PicoWriteM68k32(u32 a,u32 d)
\r
837 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);
\r
838 #ifdef EMU_CORE_DEBUG
\r
839 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
842 if ((a&0xe00000)==0xe00000)
\r
845 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
846 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
851 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
852 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
853 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
854 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
861 if ((a&0xfc0000)==0x200000) {
\r
862 if (d != 0) // don't log clears
\r
863 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
864 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
865 int bank = Pico_mcd->s68k_regs[3]&1;
\r
866 if (a >= 0x220000) { // cell arranged
\r
868 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
869 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
871 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
872 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
874 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
875 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
878 // allow access in any mode, like Gens does
\r
879 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
880 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
885 if ((a&0xffffc0)==0xa12000) {
\r
886 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
887 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);
\r
891 if ((a&0xe700e0)==0xc00000)
\r
893 PicoVideoWrite(a, (u16)(d>>16));
\r
894 PicoVideoWrite(a+2,(u16)d);
\r
898 OtherWrite16(a, (u16)(d>>16));
\r
899 OtherWrite16(a+2,(u16)d);
\r
904 // -----------------------------------------------------------------
\r
906 // -----------------------------------------------------------------
\r
908 #ifdef _ASM_CD_MEMORY_C
\r
909 u32 PicoReadS68k8(u32 a);
\r
911 static u32 PicoReadS68k8(u32 a)
\r
915 #ifdef EMU_CORE_DEBUG
\r
922 d = *(Pico_mcd->prg_ram+(a^1));
\r
927 if ((a&0xfffe00) == 0xff8000) {
\r
929 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
930 if (a >= 0x0e && a < 0x30) {
\r
931 d = Pico_mcd->s68k_regs[a];
\r
932 s68k_poll_detect(a, d);
\r
933 rdprintf("ret = %02x", (u8)d);
\r
936 else if (a >= 0x58 && a < 0x68)
\r
937 d = gfx_cd_read(a&~1);
\r
938 else d = s68k_reg_read16(a&~1);
\r
939 if ((a&1)==0) d>>=8;
\r
940 rdprintf("ret = %02x", (u8)d);
\r
944 // word RAM (2M area)
\r
945 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
946 // test: batman returns
\r
947 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
948 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
949 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
950 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
951 if (a&1) d &= 0x0f;
\r
954 // allow access in any mode, like Gens does
\r
955 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
957 wrdprintf("ret = %02x", (u8)d);
\r
961 // word RAM (1M area)
\r
962 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
964 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
965 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
966 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
967 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
968 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
969 wrdprintf("ret = %02x", (u8)d);
\r
974 if ((a&0xff8000)==0xff0000) {
\r
975 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
978 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
979 else if (a >= 0x20) {
\r
981 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
982 if (a & 2) d >>= 8;
\r
984 elprintf(EL_IO, "ret = %02x", (u8)d);
\r
989 if ((a&0xff0000)==0xfe0000) {
\r
990 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
994 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
998 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
999 #ifdef EMU_CORE_DEBUG
\r
1001 lastread_d[lrp_cyc++&15] = d;
\r
1008 #ifdef _ASM_CD_MEMORY_C
\r
1009 u32 PicoReadS68k16(u32 a);
\r
1011 static u32 PicoReadS68k16(u32 a)
\r
1015 #ifdef EMU_CORE_DEBUG
\r
1016 u32 ab=a&0xfffffe;
\r
1021 if (a < 0x80000) {
\r
1022 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
1023 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
1024 wrdprintf("ret = %04x", d);
\r
1029 if ((a&0xfffe00) == 0xff8000) {
\r
1031 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
1032 if (a >= 0x58 && a < 0x68)
\r
1033 d = gfx_cd_read(a);
\r
1034 else d = s68k_reg_read16(a);
\r
1035 rdprintf("ret = %04x", d);
\r
1039 // word RAM (2M area)
\r
1040 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1041 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
1042 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1043 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1044 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
1045 d |= d << 4; d &= ~0xf0;
\r
1047 // allow access in any mode, like Gens does
\r
1048 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1050 wrdprintf("ret = %04x", d);
\r
1054 // word RAM (1M area)
\r
1055 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1057 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
1058 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1059 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1060 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1061 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1062 wrdprintf("ret = %04x", d);
\r
1067 if ((a&0xff0000)==0xfe0000) {
\r
1068 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
1069 a = (a>>1)&0x1fff;
\r
1070 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
1071 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
1072 dprintf("ret = %04x", d);
\r
1077 if ((a&0xff8000)==0xff0000) {
\r
1078 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
1081 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
1082 else if (a >= 0x20) {
\r
1084 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1085 if (a & 2) d >>= 8;
\r
1087 dprintf("ret = %04x", d);
\r
1091 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1095 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1096 #ifdef EMU_CORE_DEBUG
\r
1098 lastread_d[lrp_cyc++&15] = d;
\r
1105 #ifdef _ASM_CD_MEMORY_C
\r
1106 u32 PicoReadS68k32(u32 a);
\r
1108 static u32 PicoReadS68k32(u32 a)
\r
1112 #ifdef EMU_CORE_DEBUG
\r
1113 u32 ab=a&0xfffffe;
\r
1118 if (a < 0x80000) {
\r
1119 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1120 d = (pm[0]<<16)|pm[1];
\r
1125 if ((a&0xfffe00) == 0xff8000) {
\r
1127 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
1128 if (a >= 0x58 && a < 0x68)
\r
1129 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
1130 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
1131 rdprintf("ret = %08x", d);
\r
1135 // word RAM (2M area)
\r
1136 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1137 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
1138 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1139 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1141 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
1142 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
1143 d |= d << 4; d &= 0x0f0f0f0f;
\r
1145 // allow access in any mode, like Gens does
\r
1146 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
1148 wrdprintf("ret = %08x", d);
\r
1152 // word RAM (1M area)
\r
1153 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1155 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1156 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1157 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1158 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1159 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1160 wrdprintf("ret = %08x", d);
\r
1165 if ((a&0xff8000)==0xff0000) {
\r
1166 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1168 if (a >= 0x2000) {
\r
1170 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1171 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1172 } else if (a >= 0x20) {
\r
1176 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1177 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1179 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1180 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1183 dprintf("ret = %08x", d);
\r
1188 if ((a&0xff0000)==0xfe0000) {
\r
1189 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1190 a = (a>>1)&0x1fff;
\r
1191 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1192 d|= Pico_mcd->bram[a++] << 24;
\r
1193 d|= Pico_mcd->bram[a++];
\r
1194 d|= Pico_mcd->bram[a++] << 8;
\r
1195 dprintf("ret = %08x", d);
\r
1199 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1203 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1204 #ifdef EMU_CORE_DEBUG
\r
1205 if (ab > 0x78) { // not vectors and stuff
\r
1207 lastread_d[lrp_cyc++&15] = d;
\r
1215 #ifndef _ASM_CD_MEMORY_C
\r
1216 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1217 static void decode_write8(u32 a, u8 d, int r3)
\r
1219 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1220 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1224 if (!(a&1)) d <<= 4;
\r
1227 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1228 } else if (r3 > 8) {
\r
1229 if (d) goto do_it;
\r
1236 *pd = d | (*pd & oldmask);
\r
1240 static void decode_write16(u32 a, u16 d, int r3)
\r
1242 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1244 //if ((a & 0x3ffff) < 0x28000) return;
\r
1252 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1253 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1255 } else if (r3 > 8) {
\r
1257 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1258 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1266 // -----------------------------------------------------------------
\r
1268 #ifdef _ASM_CD_MEMORY_C
\r
1269 void PicoWriteS68k8(u32 a,u8 d);
\r
1271 static void PicoWriteS68k8(u32 a,u8 d)
\r
1273 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1277 #ifdef EMU_CORE_DEBUG
\r
1278 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1282 if (a < 0x80000) {
\r
1283 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1284 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;
\r
1289 if ((a&0xfffe00) == 0xff8000) {
\r
1291 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1292 if (a >= 0x58 && a < 0x68)
\r
1293 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1294 else s68k_reg_write8(a,d);
\r
1298 // word RAM (2M area)
\r
1299 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1300 int r3 = Pico_mcd->s68k_regs[3];
\r
1301 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1302 if (r3 & 4) { // 1M decode mode?
\r
1303 decode_write8(a, d, r3);
\r
1305 // allow access in any mode, like Gens does
\r
1306 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1311 // word RAM (1M area)
\r
1312 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1313 // Wing Commander tries to write here in wrong mode
\r
1316 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1317 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1318 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1319 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1320 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1325 if ((a&0xff8000)==0xff0000) {
\r
1328 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1329 else if (a < 0x12)
\r
1330 pcm_write(a>>1, d);
\r
1335 if ((a&0xff0000)==0xfe0000) {
\r
1336 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1341 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1346 #ifdef _ASM_CD_MEMORY_C
\r
1347 void PicoWriteS68k16(u32 a,u16 d);
\r
1349 static void PicoWriteS68k16(u32 a,u16 d)
\r
1351 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1355 #ifdef EMU_CORE_DEBUG
\r
1356 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1360 if (a < 0x80000) {
\r
1361 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1362 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer
\r
1363 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1368 if ((a&0xfffe00) == 0xff8000) {
\r
1370 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1371 if (a >= 0x58 && a < 0x68)
\r
1372 gfx_cd_write16(a, d);
\r
1374 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1375 Pico_mcd->s68k_regs[0xf] = d;
\r
1378 s68k_reg_write8(a, d>>8);
\r
1379 s68k_reg_write8(a+1,d&0xff);
\r
1384 // word RAM (2M area)
\r
1385 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1386 int r3 = Pico_mcd->s68k_regs[3];
\r
1387 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1388 if (r3 & 4) { // 1M decode mode?
\r
1389 decode_write16(a, d, r3);
\r
1391 // allow access in any mode, like Gens does
\r
1392 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1397 // word RAM (1M area)
\r
1398 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1401 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1402 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1403 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1404 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1405 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1410 if ((a&0xff8000)==0xff0000) {
\r
1413 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1414 else if (a < 0x12)
\r
1415 pcm_write(a>>1, d & 0xff);
\r
1420 if ((a&0xff0000)==0xfe0000) {
\r
1421 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1422 a = (a>>1)&0x1fff;
\r
1423 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1424 Pico_mcd->bram[a++] = d >> 8;
\r
1429 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1434 #ifdef _ASM_CD_MEMORY_C
\r
1435 void PicoWriteS68k32(u32 a,u32 d);
\r
1437 static void PicoWriteS68k32(u32 a,u32 d)
\r
1439 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1443 #ifdef EMU_CORE_DEBUG
\r
1444 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1448 if (a < 0x80000) {
\r
1449 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {
\r
1450 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1451 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1457 if ((a&0xfffe00) == 0xff8000) {
\r
1459 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1460 if (a >= 0x58 && a < 0x68) {
\r
1461 gfx_cd_write16(a, d>>16);
\r
1462 gfx_cd_write16(a+2, d&0xffff);
\r
1464 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);
\r
1465 s68k_reg_write8(a, d>>24);
\r
1466 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1467 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1468 s68k_reg_write8(a+3, d &0xff);
\r
1473 // word RAM (2M area)
\r
1474 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1475 int r3 = Pico_mcd->s68k_regs[3];
\r
1476 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1477 if (r3 & 4) { // 1M decode mode?
\r
1478 decode_write16(a , d >> 16, r3);
\r
1479 decode_write16(a+2, d , r3);
\r
1481 // allow access in any mode, like Gens does
\r
1482 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1483 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1488 // word RAM (1M area)
\r
1489 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1493 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1494 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1495 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1496 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1497 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1498 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1503 if ((a&0xff8000)==0xff0000) {
\r
1505 if (a >= 0x2000) {
\r
1507 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1508 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1509 } else if (a < 0x12) {
\r
1511 pcm_write(a, (d>>16) & 0xff);
\r
1512 pcm_write(a+1, d & 0xff);
\r
1518 if ((a&0xff0000)==0xfe0000) {
\r
1519 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1520 a = (a>>1)&0x1fff;
\r
1521 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1522 Pico_mcd->bram[a++] = d >> 24;
\r
1523 Pico_mcd->bram[a++] = d;
\r
1524 Pico_mcd->bram[a++] = d >> 8;
\r
1529 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1534 // -----------------------------------------------------------------
\r
1538 static __inline int PicoMemBaseM68k(u32 pc)
\r
1540 if ((pc&0xe00000)==0xe00000)
\r
1541 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1544 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1546 if ((pc&0xfc0000)==0x200000)
\r
1548 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1549 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1550 if (pc < 0x220000) {
\r
1551 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1552 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1556 // Error - Program Counter is invalid
\r
1557 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);
\r
1559 return (int)Pico_mcd->bios;
\r
1563 static u32 PicoCheckPcM68k(u32 pc)
\r
1565 pc-=PicoCpuCM68k.membase; // Get real pc
\r
1568 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
\r
1570 return PicoCpuCM68k.membase+pc;
\r
1574 static __inline int PicoMemBaseS68k(u32 pc)
\r
1576 if (pc < 0x80000) // PRG RAM
\r
1577 return (int)Pico_mcd->prg_ram;
\r
1579 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1580 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1582 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1583 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1584 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1587 // Error - Program Counter is invalid
\r
1588 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);
\r
1590 return (int)Pico_mcd->prg_ram;
\r
1594 static u32 PicoCheckPcS68k(u32 pc)
\r
1596 pc-=PicoCpuCS68k.membase; // Get real pc
\r
1599 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
\r
1601 return PicoCpuCS68k.membase+pc;
\r
1605 #ifndef _ASM_CD_MEMORY_C
\r
1606 void PicoMemResetCD(int r3)
\r
1609 // update fetchmap..
\r
1613 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1614 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
\r
1618 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1619 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1620 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1621 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1627 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1629 // additional handlers for common code
\r
1630 PicoRead16Hook = OtherRead16End;
\r
1631 PicoWrite8Hook = OtherWrite8End;
\r
1634 // Setup m68k memory callbacks:
\r
1635 PicoCpuCM68k.checkpc=PicoCheckPcM68k;
\r
1636 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;
\r
1637 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;
\r
1638 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;
\r
1639 PicoCpuCM68k.write8 =PicoWriteM68k8;
\r
1640 PicoCpuCM68k.write16=PicoWriteM68k16;
\r
1641 PicoCpuCM68k.write32=PicoWriteM68k32;
\r
1643 PicoCpuCS68k.checkpc=PicoCheckPcS68k;
\r
1644 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;
\r
1645 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;
\r
1646 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;
\r
1647 PicoCpuCS68k.write8 =PicoWriteS68k8;
\r
1648 PicoCpuCS68k.write16=PicoWriteS68k16;
\r
1649 PicoCpuCS68k.write32=PicoWriteS68k32;
\r
1653 PicoCpuFM68k.read_byte =PicoReadM68k8;
\r
1654 PicoCpuFM68k.read_word =PicoReadM68k16;
\r
1655 PicoCpuFM68k.read_long =PicoReadM68k32;
\r
1656 PicoCpuFM68k.write_byte=PicoWriteM68k8;
\r
1657 PicoCpuFM68k.write_word=PicoWriteM68k16;
\r
1658 PicoCpuFM68k.write_long=PicoWriteM68k32;
\r
1660 PicoCpuFS68k.read_byte =PicoReadS68k8;
\r
1661 PicoCpuFS68k.read_word =PicoReadS68k16;
\r
1662 PicoCpuFS68k.read_long =PicoReadS68k32;
\r
1663 PicoCpuFS68k.write_byte=PicoWriteS68k8;
\r
1664 PicoCpuFS68k.write_word=PicoWriteS68k16;
\r
1665 PicoCpuFS68k.write_long=PicoWriteS68k32;
\r
1667 // setup FAME fetchmap
\r
1671 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1672 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1673 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1674 // now real ROM (BIOS)
\r
1675 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1676 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
1678 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1679 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1681 // PRG RAM is default
\r
1682 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1683 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1685 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1686 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
\r
1687 // WORD RAM 2M area
\r
1688 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1689 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
\r
1690 // PicoMemResetCD() will setup word ram for both
\r
1694 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1695 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1700 unsigned char PicoReadCD8w (unsigned int a) {
\r
1701 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1703 unsigned short PicoReadCD16w(unsigned int a) {
\r
1704 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1706 unsigned int PicoReadCD32w(unsigned int a) {
\r
1707 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1709 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1710 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1712 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1713 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1715 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1716 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1719 // these are allowed to access RAM
\r
1720 unsigned int m68k_read_pcrelative_CD8 (unsigned int a)
\r
1723 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1724 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1725 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1726 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1727 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1728 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1729 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1731 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1733 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1734 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1735 if((a&0xfc0000)==0x200000) { // word RAM
\r
1736 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1737 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1738 else if (a < 0x220000) {
\r
1739 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1740 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1743 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1745 return 0;//(u8) lastread_d;
\r
1747 unsigned int m68k_read_pcrelative_CD16(unsigned int a)
\r
1750 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1751 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1752 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1753 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1754 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1755 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1756 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1758 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1760 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1761 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1762 if((a&0xfc0000)==0x200000) { // word RAM
\r
1763 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1764 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1765 else if (a < 0x220000) {
\r
1766 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1767 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1770 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1774 unsigned int m68k_read_pcrelative_CD32(unsigned int a)
\r
1778 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1779 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1780 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1781 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1782 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1783 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1784 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1785 return (pm[0]<<16)|pm[1];
\r
1787 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1789 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1790 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1791 if((a&0xfc0000)==0x200000) { // word RAM
\r
1792 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1793 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1794 else if (a < 0x220000) {
\r
1795 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1796 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1797 return (pm[0]<<16)|pm[1];
\r
1800 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1804 #endif // EMU_M68K
\r