1 // This is part of Pico Library
\r
3 // (c) Copyright 2004 Dave, All rights reserved.
\r
4 // (c) Copyright 2007 notaz, All rights reserved.
\r
5 // Free for non-commercial use.
\r
7 // For commercial use, separate licencing terms must be obtained.
\r
9 // A68K no longer supported here
\r
11 //#define __debug_io
\r
13 #include "../PicoInt.h"
\r
15 #include "../sound/sound.h"
\r
16 #include "../sound/ym2612.h"
\r
17 #include "../sound/sn76496.h"
\r
22 #include "cell_map.c"
\r
24 typedef unsigned char u8;
\r
25 typedef unsigned short u16;
\r
26 typedef unsigned int u32;
\r
28 //#define __debug_io
\r
29 //#define __debug_io2
\r
30 //#define rdprintf dprintf
\r
31 #define rdprintf(...)
\r
33 // -----------------------------------------------------------------
\r
36 static u32 m68k_reg_read16(u32 a)
\r
40 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
\r
44 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
\r
47 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
\r
48 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
\r
51 d = Pico_mcd->s68k_regs[4]<<8;
\r
54 d = Pico_mcd->m.hint_vector;
\r
57 d = Read_CDC_Host(0);
\r
60 dprintf("m68k FIXME: reserved read");
\r
63 dprintf("m68k stopwatch timer read");
\r
64 d = Pico_mcd->m.timer_stopwatch >> 16;
\r
69 // comm flag/cmd/status (0xE-0x2F)
\r
70 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
\r
74 dprintf("m68k_regs FIXME invalid read @ %02x", a);
\r
78 // dprintf("ret = %04x", d);
\r
82 static void m68k_reg_write8(u32 a, u32 d)
\r
85 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
\r
90 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
\r
94 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
\r
95 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
\r
96 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
\r
97 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
\r
98 SekResetS68k(); // S68k comes out of RESET or BRQ state
\r
99 Pico_mcd->m.state_flags&=~1;
\r
100 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
\r
102 Pico_mcd->m.busreq = d;
\r
105 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
\r
108 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
\r
110 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
\r
111 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
\r
112 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
\r
113 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
\r
114 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
\r
115 d |= Pico_mcd->s68k_regs[3]&0x1d;
\r
116 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
\r
117 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
\r
120 dprintf("FIXME hint[2]: %02x @%06x", (u8)d, SekPc);
\r
121 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
\r
124 dprintf("FIXME hint[3]: %02x @%06x", (u8)d, SekPc);
\r
125 Pico_mcd->bios[0x72] = d;
\r
126 dprintf("vector is now %08x", PicoRead32(0x70));
\r
129 //dprintf("m68k: comm flag: %02x", d);
\r
130 Pico_mcd->s68k_regs[0xe] = d;
\r
134 if ((a&0xf0) == 0x10) {
\r
135 Pico_mcd->s68k_regs[a] = d;
\r
139 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
\r
144 static u32 s68k_reg_read16(u32 a)
\r
148 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
\r
152 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
\r
155 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
\r
156 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
\r
159 d = CDC_Read_Reg();
\r
162 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
\r
165 dprintf("s68k stopwatch timer read");
\r
166 d = Pico_mcd->m.timer_stopwatch >> 16;
\r
169 dprintf("s68k int3 timer read");
\r
171 case 0x34: // fader
\r
172 d = 0; // no busy bit
\r
176 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
\r
180 // dprintf("ret = %04x", d);
\r
185 static void s68k_reg_write8(u32 a, u32 d)
\r
187 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
\r
189 // TODO: review against Gens
\r
192 return; // only m68k can change WP
\r
194 int dold = Pico_mcd->s68k_regs[3];
\r
195 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
\r
199 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
\r
201 dprintf("wram mode 2M->1M");
\r
202 wram_2M_to_1M(Pico_mcd->word_ram2M);
\r
205 d |= Pico_mcd->s68k_regs[3]&0xc3;
\r
206 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
\r
208 dprintf("wram mode 1M->2M");
\r
209 wram_1M_to_2M(Pico_mcd->word_ram2M);
\r
215 dprintf("s68k CDC dest: %x", d&7);
\r
216 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
\r
219 //dprintf("s68k CDC reg addr: %x", d&0xf);
\r
225 dprintf("s68k set CDC dma addr");
\r
229 dprintf("s68k set stopwatch timer");
\r
230 Pico_mcd->m.timer_stopwatch = 0;
\r
233 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
\r
234 Pico_mcd->m.timer_stopwatch = 0;
\r
237 dprintf("s68k set int3 timer: %02x", d);
\r
238 Pico_mcd->m.timer_int3 = d << 16;
\r
240 case 0x33: // IRQ mask
\r
241 dprintf("s68k irq mask: %02x", d);
\r
242 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
\r
243 CDD_Export_Status();
\r
246 case 0x34: // fader
\r
247 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
\r
250 return; // d/m bit is unsetable
\r
252 u32 d_old = Pico_mcd->s68k_regs[0x37];
\r
253 Pico_mcd->s68k_regs[0x37] = d&7;
\r
254 if ((d&4) && !(d_old&4)) {
\r
255 CDD_Export_Status();
\r
260 Pico_mcd->s68k_regs[a] = (u8) d;
\r
261 CDD_Import_Command();
\r
265 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
\r
267 dprintf("s68k FIXME: invalid write @ %02x?", a);
\r
271 Pico_mcd->s68k_regs[a] = (u8) d;
\r
276 static u32 OtherRead16End(u32 a, int realsize)
\r
280 if ((a&0xffffc0)==0xa12000) {
\r
281 d=m68k_reg_read16(a);
\r
285 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
\r
292 static void OtherWrite8End(u32 a, u32 d, int realsize)
\r
294 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
\r
296 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
\r
300 #undef _ASM_MEMORY_C
\r
301 #include "../MemoryCmn.c"
\r
304 // -----------------------------------------------------------------
\r
305 // Read Rom and read Ram
\r
307 u8 PicoReadM68k8(u32 a)
\r
311 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
\r
315 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
\r
318 if ((a&0xfe0000)==0x020000) {
\r
319 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
320 d = *(prg_bank+((a^1)&0x1ffff));
\r
325 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
\r
329 unsigned short *ram = (unsigned short *) Pico.ram;
\r
330 // unswap and dump RAM
\r
331 for (i = 0; i < 0x10000/2; i++)
\r
332 ram[i] = (ram[i]>>8) | (ram[i]<<8);
\r
333 ff = fopen("ram.bin", "wb");
\r
334 fwrite(ram, 1, 0x10000, ff);
\r
341 if ((a&0xfc0000)==0x200000) {
\r
342 dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
\r
343 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
344 int bank = Pico_mcd->s68k_regs[3]&1;
\r
346 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
348 d = Pico_mcd->word_ram1M[bank][a^1];
\r
350 // allow access in any mode, like Gens does
\r
351 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
353 dprintf("ret = %02x", (u8)d);
\r
357 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
\r
359 if ((a&0xffffc0)==0xa12000)
\r
360 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
\r
362 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
\r
364 if ((a&0xffffc0)==0xa12000)
\r
365 rdprintf("ret = %02x", (u8)d);
\r
370 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
\r
376 u16 PicoReadM68k16(u32 a)
\r
380 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
\r
384 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
\r
387 if ((a&0xfe0000)==0x020000) {
\r
388 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
389 d = *(u16 *)(prg_bank+(a&0x1fffe));
\r
394 if ((a&0xfc0000)==0x200000) {
\r
395 dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
\r
396 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
397 int bank = Pico_mcd->s68k_regs[3]&1;
\r
399 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
401 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
\r
403 // allow access in any mode, like Gens does
\r
404 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
406 dprintf("ret = %04x", d);
\r
410 if ((a&0xffffc0)==0xa12000)
\r
411 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
\r
413 d = (u16)OtherRead16(a, 16);
\r
415 if ((a&0xffffc0)==0xa12000)
\r
416 rdprintf("ret = %04x", d);
\r
421 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
427 u32 PicoReadM68k32(u32 a)
\r
431 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
\r
435 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
\r
438 if ((a&0xfe0000)==0x020000) {
\r
439 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
440 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
441 d = (pm[0]<<16)|pm[1];
\r
446 if ((a&0xfc0000)==0x200000) {
\r
447 dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
448 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
449 int bank = Pico_mcd->s68k_regs[3]&1;
\r
450 if (a >= 0x220000) { // cell arranged
\r
452 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
453 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
455 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
\r
456 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
\r
458 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
461 // allow access in any mode, like Gens does
\r
462 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
464 dprintf("ret = %08x", d);
\r
468 if ((a&0xffffc0)==0xa12000)
\r
469 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
\r
471 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
473 if ((a&0xffffc0)==0xa12000)
\r
474 rdprintf("ret = %08x", d);
\r
478 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
484 // -----------------------------------------------------------------
\r
487 void PicoWriteM68k8(u32 a,u8 d)
\r
490 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
492 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
\r
493 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
496 if ((a&0xe00000)==0xe00000) { // Ram
\r
497 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
504 if ((a&0xfe0000)==0x020000) {
\r
505 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
506 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
511 if ((a&0xfc0000)==0x200000) {
\r
512 dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
513 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
514 int bank = Pico_mcd->s68k_regs[3]&1;
\r
516 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
518 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
\r
520 // allow access in any mode, like Gens does
\r
521 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
526 if ((a&0xffffc0)==0xa12000)
\r
527 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
529 OtherWrite8(a,d,8);
\r
533 void PicoWriteM68k16(u32 a,u16 d)
\r
536 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
538 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
540 if ((a&0xe00000)==0xe00000) { // Ram
\r
541 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
548 if ((a&0xfe0000)==0x020000) {
\r
549 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
550 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
555 if ((a&0xfc0000)==0x200000) {
\r
556 dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
557 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
558 int bank = Pico_mcd->s68k_regs[3]&1;
\r
560 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
562 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
564 // allow access in any mode, like Gens does
\r
565 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
570 if ((a&0xffffc0)==0xa12000)
\r
571 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
577 void PicoWriteM68k32(u32 a,u32 d)
\r
580 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
583 if ((a&0xe00000)==0xe00000)
\r
586 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
587 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
594 if ((a&0xfe0000)==0x020000) {
\r
595 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
596 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
597 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
602 if ((a&0xfc0000)==0x200000) {
\r
603 if (d != 0) // don't log clears
\r
604 dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
605 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
606 int bank = Pico_mcd->s68k_regs[3]&1;
\r
607 if (a >= 0x220000) { // cell arranged
\r
609 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
610 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
612 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
613 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
615 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
616 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
619 // allow access in any mode, like Gens does
\r
620 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
621 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
626 if ((a&0xffffc0)==0xa12000)
\r
627 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
629 OtherWrite16(a, (u16)(d>>16));
\r
630 OtherWrite16(a+2,(u16)d);
\r
634 // -----------------------------------------------------------------
\r
637 u8 PicoReadS68k8(u32 a)
\r
645 d = *(Pico_mcd->prg_ram+(a^1));
\r
650 if ((a&0xfffe00) == 0xff8000) {
\r
652 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
653 if (a >= 0x50 && a < 0x68)
\r
654 d = gfx_cd_read(a&~1);
\r
655 else d = s68k_reg_read16(a&~1);
\r
656 if ((a&1)==0) d>>=8;
\r
657 rdprintf("ret = %02x", (u8)d);
\r
661 // word RAM (2M area)
\r
662 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
663 // test: batman returns
\r
664 dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
665 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
666 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
667 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
668 if (a&1) d &= 0x0f;
\r
670 dprintf("FIXME: decode");
\r
672 // allow access in any mode, like Gens does
\r
673 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
675 dprintf("ret = %02x", (u8)d);
\r
679 // word RAM (1M area)
\r
680 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
682 dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
683 if (!(Pico_mcd->s68k_regs[3]&4))
\r
684 dprintf("s68k_wram1M FIXME: wrong mode");
\r
685 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
686 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
687 dprintf("ret = %02x", (u8)d);
\r
692 if ((a&0xff8000)==0xff0000) {
\r
693 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
696 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
697 else if (a >= 0x20) {
\r
699 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
700 if (a & 2) d >>= 8;
\r
702 dprintf("ret = %02x", (u8)d);
\r
707 if ((a&0xff0000)==0xfe0000) {
\r
708 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
712 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
717 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
723 u16 PicoReadS68k16(u32 a)
\r
731 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
736 if ((a&0xfffe00) == 0xff8000) {
\r
738 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
739 if (a >= 0x50 && a < 0x68)
\r
740 d = gfx_cd_read(a);
\r
741 else d = s68k_reg_read16(a);
\r
742 rdprintf("ret = %04x", d);
\r
746 // word RAM (2M area)
\r
747 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
748 dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
749 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
750 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
751 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
752 d |= d << 4; d &= ~0xf0;
\r
753 dprintf("FIXME: decode");
\r
755 // allow access in any mode, like Gens does
\r
756 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
758 dprintf("ret = %04x", d);
\r
762 // word RAM (1M area)
\r
763 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
765 dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
766 if (!(Pico_mcd->s68k_regs[3]&4))
\r
767 dprintf("s68k_wram1M FIXME: wrong mode");
\r
768 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
769 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
770 dprintf("ret = %04x", d);
\r
775 if ((a&0xff0000)==0xfe0000) {
\r
776 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
778 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
779 d|= Pico_mcd->bram[a++] << 8;
\r
780 dprintf("ret = %04x", d);
\r
785 if ((a&0xff8000)==0xff0000) {
\r
786 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
789 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
790 else if (a >= 0x20) {
\r
792 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
793 if (a & 2) d >>= 8;
\r
795 dprintf("ret = %04x", d);
\r
799 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
804 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
810 u32 PicoReadS68k32(u32 a)
\r
818 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
819 d = (pm[0]<<16)|pm[1];
\r
824 if ((a&0xfffe00) == 0xff8000) {
\r
826 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
827 if (a >= 0x50 && a < 0x68)
\r
828 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
829 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
830 rdprintf("ret = %08x", d);
\r
834 // word RAM (2M area)
\r
835 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
836 dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
837 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
838 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
840 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
841 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
842 d |= d << 4; d &= 0x0f0f0f0f;
\r
843 dprintf("FIXME: decode");
\r
845 // allow access in any mode, like Gens does
\r
846 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
848 dprintf("ret = %08x", d);
\r
852 // word RAM (1M area)
\r
853 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
855 dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
856 if (!(Pico_mcd->s68k_regs[3]&4))
\r
857 dprintf("s68k_wram1M FIXME: wrong mode");
\r
858 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
859 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
860 dprintf("ret = %08x", d);
\r
865 if ((a&0xff8000)==0xff0000) {
\r
866 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
870 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
871 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
872 } else if (a >= 0x20) {
\r
876 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
877 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
879 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
880 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
883 dprintf("ret = %08x", d);
\r
888 if ((a&0xff0000)==0xfe0000) {
\r
889 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
891 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
892 d|= Pico_mcd->bram[a++] << 24;
\r
893 d|= Pico_mcd->bram[a++];
\r
894 d|= Pico_mcd->bram[a++] << 8;
\r
895 dprintf("ret = %08x", d);
\r
899 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
904 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
910 // -----------------------------------------------------------------
\r
912 void PicoWriteS68k8(u32 a,u8 d)
\r
915 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
922 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
928 if ((a&0xfffe00) == 0xff8000) {
\r
930 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
931 if (a >= 0x50 && a < 0x68)
\r
932 gfx_cd_write(a&~1, (d<<8)|d);
\r
933 else s68k_reg_write8(a,d);
\r
937 // word RAM (2M area)
\r
938 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
939 dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
940 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
941 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
942 if (a&1) d &= 0x0f;
\r
944 Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]=d;
\r
945 dprintf("FIXME: decode");
\r
947 // allow access in any mode, like Gens does
\r
948 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
953 // word RAM (1M area)
\r
954 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
957 dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
958 if (!(Pico_mcd->s68k_regs[3]&4))
\r
959 dprintf("s68k_wram1M FIXME: wrong mode");
\r
960 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
961 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
966 if ((a&0xff8000)==0xff0000) {
\r
969 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
971 pcm_write(a>>1, d);
\r
976 if ((a&0xff0000)==0xfe0000) {
\r
977 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
982 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
986 void PicoWriteS68k16(u32 a,u16 d)
\r
989 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
996 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1001 if ((a&0xfffe00) == 0xff8000) {
\r
1003 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1004 if (a >= 0x50 && a < 0x68)
\r
1005 gfx_cd_write(a, d);
\r
1007 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1008 Pico_mcd->s68k_regs[0xf] = d;
\r
1011 s68k_reg_write8(a, d>>8);
\r
1012 s68k_reg_write8(a+1,d&0xff);
\r
1017 // word RAM (2M area)
\r
1018 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1019 dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1020 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1021 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1022 d &= ~0xf0; d |= d >> 8;
\r
1023 Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff] = d;
\r
1024 dprintf("FIXME: decode");
\r
1026 // allow access in any mode, like Gens does
\r
1027 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1032 // word RAM (1M area)
\r
1033 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
1036 dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1037 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1038 dprintf("s68k_wram1M FIXME: wrong mode");
\r
1039 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1040 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1045 if ((a&0xff8000)==0xff0000) {
\r
1048 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1049 else if (a < 0x12)
\r
1050 pcm_write(a>>1, d & 0xff);
\r
1055 if ((a&0xff0000)==0xfe0000) {
\r
1056 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1057 a = (a>>1)&0x1fff;
\r
1058 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1059 Pico_mcd->bram[a++] = d >> 8;
\r
1064 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1068 void PicoWriteS68k32(u32 a,u32 d)
\r
1070 #ifdef __debug_io2
\r
1071 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1077 if (a < 0x80000) {
\r
1078 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1079 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1084 if ((a&0xfffe00) == 0xff8000) {
\r
1086 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1087 if (a >= 0x50 && a < 0x68) {
\r
1088 gfx_cd_write(a, d>>16);
\r
1089 gfx_cd_write(a+2, d&0xffff);
\r
1091 s68k_reg_write8(a, d>>24);
\r
1092 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1093 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1094 s68k_reg_write8(a+3, d &0xff);
\r
1099 // word RAM (2M area)
\r
1100 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1101 dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1102 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1103 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1105 d &= 0x0f0f0f0f; d |= d >> 4;
\r
1106 Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] = d >> 16;
\r
1107 Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff] = d;
\r
1108 dprintf("FIXME: decode");
\r
1110 // allow access in any mode, like Gens does
\r
1111 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1112 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1117 // word RAM (1M area)
\r
1118 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
1122 dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1123 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1124 dprintf("s68k_wram1M FIXME: wrong mode");
\r
1125 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1126 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1127 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1132 if ((a&0xff8000)==0xff0000) {
\r
1134 if (a >= 0x2000) {
\r
1136 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1137 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1138 } else if (a < 0x12) {
\r
1140 pcm_write(a, (d>>16) & 0xff);
\r
1141 pcm_write(a+1, d & 0xff);
\r
1147 if ((a&0xff0000)==0xfe0000) {
\r
1148 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1149 a = (a>>1)&0x1fff;
\r
1150 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1151 Pico_mcd->bram[a++] = d >> 24;
\r
1152 Pico_mcd->bram[a++] = d;
\r
1153 Pico_mcd->bram[a++] = d >> 8;
\r
1158 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1163 // -----------------------------------------------------------------
\r
1166 #if defined(EMU_C68K)
\r
1167 static __inline int PicoMemBaseM68k(u32 pc)
\r
1169 if ((pc&0xe00000)==0xe00000)
\r
1170 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1173 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1175 if ((pc&0xfc0000)==0x200000)
\r
1177 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1178 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1179 if (pc < 0x220000) {
\r
1180 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1181 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1185 // Error - Program Counter is invalid
\r
1186 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1188 return (int)Pico_mcd->bios;
\r
1192 static u32 PicoCheckPcM68k(u32 pc)
\r
1194 pc-=PicoCpu.membase; // Get real pc
\r
1197 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1199 return PicoCpu.membase+pc;
\r
1203 static __inline int PicoMemBaseS68k(u32 pc)
\r
1205 if (pc < 0x80000) // PRG RAM
\r
1206 return (int)Pico_mcd->prg_ram;
\r
1208 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1209 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1211 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1212 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1213 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1216 // Error - Program Counter is invalid
\r
1217 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1219 return (int)Pico_mcd->prg_ram;
\r
1223 static u32 PicoCheckPcS68k(u32 pc)
\r
1225 pc-=PicoCpuS68k.membase; // Get real pc
\r
1228 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1230 return PicoCpuS68k.membase+pc;
\r
1235 void PicoMemSetupCD()
\r
1237 dprintf("PicoMemSetupCD()");
\r
1239 // Setup m68k memory callbacks:
\r
1240 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1241 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1242 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1243 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1244 PicoCpu.write8 =PicoWriteM68k8;
\r
1245 PicoCpu.write16=PicoWriteM68k16;
\r
1246 PicoCpu.write32=PicoWriteM68k32;
\r
1248 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1249 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1250 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1251 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1252 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1253 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1254 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1260 unsigned char PicoReadCD8w (unsigned int a) {
\r
1261 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1263 unsigned short PicoReadCD16w(unsigned int a) {
\r
1264 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1266 unsigned int PicoReadCD32w(unsigned int a) {
\r
1267 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1269 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1270 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1272 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1273 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1275 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1276 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1279 // these are allowed to access RAM
\r
1280 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1282 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1283 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1284 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1285 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1286 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1287 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1288 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1290 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1292 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1293 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1294 if((a&0xfc0000)==0x200000) { // word RAM
\r
1295 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1296 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1297 else if (a < 0x220000) {
\r
1298 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1299 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1302 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1304 return 0;//(u8) lastread_d;
\r
1306 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1308 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1309 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1310 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1311 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1312 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1313 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1314 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1316 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1318 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1319 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1320 if((a&0xfc0000)==0x200000) { // word RAM
\r
1321 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1322 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1323 else if (a < 0x220000) {
\r
1324 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1325 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1328 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1332 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1335 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1336 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1337 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1338 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1339 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1340 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1341 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1342 return (pm[0]<<16)|pm[1];
\r
1344 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1346 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1347 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1348 if((a&0xfc0000)==0x200000) { // word RAM
\r
1349 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1350 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1351 else if (a < 0x220000) {
\r
1352 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1353 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1354 return (pm[0]<<16)|pm[1];
\r
1357 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1361 #endif // EMU_M68K
\r