1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 typedef unsigned char u8;
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23 typedef unsigned short u16;
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24 typedef unsigned int u32;
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26 //#define __debug_io
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27 //#define __debug_io2
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29 //#define rdprintf dprintf
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30 #define rdprintf(...)
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31 //#define wrdprintf dprintf
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32 #define wrdprintf(...)
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34 // -----------------------------------------------------------------
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37 #define POLL_LIMIT 16
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38 #define POLL_CYCLES 124
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39 // int m68k_poll_addr, m68k_poll_cnt;
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40 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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42 #ifndef _ASM_CD_MEMORY_C
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43 static u32 m68k_reg_read16(u32 a)
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47 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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51 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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54 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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55 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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58 d = Pico_mcd->s68k_regs[4]<<8;
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61 d = *(u16 *)(Pico_mcd->bios + 0x72);
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64 d = Read_CDC_Host(0);
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67 dprintf("m68k FIXME: reserved read");
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70 d = Pico_mcd->m.timer_stopwatch >> 16;
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71 dprintf("m68k stopwatch timer read (%04x)", d);
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76 // comm flag/cmd/status (0xE-0x2F)
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77 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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81 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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85 // dprintf("ret = %04x", d);
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90 #ifndef _ASM_CD_MEMORY_C
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93 void m68k_reg_write8(u32 a, u32 d)
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96 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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101 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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105 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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106 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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107 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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108 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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109 SekResetS68k(); // S68k comes out of RESET or BRQ state
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110 Pico_mcd->m.state_flags&=~1;
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111 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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113 Pico_mcd->m.busreq = d;
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116 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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119 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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120 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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122 if ((dold>>6) != ((d>>6)&3))
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123 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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124 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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125 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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126 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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128 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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130 //dold &= ~2; // ??
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132 if ((d & 2) && !(dold & 2)) {
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133 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
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137 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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140 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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141 #ifdef USE_POLL_DETECT
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142 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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143 SekSetStopS68k(0); s68k_poll_adclk = 0;
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144 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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150 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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153 Pico_mcd->bios[0x72] = d;
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154 dprintf("hint vector set to %08x", PicoRead32(0x70));
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157 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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159 //dprintf("m68k: comm flag: %02x", d);
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160 Pico_mcd->s68k_regs[0xe] = d;
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161 #ifdef USE_POLL_DETECT
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162 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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163 SekSetStopS68k(0); s68k_poll_adclk = 0;
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164 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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170 if ((a&0xf0) == 0x10) {
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171 Pico_mcd->s68k_regs[a] = d;
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172 #ifdef USE_POLL_DETECT
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173 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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174 SekSetStopS68k(0); s68k_poll_adclk = 0;
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175 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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181 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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185 #define READ_FONT_DATA(basemask) \
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187 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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188 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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189 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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190 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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191 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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192 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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196 #ifndef _ASM_CD_MEMORY_C
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199 u32 s68k_reg_read16(u32 a)
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203 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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207 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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209 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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210 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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213 return CDC_Read_Reg();
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215 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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217 d = Pico_mcd->m.timer_stopwatch >> 16;
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218 dprintf("s68k stopwatch timer read (%04x)", d);
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221 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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222 return Pico_mcd->s68k_regs[31];
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223 case 0x34: // fader
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224 return 0; // no busy bit
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225 case 0x50: // font data (check: Lunar 2, Silpheed)
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226 READ_FONT_DATA(0x00100000);
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229 READ_FONT_DATA(0x00010000);
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232 READ_FONT_DATA(0x10000000);
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235 READ_FONT_DATA(0x01000000);
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239 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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241 if (a >= 0x0e && a < 0x30) goto poll_detect;
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246 #ifdef USE_POLL_DETECT
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247 // polling detection
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248 if (a == (s68k_poll_adclk&0xfe)) {
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249 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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250 if (clkdiff <= POLL_CYCLES) {
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252 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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253 if (s68k_poll_cnt > POLL_LIMIT) {
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255 //printf("%05i:%03i: s68k poll detected @ %06x, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, SekPcS68k, a);
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257 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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261 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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268 #ifndef _ASM_CD_MEMORY_C
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271 void s68k_reg_write8(u32 a, u32 d)
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273 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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275 // TODO: review against Gens
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276 // Warning: d might have upper bits set
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279 return; // only m68k can change WP
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281 int dold = Pico_mcd->s68k_regs[3];
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282 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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286 if ((d ^ dold) & 5) {
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287 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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288 #ifdef _ASM_CD_MEMORY_C
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292 #ifdef _ASM_CD_MEMORY_C
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293 if ((d ^ dold) & 0x1d)
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294 PicoMemResetCDdecode(d);
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297 dprintf("wram mode 2M->1M");
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298 wram_2M_to_1M(Pico_mcd->word_ram2M);
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302 dprintf("wram mode 1M->2M");
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303 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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305 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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307 wram_1M_to_2M(Pico_mcd->word_ram2M);
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308 #ifdef _ASM_CD_MEMORY_C
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314 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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319 dprintf("s68k CDC dest: %x", d&7);
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320 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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323 //dprintf("s68k CDC reg addr: %x", d&0xf);
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329 dprintf("s68k set CDC dma addr");
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333 dprintf("s68k set stopwatch timer");
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334 Pico_mcd->m.timer_stopwatch = 0;
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337 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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340 dprintf("s68k set int3 timer: %02x", d);
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341 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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343 case 0x33: // IRQ mask
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344 dprintf("s68k irq mask: %02x", d);
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345 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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346 CDD_Export_Status();
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349 case 0x34: // fader
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350 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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353 return; // d/m bit is unsetable
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355 u32 d_old = Pico_mcd->s68k_regs[0x37];
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356 Pico_mcd->s68k_regs[0x37] = d&7;
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357 if ((d&4) && !(d_old&4)) {
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358 CDD_Export_Status();
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363 Pico_mcd->s68k_regs[a] = (u8) d;
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364 CDD_Import_Command();
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368 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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370 dprintf("s68k FIXME: invalid write @ %02x?", a);
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374 Pico_mcd->s68k_regs[a] = (u8) d;
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378 #ifndef _ASM_CD_MEMORY_C
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379 static u32 OtherRead16End(u32 a, int realsize)
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383 if ((a&0xffffc0)==0xa12000) {
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384 d=m68k_reg_read16(a);
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388 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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395 static void OtherWrite8End(u32 a, u32 d, int realsize)
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397 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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399 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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403 #undef _ASM_MEMORY_C
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404 #include "../MemoryCmn.c"
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405 #include "cell_map.c"
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406 #endif // !def _ASM_CD_MEMORY_C
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408 // -----------------------------------------------------------------
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409 // Read Rom and read Ram
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411 //u8 PicoReadM68k8_(u32 a);
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412 #ifdef _ASM_CD_MEMORY_C
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413 u8 PicoReadM68k8(u32 a);
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415 static u8 PicoReadM68k8(u32 a)
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419 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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423 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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426 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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427 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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428 d = *(prg_bank+((a^1)&0x1ffff));
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433 if ((a&0xfc0000)==0x200000) {
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434 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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435 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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436 int bank = Pico_mcd->s68k_regs[3]&1;
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438 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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440 d = Pico_mcd->word_ram1M[bank][a^1];
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442 // allow access in any mode, like Gens does
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443 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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445 wrdprintf("ret = %02x", (u8)d);
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449 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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451 if ((a&0xffffc0)==0xa12000)
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452 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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454 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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456 if ((a&0xffffc0)==0xa12000)
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457 rdprintf("ret = %02x", (u8)d);
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462 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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469 #ifdef _ASM_CD_MEMORY_C
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470 u16 PicoReadM68k16(u32 a);
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472 static u16 PicoReadM68k16(u32 a)
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476 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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480 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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483 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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484 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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485 d = *(u16 *)(prg_bank+(a&0x1fffe));
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490 if ((a&0xfc0000)==0x200000) {
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491 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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492 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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493 int bank = Pico_mcd->s68k_regs[3]&1;
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495 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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497 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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499 // allow access in any mode, like Gens does
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500 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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502 wrdprintf("ret = %04x", d);
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506 if ((a&0xffffc0)==0xa12000)
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507 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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509 d = (u16)OtherRead16(a, 16);
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511 if ((a&0xffffc0)==0xa12000)
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512 rdprintf("ret = %04x", d);
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517 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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524 #ifdef _ASM_CD_MEMORY_C
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525 u32 PicoReadM68k32(u32 a);
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527 static u32 PicoReadM68k32(u32 a)
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531 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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535 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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538 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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539 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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540 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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541 d = (pm[0]<<16)|pm[1];
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546 if ((a&0xfc0000)==0x200000) {
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547 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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548 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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549 int bank = Pico_mcd->s68k_regs[3]&1;
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550 if (a >= 0x220000) { // cell arranged
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552 a1 = (a&2) | (cell_map(a >> 2) << 2);
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553 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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555 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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556 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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558 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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561 // allow access in any mode, like Gens does
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562 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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564 wrdprintf("ret = %08x", d);
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568 if ((a&0xffffc0)==0xa12000)
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569 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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571 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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573 if ((a&0xffffc0)==0xa12000)
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574 rdprintf("ret = %08x", d);
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578 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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585 // -----------------------------------------------------------------
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588 #ifdef _ASM_CD_MEMORY_C
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589 void PicoWriteM68k8(u32 a,u8 d);
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591 static void PicoWriteM68k8(u32 a,u8 d)
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594 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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596 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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597 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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600 if ((a&0xe00000)==0xe00000) { // Ram
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601 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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608 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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609 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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610 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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615 if ((a&0xfc0000)==0x200000) {
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616 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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617 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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618 int bank = Pico_mcd->s68k_regs[3]&1;
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620 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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622 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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624 // allow access in any mode, like Gens does
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625 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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630 if ((a&0xffffc0)==0xa12000)
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631 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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633 OtherWrite8(a,d,8);
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638 #ifdef _ASM_CD_MEMORY_C
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639 void PicoWriteM68k16(u32 a,u16 d);
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641 static void PicoWriteM68k16(u32 a,u16 d)
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644 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
646 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
648 if ((a&0xe00000)==0xe00000) { // Ram
\r
649 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
656 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
\r
657 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
658 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
663 if ((a&0xfc0000)==0x200000) {
\r
664 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
665 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
666 int bank = Pico_mcd->s68k_regs[3]&1;
\r
668 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
670 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
672 // allow access in any mode, like Gens does
\r
673 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
679 if ((a&0xffffc0)==0xa12000) {
\r
680 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
681 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
682 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
683 #ifdef USE_POLL_DETECT
\r
684 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
685 SekSetStopS68k(0); s68k_poll_adclk = -1;
\r
686 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
\r
691 m68k_reg_write8(a, d>>8);
\r
692 m68k_reg_write8(a+1,d&0xff);
\r
701 #ifdef _ASM_CD_MEMORY_C
\r
702 void PicoWriteM68k32(u32 a,u32 d);
\r
704 static void PicoWriteM68k32(u32 a,u32 d)
\r
707 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
710 if ((a&0xe00000)==0xe00000)
\r
713 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
714 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
721 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
\r
722 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
723 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
724 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
729 if ((a&0xfc0000)==0x200000) {
\r
730 if (d != 0) // don't log clears
\r
731 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
732 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
733 int bank = Pico_mcd->s68k_regs[3]&1;
\r
734 if (a >= 0x220000) { // cell arranged
\r
736 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
737 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
739 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
740 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
742 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
743 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
746 // allow access in any mode, like Gens does
\r
747 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
748 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
753 if ((a&0xffffc0)==0xa12000)
\r
754 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
756 OtherWrite16(a, (u16)(d>>16));
\r
757 OtherWrite16(a+2,(u16)d);
\r
762 // -----------------------------------------------------------------
\r
764 #ifdef _ASM_CD_MEMORY_C
\r
765 u8 PicoReadS68k8(u32 a);
\r
767 static u8 PicoReadS68k8(u32 a)
\r
775 d = *(Pico_mcd->prg_ram+(a^1));
\r
780 if ((a&0xfffe00) == 0xff8000) {
\r
782 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
783 if (a >= 0x58 && a < 0x68)
\r
784 d = gfx_cd_read(a&~1);
\r
785 else d = s68k_reg_read16(a&~1);
\r
786 if ((a&1)==0) d>>=8;
\r
787 rdprintf("ret = %02x", (u8)d);
\r
791 // word RAM (2M area)
\r
792 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
793 // test: batman returns
\r
794 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
795 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
796 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
797 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
798 if (a&1) d &= 0x0f;
\r
800 dprintf("FIXME: decode");
\r
802 // allow access in any mode, like Gens does
\r
803 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
805 wrdprintf("ret = %02x", (u8)d);
\r
809 // word RAM (1M area)
\r
810 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
812 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
813 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
814 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
815 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
816 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
817 wrdprintf("ret = %02x", (u8)d);
\r
822 if ((a&0xff8000)==0xff0000) {
\r
823 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
826 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
827 else if (a >= 0x20) {
\r
829 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
830 if (a & 2) d >>= 8;
\r
832 dprintf("ret = %02x", (u8)d);
\r
837 if ((a&0xff0000)==0xfe0000) {
\r
838 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
842 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
847 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
854 //u16 PicoReadS68k16_(u32 a);
\r
855 #ifdef _ASM_CD_MEMORY_C
\r
856 u16 PicoReadS68k16(u32 a);
\r
858 static u16 PicoReadS68k16(u32 a)
\r
866 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
871 if ((a&0xfffe00) == 0xff8000) {
\r
873 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
874 if (a >= 0x58 && a < 0x68)
\r
875 d = gfx_cd_read(a);
\r
876 else d = s68k_reg_read16(a);
\r
877 rdprintf("ret = %04x", d);
\r
881 // word RAM (2M area)
\r
882 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
883 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
884 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
885 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
886 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
887 d |= d << 4; d &= ~0xf0;
\r
888 dprintf("FIXME: decode");
\r
890 // allow access in any mode, like Gens does
\r
891 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
893 wrdprintf("ret = %04x", d);
\r
897 // word RAM (1M area)
\r
898 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
900 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
901 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
902 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
903 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
904 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
905 wrdprintf("ret = %04x", d);
\r
910 if ((a&0xff0000)==0xfe0000) {
\r
911 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
913 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
914 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
915 dprintf("ret = %04x", d);
\r
920 if ((a&0xff8000)==0xff0000) {
\r
921 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
924 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
925 else if (a >= 0x20) {
\r
927 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
928 if (a & 2) d >>= 8;
\r
930 dprintf("ret = %04x", d);
\r
934 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
939 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
946 #ifdef _ASM_CD_MEMORY_C
\r
947 u32 PicoReadS68k32(u32 a);
\r
949 static u32 PicoReadS68k32(u32 a)
\r
957 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
958 d = (pm[0]<<16)|pm[1];
\r
963 if ((a&0xfffe00) == 0xff8000) {
\r
965 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
966 if (a >= 0x58 && a < 0x68)
\r
967 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
968 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
969 rdprintf("ret = %08x", d);
\r
973 // word RAM (2M area)
\r
974 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
975 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
976 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
977 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
979 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
980 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
981 d |= d << 4; d &= 0x0f0f0f0f;
\r
982 dprintf("FIXME: decode");
\r
984 // allow access in any mode, like Gens does
\r
985 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
987 wrdprintf("ret = %08x", d);
\r
991 // word RAM (1M area)
\r
992 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
994 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
995 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
996 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
997 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
998 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
999 wrdprintf("ret = %08x", d);
\r
1004 if ((a&0xff8000)==0xff0000) {
\r
1005 dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1007 if (a >= 0x2000) {
\r
1009 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1010 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1011 } else if (a >= 0x20) {
\r
1015 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1016 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1018 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1019 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1022 dprintf("ret = %08x", d);
\r
1027 if ((a&0xff0000)==0xfe0000) {
\r
1028 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1029 a = (a>>1)&0x1fff;
\r
1030 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1031 d|= Pico_mcd->bram[a++] << 24;
\r
1032 d|= Pico_mcd->bram[a++];
\r
1033 d|= Pico_mcd->bram[a++] << 8;
\r
1034 dprintf("ret = %08x", d);
\r
1038 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1042 #ifdef __debug_io2
\r
1043 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1050 #ifndef _ASM_CD_MEMORY_C
\r
1051 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1052 static void decode_write8(u32 a, u8 d, int r3)
\r
1054 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1055 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1059 if (!(a&1)) d <<= 4;
\r
1061 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
1064 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1065 } else if (r3 > 8) {
\r
1066 if (d) goto do_it;
\r
1073 *pd = d | (*pd & oldmask);
\r
1077 static void decode_write16(u32 a, u16 d, int r3)
\r
1079 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1081 //if ((a & 0x3ffff) < 0x28000) return;
\r
1089 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1090 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1092 } else if (r3 > 8) {
\r
1094 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1095 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1101 //dprintf("FIXME: decode");
\r
1105 // -----------------------------------------------------------------
\r
1107 //void PicoWriteS68k8_(u32 a,u8 d);
\r
1108 //void PicoWriteS68k8__(u32 a,u8 d);
\r
1109 #ifdef _ASM_CD_MEMORY_C
\r
1110 void PicoWriteS68k8(u32 a,u8 d);
\r
1112 static void PicoWriteS68k8(u32 a,u8 d)
\r
1114 #ifdef __debug_io2
\r
1115 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1120 PicoWriteS68k8_(a, d);
\r
1121 /* if ((a&0xfc0000)!=0x080000) {
\r
1122 PicoWriteS68k8_(a, d);
\r
1125 printf("r3: %02x\n", Pico_mcd->s68k_regs[3]);
\r
1126 PicoWriteS68k8__(a,d);*/
\r
1131 if (a < 0x80000) {
\r
1132 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1138 if ((a&0xfffe00) == 0xff8000) {
\r
1140 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1141 if (a >= 0x58 && a < 0x68)
\r
1142 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1143 else s68k_reg_write8(a,d);
\r
1147 // word RAM (2M area)
\r
1148 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1149 int r3 = Pico_mcd->s68k_regs[3];
\r
1150 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1151 if (r3 & 4) { // 1M decode mode?
\r
1152 decode_write8(a, d, r3);
\r
1154 // allow access in any mode, like Gens does
\r
1155 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1160 // word RAM (1M area)
\r
1161 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1162 // Wing Commander tries to write here in wrong mode
\r
1165 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1166 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1167 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1168 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1169 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1174 if ((a&0xff8000)==0xff0000) {
\r
1177 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1178 else if (a < 0x12)
\r
1179 pcm_write(a>>1, d);
\r
1184 if ((a&0xff0000)==0xfe0000) {
\r
1185 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1190 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1195 #ifdef _ASM_CD_MEMORY_C
\r
1196 void PicoWriteS68k16(u32 a,u16 d);
\r
1198 static void PicoWriteS68k16(u32 a,u16 d)
\r
1200 #ifdef __debug_io2
\r
1201 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1207 if (a < 0x80000) {
\r
1208 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1213 if ((a&0xfffe00) == 0xff8000) {
\r
1215 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1216 if (a >= 0x58 && a < 0x68)
\r
1217 gfx_cd_write16(a, d);
\r
1219 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1220 Pico_mcd->s68k_regs[0xf] = d;
\r
1223 s68k_reg_write8(a, d>>8);
\r
1224 s68k_reg_write8(a+1,d&0xff);
\r
1229 // word RAM (2M area)
\r
1230 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1231 int r3 = Pico_mcd->s68k_regs[3];
\r
1232 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1233 if (r3 & 4) { // 1M decode mode?
\r
1234 decode_write16(a, d, r3);
\r
1236 // allow access in any mode, like Gens does
\r
1237 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1242 // word RAM (1M area)
\r
1243 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1246 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1247 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1248 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1249 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1250 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1255 if ((a&0xff8000)==0xff0000) {
\r
1258 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1259 else if (a < 0x12)
\r
1260 pcm_write(a>>1, d & 0xff);
\r
1265 if ((a&0xff0000)==0xfe0000) {
\r
1266 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1267 a = (a>>1)&0x1fff;
\r
1268 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1269 Pico_mcd->bram[a++] = d >> 8;
\r
1274 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1279 #ifdef _ASM_CD_MEMORY_C
\r
1280 void PicoWriteS68k32(u32 a,u32 d);
\r
1282 static void PicoWriteS68k32(u32 a,u32 d)
\r
1284 #ifdef __debug_io2
\r
1285 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1291 if (a < 0x80000) {
\r
1292 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1293 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1298 if ((a&0xfffe00) == 0xff8000) {
\r
1300 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1301 if (a >= 0x58 && a < 0x68) {
\r
1302 gfx_cd_write16(a, d>>16);
\r
1303 gfx_cd_write16(a+2, d&0xffff);
\r
1305 s68k_reg_write8(a, d>>24);
\r
1306 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1307 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1308 s68k_reg_write8(a+3, d &0xff);
\r
1313 // word RAM (2M area)
\r
1314 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1315 int r3 = Pico_mcd->s68k_regs[3];
\r
1316 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1317 if (r3 & 4) { // 1M decode mode?
\r
1318 decode_write16(a , d >> 16, r3);
\r
1319 decode_write16(a+2, d , r3);
\r
1321 // allow access in any mode, like Gens does
\r
1322 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1323 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1328 // word RAM (1M area)
\r
1329 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1333 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1334 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1335 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1336 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1337 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1338 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1343 if ((a&0xff8000)==0xff0000) {
\r
1345 if (a >= 0x2000) {
\r
1347 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1348 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1349 } else if (a < 0x12) {
\r
1351 pcm_write(a, (d>>16) & 0xff);
\r
1352 pcm_write(a+1, d & 0xff);
\r
1358 if ((a&0xff0000)==0xfe0000) {
\r
1359 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1360 a = (a>>1)&0x1fff;
\r
1361 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1362 Pico_mcd->bram[a++] = d >> 24;
\r
1363 Pico_mcd->bram[a++] = d;
\r
1364 Pico_mcd->bram[a++] = d >> 8;
\r
1369 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1374 // -----------------------------------------------------------------
\r
1377 #if defined(EMU_C68K)
\r
1378 static __inline int PicoMemBaseM68k(u32 pc)
\r
1380 if ((pc&0xe00000)==0xe00000)
\r
1381 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1384 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1386 if ((pc&0xfc0000)==0x200000)
\r
1388 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1389 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1390 if (pc < 0x220000) {
\r
1391 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1392 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1396 // Error - Program Counter is invalid
\r
1397 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1399 return (int)Pico_mcd->bios;
\r
1403 static u32 PicoCheckPcM68k(u32 pc)
\r
1405 pc-=PicoCpu.membase; // Get real pc
\r
1408 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1410 return PicoCpu.membase+pc;
\r
1414 static __inline int PicoMemBaseS68k(u32 pc)
\r
1416 if (pc < 0x80000) // PRG RAM
\r
1417 return (int)Pico_mcd->prg_ram;
\r
1419 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1420 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1422 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1423 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1424 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1427 // Error - Program Counter is invalid
\r
1428 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1430 return (int)Pico_mcd->prg_ram;
\r
1434 static u32 PicoCheckPcS68k(u32 pc)
\r
1436 pc-=PicoCpuS68k.membase; // Get real pc
\r
1439 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1441 return PicoCpuS68k.membase+pc;
\r
1446 void PicoMemSetupCD()
\r
1448 dprintf("PicoMemSetupCD()");
\r
1450 // Setup m68k memory callbacks:
\r
1451 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1452 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1453 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1454 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1455 PicoCpu.write8 =PicoWriteM68k8;
\r
1456 PicoCpu.write16=PicoWriteM68k16;
\r
1457 PicoCpu.write32=PicoWriteM68k32;
\r
1459 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1460 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1461 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1462 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1463 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1464 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1465 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1467 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1468 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1473 unsigned char PicoReadCD8w (unsigned int a) {
\r
1474 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1476 unsigned short PicoReadCD16w(unsigned int a) {
\r
1477 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1479 unsigned int PicoReadCD32w(unsigned int a) {
\r
1480 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1482 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1483 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1485 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1486 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1488 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1489 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1492 // these are allowed to access RAM
\r
1493 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1495 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1496 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1497 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1498 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1499 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1500 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1501 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1503 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1505 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1506 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1507 if((a&0xfc0000)==0x200000) { // word RAM
\r
1508 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1509 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1510 else if (a < 0x220000) {
\r
1511 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1512 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1515 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1517 return 0;//(u8) lastread_d;
\r
1519 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1521 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1522 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1523 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1524 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1525 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1526 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1527 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1529 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1531 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1532 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1533 if((a&0xfc0000)==0x200000) { // word RAM
\r
1534 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1535 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1536 else if (a < 0x220000) {
\r
1537 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1538 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1541 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1545 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1548 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1549 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1550 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1551 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1552 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1553 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1554 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1555 return (pm[0]<<16)|pm[1];
\r
1557 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1559 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1560 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1561 if((a&0xfc0000)==0x200000) { // word RAM
\r
1562 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1563 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1564 else if (a < 0x220000) {
\r
1565 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1566 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1567 return (pm[0]<<16)|pm[1];
\r
1570 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1574 #endif // EMU_M68K
\r