1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 typedef unsigned char u8;
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23 typedef unsigned short u16;
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24 typedef unsigned int u32;
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26 //#define __debug_io
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27 //#define __debug_io2
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29 //#define rdprintf dprintf
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30 #define rdprintf(...)
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31 //#define wrdprintf dprintf
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32 #define wrdprintf(...)
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34 // -----------------------------------------------------------------
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37 #ifndef _ASM_CD_MEMORY_C
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38 void PicoMemResetCD(int r3)
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43 #ifndef _ASM_CD_MEMORY_C
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44 static u32 m68k_reg_read16(u32 a)
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48 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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52 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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55 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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56 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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59 d = Pico_mcd->s68k_regs[4]<<8;
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62 d = *(u16 *)(Pico_mcd->bios + 0x72);
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65 d = Read_CDC_Host(0);
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68 dprintf("m68k FIXME: reserved read");
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71 d = Pico_mcd->m.timer_stopwatch >> 16;
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72 dprintf("m68k stopwatch timer read (%04x)", d);
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77 // comm flag/cmd/status (0xE-0x2F)
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78 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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82 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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86 // dprintf("ret = %04x", d);
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91 #ifndef _ASM_CD_MEMORY_C
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94 void m68k_reg_write8(u32 a, u32 d)
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97 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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102 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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106 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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107 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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108 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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109 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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110 SekResetS68k(); // S68k comes out of RESET or BRQ state
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111 Pico_mcd->m.state_flags&=~1;
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112 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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114 Pico_mcd->m.busreq = d;
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117 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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120 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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121 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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123 if ((dold>>6) != ((d>>6)&3))
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124 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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125 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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126 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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127 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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129 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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131 //dold &= ~2; // ??
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132 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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134 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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137 d |= Pico_mcd->s68k_regs[3]&0x1d;
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138 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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139 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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144 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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147 Pico_mcd->bios[0x72] = d;
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148 dprintf("hint vector set to %08x", PicoRead32(0x70));
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151 //dprintf("m68k: comm flag: %02x", d);
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152 Pico_mcd->s68k_regs[0xe] = d;
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156 if ((a&0xf0) == 0x10) {
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157 Pico_mcd->s68k_regs[a] = d;
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161 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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165 #define READ_FONT_DATA(basemask) \
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167 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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168 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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169 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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170 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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171 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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172 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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176 #ifndef _ASM_CD_MEMORY_C
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179 u32 s68k_reg_read16(u32 a)
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183 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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187 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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190 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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191 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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194 d = CDC_Read_Reg();
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197 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
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200 d = Pico_mcd->m.timer_stopwatch >> 16;
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201 dprintf("s68k stopwatch timer read (%04x)", d);
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204 dprintf("s68k int3 timer read (%02x%02x)", Pico_mcd->s68k_regs[30], Pico_mcd->s68k_regs[31]);
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206 case 0x34: // fader
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207 d = 0; // no busy bit
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209 case 0x50: // font data (check: Lunar 2, Silpheed)
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210 READ_FONT_DATA(0x00100000);
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213 READ_FONT_DATA(0x00010000);
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216 READ_FONT_DATA(0x10000000);
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219 READ_FONT_DATA(0x01000000);
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223 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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227 // dprintf("ret = %04x", d);
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232 #ifndef _ASM_CD_MEMORY_C
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235 void s68k_reg_write8(u32 a, u32 d)
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237 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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239 // TODO: review against Gens
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242 return; // only m68k can change WP
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244 int dold = Pico_mcd->s68k_regs[3];
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245 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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249 if ((d ^ dold) & 5) {
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250 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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251 #ifdef _ASM_CD_MEMORY_C
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256 dprintf("wram mode 2M->1M");
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257 wram_2M_to_1M(Pico_mcd->word_ram2M);
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261 dprintf("wram mode 1M->2M");
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262 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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264 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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266 wram_1M_to_2M(Pico_mcd->word_ram2M);
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267 #ifdef _ASM_CD_MEMORY_C
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273 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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278 dprintf("s68k CDC dest: %x", d&7);
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279 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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282 //dprintf("s68k CDC reg addr: %x", d&0xf);
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288 dprintf("s68k set CDC dma addr");
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292 dprintf("s68k set stopwatch timer");
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293 Pico_mcd->m.timer_stopwatch = 0;
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296 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
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297 Pico_mcd->m.timer_stopwatch = 0;
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300 dprintf("s68k set int3 timer: %02x", d);
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301 Pico_mcd->m.timer_int3 = d << 16;
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303 case 0x33: // IRQ mask
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304 dprintf("s68k irq mask: %02x", d);
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305 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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306 CDD_Export_Status();
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309 case 0x34: // fader
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310 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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313 return; // d/m bit is unsetable
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315 u32 d_old = Pico_mcd->s68k_regs[0x37];
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316 Pico_mcd->s68k_regs[0x37] = d&7;
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317 if ((d&4) && !(d_old&4)) {
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318 CDD_Export_Status();
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323 Pico_mcd->s68k_regs[a] = (u8) d;
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324 CDD_Import_Command();
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328 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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330 dprintf("s68k FIXME: invalid write @ %02x?", a);
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334 Pico_mcd->s68k_regs[a] = (u8) d;
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338 #ifndef _ASM_CD_MEMORY_C
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339 static u32 OtherRead16End(u32 a, int realsize)
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343 if ((a&0xffffc0)==0xa12000) {
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344 d=m68k_reg_read16(a);
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348 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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355 static void OtherWrite8End(u32 a, u32 d, int realsize)
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357 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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359 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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363 #undef _ASM_MEMORY_C
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364 #include "../MemoryCmn.c"
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365 #include "cell_map.c"
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366 #endif // !def _ASM_CD_MEMORY_C
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368 // -----------------------------------------------------------------
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369 // Read Rom and read Ram
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371 //u8 PicoReadM68k8_(u32 a);
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372 #ifdef _ASM_CD_MEMORY_C
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373 u8 PicoReadM68k8(u32 a);
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375 static u8 PicoReadM68k8(u32 a)
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379 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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383 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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386 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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387 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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388 d = *(prg_bank+((a^1)&0x1ffff));
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393 if ((a&0xfc0000)==0x200000) {
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394 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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395 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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396 int bank = Pico_mcd->s68k_regs[3]&1;
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398 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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400 d = Pico_mcd->word_ram1M[bank][a^1];
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402 // allow access in any mode, like Gens does
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403 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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405 wrdprintf("ret = %02x", (u8)d);
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409 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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411 if ((a&0xffffc0)==0xa12000)
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412 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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414 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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416 if ((a&0xffffc0)==0xa12000)
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417 rdprintf("ret = %02x", (u8)d);
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422 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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429 #ifdef _ASM_CD_MEMORY_C
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430 u16 PicoReadM68k16(u32 a);
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432 static u16 PicoReadM68k16(u32 a)
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436 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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440 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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443 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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444 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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445 d = *(u16 *)(prg_bank+(a&0x1fffe));
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450 if ((a&0xfc0000)==0x200000) {
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451 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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452 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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453 int bank = Pico_mcd->s68k_regs[3]&1;
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455 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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457 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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459 // allow access in any mode, like Gens does
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460 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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462 wrdprintf("ret = %04x", d);
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466 if ((a&0xffffc0)==0xa12000)
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467 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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469 d = (u16)OtherRead16(a, 16);
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471 if ((a&0xffffc0)==0xa12000)
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472 rdprintf("ret = %04x", d);
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477 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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484 #ifdef _ASM_CD_MEMORY_C
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485 u32 PicoReadM68k32(u32 a);
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487 static u32 PicoReadM68k32(u32 a)
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491 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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495 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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498 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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499 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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500 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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501 d = (pm[0]<<16)|pm[1];
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506 if ((a&0xfc0000)==0x200000) {
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507 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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508 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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509 int bank = Pico_mcd->s68k_regs[3]&1;
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510 if (a >= 0x220000) { // cell arranged
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512 a1 = (a&2) | (cell_map(a >> 2) << 2);
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513 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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515 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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516 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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518 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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521 // allow access in any mode, like Gens does
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522 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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524 wrdprintf("ret = %08x", d);
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528 if ((a&0xffffc0)==0xa12000)
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529 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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531 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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533 if ((a&0xffffc0)==0xa12000)
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534 rdprintf("ret = %08x", d);
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538 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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545 // -----------------------------------------------------------------
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548 #ifdef _ASM_CD_MEMORY_C
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549 void PicoWriteM68k8(u32 a,u8 d);
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551 static void PicoWriteM68k8(u32 a,u8 d)
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554 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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556 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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557 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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560 if ((a&0xe00000)==0xe00000) { // Ram
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561 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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568 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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569 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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570 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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575 if ((a&0xfc0000)==0x200000) {
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576 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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577 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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578 int bank = Pico_mcd->s68k_regs[3]&1;
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580 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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582 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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584 // allow access in any mode, like Gens does
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585 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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590 if ((a&0xffffc0)==0xa12000)
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591 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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593 OtherWrite8(a,d,8);
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598 #ifdef _ASM_CD_MEMORY_C
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599 void PicoWriteM68k16(u32 a,u16 d);
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601 static void PicoWriteM68k16(u32 a,u16 d)
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604 dprintf("w16: %06x, %04x", a&0xffffff, d);
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606 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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608 if ((a&0xe00000)==0xe00000) { // Ram
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609 *(u16 *)(Pico.ram+(a&0xfffe))=d;
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616 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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617 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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618 *(u16 *)(prg_bank+(a&0x1fffe))=d;
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623 if ((a&0xfc0000)==0x200000) {
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624 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
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625 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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626 int bank = Pico_mcd->s68k_regs[3]&1;
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628 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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630 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
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632 // allow access in any mode, like Gens does
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633 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
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638 if ((a&0xffffc0)==0xa12000)
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639 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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646 #ifdef _ASM_CD_MEMORY_C
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647 void PicoWriteM68k32(u32 a,u32 d);
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649 static void PicoWriteM68k32(u32 a,u32 d)
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652 dprintf("w32: %06x, %08x", a&0xffffff, d);
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655 if ((a&0xe00000)==0xe00000)
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658 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
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659 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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666 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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667 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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668 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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669 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
674 if ((a&0xfc0000)==0x200000) {
\r
675 if (d != 0) // don't log clears
\r
676 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
677 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
678 int bank = Pico_mcd->s68k_regs[3]&1;
\r
679 if (a >= 0x220000) { // cell arranged
\r
681 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
682 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
684 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
685 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
687 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
688 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
691 // allow access in any mode, like Gens does
\r
692 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
693 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
698 if ((a&0xffffc0)==0xa12000)
\r
699 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
701 OtherWrite16(a, (u16)(d>>16));
\r
702 OtherWrite16(a+2,(u16)d);
\r
707 // -----------------------------------------------------------------
\r
709 #ifdef _ASM_CD_MEMORY_C
\r
710 u8 PicoReadS68k8(u32 a);
\r
712 static u8 PicoReadS68k8(u32 a)
\r
720 d = *(Pico_mcd->prg_ram+(a^1));
\r
725 if ((a&0xfffe00) == 0xff8000) {
\r
727 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
728 if (a >= 0x58 && a < 0x68)
\r
729 d = gfx_cd_read(a&~1);
\r
730 else d = s68k_reg_read16(a&~1);
\r
731 if ((a&1)==0) d>>=8;
\r
732 rdprintf("ret = %02x", (u8)d);
\r
736 // word RAM (2M area)
\r
737 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
738 // test: batman returns
\r
739 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
740 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
741 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
742 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
743 if (a&1) d &= 0x0f;
\r
745 dprintf("FIXME: decode");
\r
747 // allow access in any mode, like Gens does
\r
748 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
750 wrdprintf("ret = %02x", (u8)d);
\r
754 // word RAM (1M area)
\r
755 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
757 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
758 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
759 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
760 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
761 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
762 wrdprintf("ret = %02x", (u8)d);
\r
767 if ((a&0xff8000)==0xff0000) {
\r
768 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
771 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
772 else if (a >= 0x20) {
\r
774 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
775 if (a & 2) d >>= 8;
\r
777 dprintf("ret = %02x", (u8)d);
\r
782 if ((a&0xff0000)==0xfe0000) {
\r
783 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
787 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
792 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
799 //u16 PicoReadS68k16_(u32 a);
\r
800 #ifdef _ASM_CD_MEMORY_C
\r
801 u16 PicoReadS68k16(u32 a);
\r
803 static u16 PicoReadS68k16(u32 a)
\r
811 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
816 if ((a&0xfffe00) == 0xff8000) {
\r
818 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
819 if (a >= 0x58 && a < 0x68)
\r
820 d = gfx_cd_read(a);
\r
821 else d = s68k_reg_read16(a);
\r
822 rdprintf("ret = %04x", d);
\r
826 // word RAM (2M area)
\r
827 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
828 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
829 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
830 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
831 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
832 d |= d << 4; d &= ~0xf0;
\r
833 dprintf("FIXME: decode");
\r
835 // allow access in any mode, like Gens does
\r
836 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
838 wrdprintf("ret = %04x", d);
\r
842 // word RAM (1M area)
\r
843 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
845 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
846 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
847 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
848 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
849 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
850 wrdprintf("ret = %04x", d);
\r
855 if ((a&0xff0000)==0xfe0000) {
\r
856 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
858 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
859 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
860 dprintf("ret = %04x", d);
\r
865 if ((a&0xff8000)==0xff0000) {
\r
866 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
869 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
870 else if (a >= 0x20) {
\r
872 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
873 if (a & 2) d >>= 8;
\r
875 dprintf("ret = %04x", d);
\r
879 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
884 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
891 #ifdef _ASM_CD_MEMORY_C
\r
892 u32 PicoReadS68k32(u32 a);
\r
894 static u32 PicoReadS68k32(u32 a)
\r
902 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
903 d = (pm[0]<<16)|pm[1];
\r
908 if ((a&0xfffe00) == 0xff8000) {
\r
910 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
911 if (a >= 0x58 && a < 0x68)
\r
912 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
913 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
914 rdprintf("ret = %08x", d);
\r
918 // word RAM (2M area)
\r
919 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
920 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
921 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
922 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
924 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
925 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
926 d |= d << 4; d &= 0x0f0f0f0f;
\r
927 dprintf("FIXME: decode");
\r
929 // allow access in any mode, like Gens does
\r
930 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
932 wrdprintf("ret = %08x", d);
\r
936 // word RAM (1M area)
\r
937 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
939 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
940 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
941 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
942 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
943 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
944 wrdprintf("ret = %08x", d);
\r
949 if ((a&0xff8000)==0xff0000) {
\r
950 dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
954 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
955 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
956 } else if (a >= 0x20) {
\r
960 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
961 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
963 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
964 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
967 dprintf("ret = %08x", d);
\r
972 if ((a&0xff0000)==0xfe0000) {
\r
973 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
975 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
976 d|= Pico_mcd->bram[a++] << 24;
\r
977 d|= Pico_mcd->bram[a++];
\r
978 d|= Pico_mcd->bram[a++] << 8;
\r
979 dprintf("ret = %08x", d);
\r
983 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
988 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
995 /* check: jaguar xj 220 (draws entire world using decode) */
\r
996 static void decode_write8(u32 a, u8 d, int r3)
\r
998 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
999 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1003 if (!(a&1)) d <<= 4;
\r
1005 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
1008 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1009 } else if (r3 > 8) {
\r
1010 if (d) goto do_it;
\r
1017 *pd = d | (*pd & oldmask);
\r
1021 static void decode_write16(u32 a, u16 d, int r3)
\r
1023 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1025 //if ((a & 0x3ffff) < 0x28000) return;
\r
1033 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1034 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1036 } else if (r3 > 8) {
\r
1038 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1039 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1045 //dprintf("FIXME: decode");
\r
1049 // -----------------------------------------------------------------
\r
1051 #ifdef _ASM_CD_MEMORY_C
\r
1052 void PicoWriteS68k8(u32 a,u8 d);
\r
1054 static void PicoWriteS68k8(u32 a,u8 d)
\r
1056 #ifdef __debug_io2
\r
1057 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1063 if (a < 0x80000) {
\r
1064 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1070 if ((a&0xfffe00) == 0xff8000) {
\r
1072 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1073 if (a >= 0x58 && a < 0x68)
\r
1074 gfx_cd_write(a&~1, (d<<8)|d);
\r
1075 else s68k_reg_write8(a,d);
\r
1079 // word RAM (2M area)
\r
1080 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1081 int r3 = Pico_mcd->s68k_regs[3];
\r
1082 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1083 if (r3 & 4) { // 1M decode mode?
\r
1084 decode_write8(a, d, r3);
\r
1086 // allow access in any mode, like Gens does
\r
1087 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1092 // word RAM (1M area)
\r
1093 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1094 // Wing Commander tries to write here in wrong mode
\r
1097 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1098 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1099 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1100 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1101 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1106 if ((a&0xff8000)==0xff0000) {
\r
1109 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1110 else if (a < 0x12)
\r
1111 pcm_write(a>>1, d);
\r
1116 if ((a&0xff0000)==0xfe0000) {
\r
1117 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1122 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1127 #ifdef _ASM_CD_MEMORY_C
\r
1128 void PicoWriteS68k16(u32 a,u16 d);
\r
1130 static void PicoWriteS68k16(u32 a,u16 d)
\r
1132 #ifdef __debug_io2
\r
1133 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1139 if (a < 0x80000) {
\r
1140 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1145 if ((a&0xfffe00) == 0xff8000) {
\r
1147 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1148 if (a >= 0x58 && a < 0x68)
\r
1149 gfx_cd_write(a, d);
\r
1151 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1152 Pico_mcd->s68k_regs[0xf] = d;
\r
1155 s68k_reg_write8(a, d>>8);
\r
1156 s68k_reg_write8(a+1,d&0xff);
\r
1161 // word RAM (2M area)
\r
1162 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1163 int r3 = Pico_mcd->s68k_regs[3];
\r
1164 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1165 if (r3 & 4) { // 1M decode mode?
\r
1166 decode_write16(a, d, r3);
\r
1168 // allow access in any mode, like Gens does
\r
1169 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1174 // word RAM (1M area)
\r
1175 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1178 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1179 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1180 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1181 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1182 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1187 if ((a&0xff8000)==0xff0000) {
\r
1190 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1191 else if (a < 0x12)
\r
1192 pcm_write(a>>1, d & 0xff);
\r
1197 if ((a&0xff0000)==0xfe0000) {
\r
1198 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1199 a = (a>>1)&0x1fff;
\r
1200 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1201 Pico_mcd->bram[a++] = d >> 8;
\r
1206 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1211 #ifdef _ASM_CD_MEMORY_C
\r
1212 void PicoWriteS68k32(u32 a,u32 d);
\r
1214 static void PicoWriteS68k32(u32 a,u32 d)
\r
1216 #ifdef __debug_io2
\r
1217 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1223 if (a < 0x80000) {
\r
1224 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1225 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1230 if ((a&0xfffe00) == 0xff8000) {
\r
1232 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1233 if (a >= 0x58 && a < 0x68) {
\r
1234 gfx_cd_write(a, d>>16);
\r
1235 gfx_cd_write(a+2, d&0xffff);
\r
1237 s68k_reg_write8(a, d>>24);
\r
1238 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1239 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1240 s68k_reg_write8(a+3, d &0xff);
\r
1245 // word RAM (2M area)
\r
1246 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1247 int r3 = Pico_mcd->s68k_regs[3];
\r
1248 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1249 if (r3 & 4) { // 1M decode mode?
\r
1250 decode_write16(a , d >> 16, r3);
\r
1251 decode_write16(a+2, d , r3);
\r
1253 // allow access in any mode, like Gens does
\r
1254 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1255 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1260 // word RAM (1M area)
\r
1261 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1265 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1266 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1267 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1268 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1269 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1270 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1275 if ((a&0xff8000)==0xff0000) {
\r
1277 if (a >= 0x2000) {
\r
1279 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1280 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1281 } else if (a < 0x12) {
\r
1283 pcm_write(a, (d>>16) & 0xff);
\r
1284 pcm_write(a+1, d & 0xff);
\r
1290 if ((a&0xff0000)==0xfe0000) {
\r
1291 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1292 a = (a>>1)&0x1fff;
\r
1293 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1294 Pico_mcd->bram[a++] = d >> 24;
\r
1295 Pico_mcd->bram[a++] = d;
\r
1296 Pico_mcd->bram[a++] = d >> 8;
\r
1301 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1306 // -----------------------------------------------------------------
\r
1309 #if defined(EMU_C68K)
\r
1310 static __inline int PicoMemBaseM68k(u32 pc)
\r
1312 if ((pc&0xe00000)==0xe00000)
\r
1313 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1316 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1318 if ((pc&0xfc0000)==0x200000)
\r
1320 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1321 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1322 if (pc < 0x220000) {
\r
1323 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1324 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1328 // Error - Program Counter is invalid
\r
1329 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1331 return (int)Pico_mcd->bios;
\r
1335 static u32 PicoCheckPcM68k(u32 pc)
\r
1337 pc-=PicoCpu.membase; // Get real pc
\r
1340 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1342 return PicoCpu.membase+pc;
\r
1346 static __inline int PicoMemBaseS68k(u32 pc)
\r
1348 if (pc < 0x80000) // PRG RAM
\r
1349 return (int)Pico_mcd->prg_ram;
\r
1351 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1352 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1354 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1355 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1356 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1359 // Error - Program Counter is invalid
\r
1360 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1362 return (int)Pico_mcd->prg_ram;
\r
1366 static u32 PicoCheckPcS68k(u32 pc)
\r
1368 pc-=PicoCpuS68k.membase; // Get real pc
\r
1371 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1373 return PicoCpuS68k.membase+pc;
\r
1378 void PicoMemSetupCD()
\r
1380 dprintf("PicoMemSetupCD()");
\r
1382 // Setup m68k memory callbacks:
\r
1383 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1384 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1385 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1386 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1387 PicoCpu.write8 =PicoWriteM68k8;
\r
1388 PicoCpu.write16=PicoWriteM68k16;
\r
1389 PicoCpu.write32=PicoWriteM68k32;
\r
1391 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1392 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1393 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1394 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1395 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1396 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1397 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1403 unsigned char PicoReadCD8w (unsigned int a) {
\r
1404 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1406 unsigned short PicoReadCD16w(unsigned int a) {
\r
1407 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1409 unsigned int PicoReadCD32w(unsigned int a) {
\r
1410 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1412 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1413 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1415 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1416 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1418 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1419 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1422 // these are allowed to access RAM
\r
1423 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1425 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1426 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1427 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1428 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1429 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1430 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1431 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1433 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1435 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1436 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1437 if((a&0xfc0000)==0x200000) { // word RAM
\r
1438 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1439 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1440 else if (a < 0x220000) {
\r
1441 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1442 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1445 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1447 return 0;//(u8) lastread_d;
\r
1449 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1451 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1452 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1453 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1454 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1455 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1456 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1457 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1459 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1461 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1462 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1463 if((a&0xfc0000)==0x200000) { // word RAM
\r
1464 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1465 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1466 else if (a < 0x220000) {
\r
1467 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1468 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1471 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1475 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1478 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1479 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1480 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1481 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1482 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1483 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1484 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1485 return (pm[0]<<16)|pm[1];
\r
1487 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1489 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1490 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1491 if((a&0xfc0000)==0x200000) { // word RAM
\r
1492 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1493 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1494 else if (a < 0x220000) {
\r
1495 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1496 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1497 return (pm[0]<<16)|pm[1];
\r
1500 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1504 #endif // EMU_M68K
\r