1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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19 typedef unsigned char u8;
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20 typedef unsigned short u16;
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21 typedef unsigned int u32;
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23 //#define __debug_io
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24 //#define __debug_io2
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26 // -----------------------------------------------------------------
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28 // extern m68ki_cpu_core m68ki_cpu;
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30 extern int counter75hz;
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33 static u32 m68k_reg_read16(u32 a, int realsize)
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37 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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41 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m68k_regs[1]; // here IFL2 is always 0, just like in Gens
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44 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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45 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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48 dprintf("m68k host data read");
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49 d = Read_CDC_Host(0);
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52 dprintf("m68k stopwatch read");
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57 d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1];
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62 // comm flag/cmd/status (0xE-0x2F)
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63 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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67 dprintf("m68k_regs invalid read @ %02x", a);
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71 // dprintf("ret = %04x", d);
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75 static void m68k_reg_write8(u32 a, u32 d, int realsize)
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78 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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83 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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87 if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset
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88 if ( (Pico_mcd->m68k_regs[1]&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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89 if ( (Pico_mcd->m68k_regs[1]&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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90 if (/*!(Pico_mcd->m68k_regs[1]&1) &&*/ (PicoMCD&2) && (d&3)==1) {
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91 SekResetS68k(); // S68k comes out of RESET or BRQ state
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93 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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97 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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100 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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102 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
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103 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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104 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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105 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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106 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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107 d |= Pico_mcd->s68k_regs[3]&0x1d;
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108 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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109 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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112 //dprintf("m68k: comm flag: %02x", d);
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114 //dprintf("s68k @ %06x", SekPcS68k);
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116 Pico_mcd->s68k_regs[0xe] = d;
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121 Pico_mcd->m68k_regs[a] = (u8) d;
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125 if ((a&0xf0) == 0x10) {
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126 Pico_mcd->s68k_regs[a] = d;
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130 if (a >= 0x20 || (a >= 0xa && a <= 0xd) || a == 0x0f)
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131 dprintf("m68k: invalid write?");
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136 static u32 s68k_reg_read16(u32 a, int realsize)
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141 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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145 d = 1; goto end; // ver = 0, not in reset state
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147 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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148 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
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151 d = CDC_Read_Reg();
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154 dprintf("s68k host data read");
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155 d = Read_CDC_Host(1);
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158 dprintf("s68k stopwatch read");
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160 case 0x34: // fader
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161 d = 0; // no busy bit
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165 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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169 // dprintf("ret = %04x", d);
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174 static void s68k_reg_write8(u32 a, u32 d, int realsize)
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177 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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179 // TODO: review against Gens
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182 return; // only m68k can change WP
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184 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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187 d |= Pico_mcd->s68k_regs[3]&0xc2;
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188 if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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190 d |= Pico_mcd->s68k_regs[3]&0xc3;
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191 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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195 dprintf("s68k CDC dest: %x", d&7);
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196 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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199 dprintf("s68k CDC reg addr: %x", d&0xf);
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205 dprintf("s68k set CDC dma addr");
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207 case 0x33: // IRQ mask
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208 dprintf("s68k irq mask: %02x", d);
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209 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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210 CDD_Export_Status();
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211 // counter75hz = 0; // ???
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214 case 0x34: // fader
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215 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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218 return; // d/m bit is unsetable
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220 u32 d_old = Pico_mcd->s68k_regs[0x37];
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221 Pico_mcd->s68k_regs[0x37] = d&7;
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222 if ((d&4) && !(d_old&4)) {
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223 CDD_Export_Status();
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224 // counter75hz = 0; // ???
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229 Pico_mcd->s68k_regs[a] = (u8) d;
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230 CDD_Import_Command();
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234 if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))
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236 dprintf("m68k: invalid write @ %02x?", a);
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240 Pico_mcd->s68k_regs[a] = (u8) d;
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247 static int PadRead(int i)
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249 int pad=0,value=0,TH;
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250 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
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251 TH=Pico.ioports[i+1]&0x40;
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253 if(PicoOpt & 0x20) { // 6 button gamepad enabled
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254 int phase = Pico.m.padTHPhase[i];
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256 if(phase == 2 && !TH) {
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257 value=(pad&0xc0)>>2; // ?0SA 0000
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259 } else if(phase == 3 && TH) {
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260 value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
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262 } else if(phase == 3 && !TH) {
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263 value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
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268 if(TH) value=(pad&0x3f); // ?1CB RLDU
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269 else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
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273 // orr the bits, which are set as output
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274 value |= Pico.ioports[i+1]&Pico.ioports[i+4];
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276 return value; // will mirror later
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279 static u8 z80Read8(u32 a)
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281 if(Pico.m.z80Run&1) return 0;
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286 // Z80 disabled, do some faking
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287 static u8 zerosent = 0;
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288 if(a == Pico.m.z80_lastaddr) { // probably polling something
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289 u8 d = Pico.m.z80_fakeval;
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290 if((d & 0xf) == 0xf && !zerosent) {
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291 d = 0; zerosent = 1;
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293 Pico.m.z80_fakeval++;
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298 Pico.m.z80_fakeval = 0;
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302 Pico.m.z80_lastaddr = (u16) a;
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303 return Pico.zram[a];
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307 // for nonstandard reads
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308 static u32 UnusualRead16(u32 a, int realsize)
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312 dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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315 dprintf("ret = %04x", d);
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319 static u32 OtherRead16(u32 a, int realsize)
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323 if ((a&0xff0000)==0xa00000) {
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324 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
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325 if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled
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326 d=0xffff; goto end;
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328 if ((a&0xffffe0)==0xa10000) { // I/O ports
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331 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
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332 case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
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333 case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
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334 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
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339 // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
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340 if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }
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342 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
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344 if ((a&0xffffc0)==0xa12000) {
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345 d=m68k_reg_read16(a, realsize);
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349 d = UnusualRead16(a, realsize);
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355 //extern UINT32 mz80GetRegisterValue(void *, UINT32);
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357 static void OtherWrite8(u32 a,u32 d,int realsize)
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359 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
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360 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
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361 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
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362 if ((a&0xffffe0)==0xa10000) { // I/O ports
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364 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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367 Pico.m.padDelay[0] = 0;
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368 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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371 Pico.m.padDelay[1] = 0;
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372 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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375 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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379 extern int z80startCycle, z80stopCycle;
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380 //int lineCycles=(488-SekCyclesLeft)&0x1ff;
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383 // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
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384 if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);
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385 z80stopCycle = SekCyclesDone();
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386 //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()
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388 z80startCycle = SekCyclesDone();
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389 //if(Pico.m.scanline != -1)
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390 //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;
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392 //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);
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393 Pico.m.z80Run=(u8)d; return;
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395 if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }
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397 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
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399 Pico.m.z80_bank68k>>=1;
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400 Pico.m.z80_bank68k|=(d&1)<<8;
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401 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
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405 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored
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407 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d, realsize); return; }
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409 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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412 static void OtherWrite16(u32 a,u32 d)
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414 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
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415 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
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417 if ((a&0xffffe0)==0xa10000) { // I/O ports
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419 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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422 Pico.m.padDelay[0] = 0;
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423 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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426 Pico.m.padDelay[1] = 0;
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427 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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430 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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433 if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
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434 if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }
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436 OtherWrite8(a, d>>8, 16);
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437 OtherWrite8(a+1,d&0xff, 16);
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440 // -----------------------------------------------------------------
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441 // Read Rom and read Ram
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443 u8 PicoReadM68k8(u32 a)
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447 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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451 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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454 if ((a&0xfe0000)==0x020000) {
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455 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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456 d = *(prg_bank+((a^1)&0x1ffff));
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461 if ((a&0xfc0000)==0x200000) {
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462 dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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463 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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464 if (a >= 0x220000) {
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467 a=((a&0x1fffe)<<1)|(a&1);
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468 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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469 d = Pico_mcd->word_ram[a^1];
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472 // allow access in any mode, like Gens does
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473 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
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475 dprintf("ret = %02x", (u8)d);
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479 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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481 //if ((a&0xffffc0)==0xa12000)
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482 // dprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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484 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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486 //if ((a&0xffffc0)==0xa12000)
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487 // dprintf("ret = %02x", (u8)d);
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492 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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497 u16 PicoReadM68k16(u32 a)
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501 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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505 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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508 if ((a&0xfe0000)==0x020000) {
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509 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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510 d = *(u16 *)(prg_bank+(a&0x1fffe));
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515 if ((a&0xfc0000)==0x200000) {
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516 dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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517 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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518 if (a >= 0x220000) {
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521 a=((a&0x1fffe)<<1);
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522 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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523 d = *(u16 *)(Pico_mcd->word_ram+a);
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526 // allow access in any mode, like Gens does
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527 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
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529 dprintf("ret = %04x", d);
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533 //if ((a&0xffffc0)==0xa12000)
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534 // dprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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536 d = (u16)OtherRead16(a, 16);
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538 //if ((a&0xffffc0)==0xa12000)
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539 // dprintf("ret = %04x", d);
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544 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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549 u32 PicoReadM68k32(u32 a)
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553 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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557 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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560 if ((a&0xfe0000)==0x020000) {
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561 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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562 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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563 d = (pm[0]<<16)|pm[1];
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568 if ((a&0xfc0000)==0x200000) {
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569 dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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570 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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571 if (a >= 0x220000) {
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575 a=((a&0x1fffe)<<1);
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576 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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577 pm=(u16 *)(Pico_mcd->word_ram+a);
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578 d = (pm[0]<<16)|pm[1];
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581 // allow access in any mode, like Gens does
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582 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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584 dprintf("ret = %08x", d);
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588 //if ((a&0xffffc0)==0xa12000)
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589 // dprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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591 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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593 //if ((a&0xffffc0)==0xa12000)
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594 // dprintf("ret = %08x", d);
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598 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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603 // -----------------------------------------------------------------
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606 void PicoWriteM68k8(u32 a,u8 d)
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609 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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611 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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612 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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615 if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram
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620 if ((a&0xfe0000)==0x020000) {
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621 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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622 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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627 if ((a&0xfc0000)==0x200000) {
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628 dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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629 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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630 if (a >= 0x220000) {
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633 a=((a&0x1fffe)<<1)|(a&1);
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634 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
635 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
\r
638 // allow access in any mode, like Gens does
\r
639 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
\r
644 //if ((a&0xffffc0)==0xa12000)
\r
645 // dprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
647 OtherWrite8(a,d,8);
\r
650 void PicoWriteM68k16(u32 a,u16 d)
\r
653 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
655 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
657 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram
\r
662 if ((a&0xfe0000)==0x020000) {
\r
663 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
664 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
669 if ((a&0xfc0000)==0x200000) {
\r
670 dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
671 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
672 if (a >= 0x220000) {
\r
675 a=((a&0x1fffe)<<1);
\r
676 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
677 *(u16 *)(Pico_mcd->word_ram+a)=d;
\r
680 // allow access in any mode, like Gens does
\r
681 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
686 //if ((a&0xffffc0)==0xa12000)
\r
687 // dprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
692 void PicoWriteM68k32(u32 a,u32 d)
\r
695 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
698 if ((a&0xe00000)==0xe00000)
\r
701 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
702 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
709 if ((a&0xfe0000)==0x020000) {
\r
710 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
711 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
712 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
717 if ((a&0xfc0000)==0x200000) {
\r
718 if (d != 0) // don't log clears
\r
719 dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
720 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
721 if (a >= 0x220000) {
\r
725 a=((a&0x1fffe)<<1);
\r
726 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
727 pm=(u16 *)(Pico_mcd->word_ram+a);
\r
728 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
731 // allow access in any mode, like Gens does
\r
732 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
733 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
738 //if ((a&0xffffc0)==0xa12000)
\r
739 // dprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
741 OtherWrite16(a, (u16)(d>>16));
\r
742 OtherWrite16(a+2,(u16)d);
\r
746 // -----------------------------------------------------------------
\r
749 u8 PicoReadS68k8(u32 a)
\r
757 d = *(Pico_mcd->prg_ram+(a^1));
\r
762 if ((a&0xfffe00) == 0xff8000) {
\r
763 //dprintf("s68k_regs r8: [%02x] @ %06x", a&0x1ff, SekPcS68k);
\r
764 d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
\r
765 //dprintf("ret = %02x", (u8)d);
\r
769 // word RAM (2M area)
\r
770 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
771 dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc);
\r
772 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
774 dprintf("(decode)");
\r
776 // allow access in any mode, like Gens does
\r
777 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
\r
779 dprintf("ret = %02x", (u8)d);
\r
783 // word RAM (1M area)
\r
784 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
785 dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc);
\r
786 a=((a&0x1fffe)<<1)|(a&1);
\r
787 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
788 d = Pico_mcd->word_ram[a^1];
\r
789 dprintf("ret = %02x", (u8)d);
\r
793 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
798 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
803 u16 PicoReadS68k16(u32 a)
\r
811 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
816 if ((a&0xfffe00) == 0xff8000) {
\r
817 //dprintf("s68k_regs r16: [%02x] @ %06x", a&0x1fe, SekPcS68k);
\r
818 d = s68k_reg_read16(a, 16);
\r
819 //dprintf("ret = %04x", d);
\r
823 // word RAM (2M area)
\r
824 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
825 dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc);
\r
826 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
828 dprintf("(decode)");
\r
830 // allow access in any mode, like Gens does
\r
831 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
833 dprintf("ret = %04x", (u8)d);
\r
837 // word RAM (1M area)
\r
838 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
839 dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc);
\r
840 a=((a&0x1fffe)<<1);
\r
841 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
842 d = *(u16 *)(Pico_mcd->word_ram+a);
\r
843 dprintf("ret = %04x", (u8)d);
\r
847 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
852 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
857 u32 PicoReadS68k32(u32 a)
\r
865 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
866 d = (pm[0]<<16)|pm[1];
\r
871 if ((a&0xfffe00) == 0xff8000) {
\r
872 //dprintf("s68k_regs r32: [%02x] @ %06x", a&0x1fe, SekPcS68k);
\r
873 d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);
\r
874 //dprintf("ret = %08x", d);
\r
878 // word RAM (2M area)
\r
879 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
880 dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc);
\r
881 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
883 dprintf("(decode)");
\r
885 // allow access in any mode, like Gens does
\r
886 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
888 dprintf("ret = %08x", (u8)d);
\r
892 // word RAM (1M area)
\r
893 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
895 dprintf("s68k_wram1M 32: [%06x] @%06x", a, SekPc);
\r
896 a=((a&0x1fffe)<<1);
\r
897 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
898 pm=(u16 *)(Pico_mcd->word_ram+a);
\r
899 d = (pm[0]<<16)|pm[1];
\r
900 dprintf("ret = %08x", (u8)d);
\r
904 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
909 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
914 // -----------------------------------------------------------------
\r
916 void PicoWriteS68k8(u32 a,u8 d)
\r
919 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
926 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
931 if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack
\r
935 if ((a&0xfffe00) == 0xff8000) {
\r
936 //dprintf("s68k_regs w8: [%02x] %02x @ %06x", a&0x1ff, d, SekPcS68k);
\r
937 s68k_reg_write8(a,d,8);
\r
941 // word RAM (2M area)
\r
942 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
943 dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc);
\r
944 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
946 dprintf("(decode)");
\r
948 // allow access in any mode, like Gens does
\r
949 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
\r
954 // word RAM (1M area)
\r
955 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
957 dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc);
\r
958 a=((a&0x1fffe)<<1)|(a&1);
\r
959 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
960 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
\r
964 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
967 void PicoWriteS68k16(u32 a,u16 d)
\r
970 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
977 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
982 if ((a&0xfffe00) == 0xff8000) {
\r
983 //dprintf("s68k_regs w16: [%02x] %04x @ %06x", a&0x1ff, d, SekPcS68k);
\r
984 s68k_reg_write8(a, d>>8, 16);
\r
985 s68k_reg_write8(a+1,d&0xff, 16);
\r
989 // word RAM (2M area)
\r
990 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
991 dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc);
\r
992 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
994 dprintf("(decode)");
\r
996 // allow access in any mode, like Gens does
\r
997 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
1002 // word RAM (1M area)
\r
1003 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1005 dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc);
\r
1006 a=((a&0x1fffe)<<1);
\r
1007 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1008 *(u16 *)(Pico_mcd->word_ram+a)=d;
\r
1012 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1015 void PicoWriteS68k32(u32 a,u32 d)
\r
1017 #ifdef __debug_io2
\r
1018 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1024 if (a < 0x80000) {
\r
1025 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1026 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1031 if ((a&0xfffe00) == 0xff8000) {
\r
1032 //dprintf("s68k_regs w32: [%02x] %08x @ %06x", a&0x1ff, d, SekPcS68k);
\r
1033 s68k_reg_write8(a, d>>24, 32);
\r
1034 s68k_reg_write8(a+1,(d>>16)&0xff, 32);
\r
1035 s68k_reg_write8(a+2,(d>>8) &0xff, 32);
\r
1036 s68k_reg_write8(a+3, d &0xff, 32);
\r
1040 // word RAM (2M area)
\r
1041 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1042 dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc);
\r
1043 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
1045 dprintf("(decode)");
\r
1047 // allow access in any mode, like Gens does
\r
1048 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
1049 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1054 // word RAM (1M area)
\r
1055 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1058 dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc);
\r
1059 a=((a&0x1fffe)<<1);
\r
1060 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1061 pm=(u16 *)(Pico_mcd->word_ram+a);
\r
1062 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1065 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1070 // -----------------------------------------------------------------
\r
1073 unsigned char PicoReadCD8w (unsigned int a) {
\r
1074 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1076 unsigned short PicoReadCD16w(unsigned int a) {
\r
1077 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1079 unsigned int PicoReadCD32w(unsigned int a) {
\r
1080 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1082 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1083 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1085 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1086 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1088 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1089 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1092 // these are allowed to access RAM
\r
1093 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1095 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1096 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1097 else dprintf("s68k read_pcrel8 @ %06x", a);
\r
1099 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom
\r
1100 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1102 return 0;//(u8) lastread_d;
\r
1104 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1106 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1107 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1108 else dprintf("s68k read_pcrel16 @ %06x", a);
\r
1110 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom
\r
1111 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1113 return 0;//(u16) lastread_d;
\r
1115 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1117 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1118 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1119 else dprintf("s68k read_pcrel32 @ %06x", a);
\r
1121 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1122 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1124 return 0; //lastread_d;
\r
1126 #endif // EMU_M68K
\r