1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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19 typedef unsigned char u8;
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20 typedef unsigned short u16;
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21 typedef unsigned int u32;
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23 //#define __debug_io
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24 //#define __debug_io2
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25 #define rdprintf dprintf
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27 // -----------------------------------------------------------------
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29 // extern m68ki_cpu_core m68ki_cpu;
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31 extern int counter75hz;
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34 static u32 m68k_reg_read16(u32 a, int realsize)
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38 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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42 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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45 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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46 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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49 d = Pico_mcd->s68k_regs[4]<<8;
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52 d = Pico_mcd->m.hint_vector;
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55 dprintf("m68k host data read");
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56 d = Read_CDC_Host(0);
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59 dprintf("m68k reserved read");
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62 dprintf("m68k stopwatch read");
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67 // comm flag/cmd/status (0xE-0x2F)
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68 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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72 dprintf("m68k_regs invalid read @ %02x", a);
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76 // dprintf("ret = %04x", d);
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80 static void m68k_reg_write8(u32 a, u32 d, int realsize)
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83 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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88 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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92 if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset
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93 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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94 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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95 if ((PicoMCD&2) && (d&3)==1) {
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96 SekResetS68k(); // S68k comes out of RESET or BRQ state
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98 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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100 Pico_mcd->m.busreq = d;
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103 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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106 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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108 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
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109 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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110 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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111 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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112 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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113 d |= Pico_mcd->s68k_regs[3]&0x1d;
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114 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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115 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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118 *((char *)&Pico_mcd->m.hint_vector+1) = d;
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121 *(char *)&Pico_mcd->m.hint_vector = d;
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124 //dprintf("m68k: comm flag: %02x", d);
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126 //dprintf("s68k @ %06x", SekPcS68k);
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128 Pico_mcd->s68k_regs[0xe] = d;
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132 if ((a&0xf0) == 0x10) {
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133 Pico_mcd->s68k_regs[a] = d;
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137 dprintf("m68k: invalid write? [%02x] %02x", a, d);
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142 static u32 s68k_reg_read16(u32 a, int realsize)
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147 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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151 d = 1; // ver = 0, not in reset state
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154 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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155 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
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158 d = CDC_Read_Reg();
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161 dprintf("s68k host data read");
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162 d = Read_CDC_Host(1);
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165 dprintf("s68k stopwatch read");
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167 case 0x34: // fader
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168 d = 0; // no busy bit
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172 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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176 // dprintf("ret = %04x", d);
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181 static void s68k_reg_write8(u32 a, u32 d, int realsize)
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184 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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186 // TODO: review against Gens
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189 return; // only m68k can change WP
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191 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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194 d |= Pico_mcd->s68k_regs[3]&0xc2;
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195 if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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197 d |= Pico_mcd->s68k_regs[3]&0xc3;
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198 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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202 dprintf("s68k CDC dest: %x", d&7);
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203 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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206 //dprintf("s68k CDC reg addr: %x", d&0xf);
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212 dprintf("s68k set CDC dma addr");
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214 case 0x33: // IRQ mask
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215 dprintf("s68k irq mask: %02x", d);
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216 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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217 CDD_Export_Status();
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218 // counter75hz = 0; // ???
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221 case 0x34: // fader
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222 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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225 return; // d/m bit is unsetable
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227 u32 d_old = Pico_mcd->s68k_regs[0x37];
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228 Pico_mcd->s68k_regs[0x37] = d&7;
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229 if ((d&4) && !(d_old&4)) {
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230 CDD_Export_Status();
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231 // counter75hz = 0; // ???
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236 Pico_mcd->s68k_regs[a] = (u8) d;
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237 CDD_Import_Command();
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241 if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))
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243 dprintf("m68k: invalid write @ %02x?", a);
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247 Pico_mcd->s68k_regs[a] = (u8) d;
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254 static int PadRead(int i)
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256 int pad=0,value=0,TH;
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257 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
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258 TH=Pico.ioports[i+1]&0x40;
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260 if(PicoOpt & 0x20) { // 6 button gamepad enabled
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261 int phase = Pico.m.padTHPhase[i];
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263 if(phase == 2 && !TH) {
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264 value=(pad&0xc0)>>2; // ?0SA 0000
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266 } else if(phase == 3 && TH) {
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267 value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
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269 } else if(phase == 3 && !TH) {
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270 value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
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275 if(TH) value=(pad&0x3f); // ?1CB RLDU
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276 else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
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280 // orr the bits, which are set as output
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281 value |= Pico.ioports[i+1]&Pico.ioports[i+4];
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283 return value; // will mirror later
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286 static u8 z80Read8(u32 a)
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288 if(Pico.m.z80Run&1) return 0;
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293 // Z80 disabled, do some faking
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294 static u8 zerosent = 0;
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295 if(a == Pico.m.z80_lastaddr) { // probably polling something
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296 u8 d = Pico.m.z80_fakeval;
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297 if((d & 0xf) == 0xf && !zerosent) {
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298 d = 0; zerosent = 1;
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300 Pico.m.z80_fakeval++;
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305 Pico.m.z80_fakeval = 0;
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309 Pico.m.z80_lastaddr = (u16) a;
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310 return Pico.zram[a];
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314 // for nonstandard reads
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315 static u32 UnusualRead16(u32 a, int realsize)
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319 dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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322 dprintf("ret = %04x", d);
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326 static u32 OtherRead16(u32 a, int realsize)
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330 if ((a&0xff0000)==0xa00000) {
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331 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
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332 if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled
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333 d=0xffff; goto end;
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335 if ((a&0xffffe0)==0xa10000) { // I/O ports
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338 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
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339 case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
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340 case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
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341 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
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346 // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
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347 if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }
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349 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
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351 if ((a&0xffffc0)==0xa12000) {
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352 d=m68k_reg_read16(a, realsize);
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356 d = UnusualRead16(a, realsize);
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362 //extern UINT32 mz80GetRegisterValue(void *, UINT32);
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364 static void OtherWrite8(u32 a,u32 d,int realsize)
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366 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
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367 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
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368 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
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369 if ((a&0xffffe0)==0xa10000) { // I/O ports
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371 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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374 Pico.m.padDelay[0] = 0;
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375 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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378 Pico.m.padDelay[1] = 0;
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379 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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382 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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386 extern int z80startCycle, z80stopCycle;
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387 //int lineCycles=(488-SekCyclesLeft)&0x1ff;
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390 // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
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391 if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);
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392 z80stopCycle = SekCyclesDone();
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393 //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()
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395 z80startCycle = SekCyclesDone();
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396 //if(Pico.m.scanline != -1)
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397 //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;
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399 //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);
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400 Pico.m.z80Run=(u8)d; return;
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402 if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }
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404 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
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406 Pico.m.z80_bank68k>>=1;
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407 Pico.m.z80_bank68k|=(d&1)<<8;
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408 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
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412 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored
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414 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d, realsize); return; }
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416 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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419 static void OtherWrite16(u32 a,u32 d)
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421 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
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422 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
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424 if ((a&0xffffe0)==0xa10000) { // I/O ports
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426 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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429 Pico.m.padDelay[0] = 0;
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430 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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433 Pico.m.padDelay[1] = 0;
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434 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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437 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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440 if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
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441 if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }
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443 OtherWrite8(a, d>>8, 16);
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444 OtherWrite8(a+1,d&0xff, 16);
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447 // -----------------------------------------------------------------
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448 // Read Rom and read Ram
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450 u8 PicoReadM68k8(u32 a)
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454 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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458 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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461 if ((a&0xfe0000)==0x020000) {
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462 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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463 d = *(prg_bank+((a^1)&0x1ffff));
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468 if ((a&0xfc0000)==0x200000) {
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469 dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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470 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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471 if (a >= 0x220000) {
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474 a=((a&0x1fffe)<<1)|(a&1);
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475 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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476 d = Pico_mcd->word_ram[a^1];
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479 // allow access in any mode, like Gens does
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480 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
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482 dprintf("ret = %02x", (u8)d);
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486 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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488 if ((a&0xffffc0)==0xa12000)
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489 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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491 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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493 if ((a&0xffffc0)==0xa12000)
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494 rdprintf("ret = %02x", (u8)d);
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499 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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504 u16 PicoReadM68k16(u32 a)
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508 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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512 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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515 if ((a&0xfe0000)==0x020000) {
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516 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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517 d = *(u16 *)(prg_bank+(a&0x1fffe));
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522 if ((a&0xfc0000)==0x200000) {
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523 dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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524 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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525 if (a >= 0x220000) {
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528 a=((a&0x1fffe)<<1);
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529 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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530 d = *(u16 *)(Pico_mcd->word_ram+a);
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533 // allow access in any mode, like Gens does
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534 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
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536 dprintf("ret = %04x", d);
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540 if ((a&0xffffc0)==0xa12000)
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541 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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543 d = (u16)OtherRead16(a, 16);
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545 if ((a&0xffffc0)==0xa12000)
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546 rdprintf("ret = %04x", d);
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551 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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556 u32 PicoReadM68k32(u32 a)
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560 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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564 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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567 if ((a&0xfe0000)==0x020000) {
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568 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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569 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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570 d = (pm[0]<<16)|pm[1];
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575 if ((a&0xfc0000)==0x200000) {
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576 dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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577 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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578 if (a >= 0x220000) {
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582 a=((a&0x1fffe)<<1);
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583 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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584 pm=(u16 *)(Pico_mcd->word_ram+a);
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585 d = (pm[0]<<16)|pm[1];
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588 // allow access in any mode, like Gens does
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589 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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591 dprintf("ret = %08x", d);
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595 if ((a&0xffffc0)==0xa12000)
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596 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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598 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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600 if ((a&0xffffc0)==0xa12000)
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601 rdprintf("ret = %08x", d);
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605 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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610 // -----------------------------------------------------------------
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613 void PicoWriteM68k8(u32 a,u8 d)
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616 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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618 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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619 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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622 if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram
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627 if ((a&0xfe0000)==0x020000) {
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628 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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629 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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634 if ((a&0xfc0000)==0x200000) {
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635 dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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636 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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637 if (a >= 0x220000) {
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640 a=((a&0x1fffe)<<1)|(a&1);
\r
641 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
642 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
\r
645 // allow access in any mode, like Gens does
\r
646 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
\r
651 if ((a&0xffffc0)==0xa12000)
\r
652 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
654 OtherWrite8(a,d,8);
\r
657 void PicoWriteM68k16(u32 a,u16 d)
\r
660 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
662 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
664 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram
\r
669 if ((a&0xfe0000)==0x020000) {
\r
670 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
671 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
676 if ((a&0xfc0000)==0x200000) {
\r
677 dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
678 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
679 if (a >= 0x220000) {
\r
682 a=((a&0x1fffe)<<1);
\r
683 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
684 *(u16 *)(Pico_mcd->word_ram+a)=d;
\r
687 // allow access in any mode, like Gens does
\r
688 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
693 if ((a&0xffffc0)==0xa12000)
\r
694 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
699 void PicoWriteM68k32(u32 a,u32 d)
\r
702 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
705 if ((a&0xe00000)==0xe00000)
\r
708 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
709 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
716 if ((a&0xfe0000)==0x020000) {
\r
717 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
718 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
719 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
724 if ((a&0xfc0000)==0x200000) {
\r
725 if (d != 0) // don't log clears
\r
726 dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
727 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
728 if (a >= 0x220000) {
\r
732 a=((a&0x1fffe)<<1);
\r
733 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
734 pm=(u16 *)(Pico_mcd->word_ram+a);
\r
735 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
738 // allow access in any mode, like Gens does
\r
739 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
740 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
745 if ((a&0xffffc0)==0xa12000)
\r
746 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
748 OtherWrite16(a, (u16)(d>>16));
\r
749 OtherWrite16(a+2,(u16)d);
\r
753 // -----------------------------------------------------------------
\r
756 u8 PicoReadS68k8(u32 a)
\r
764 d = *(Pico_mcd->prg_ram+(a^1));
\r
769 if ((a&0xfffe00) == 0xff8000) {
\r
770 rdprintf("s68k_regs r8: [%02x] @ %06x", a&0x1ff, SekPcS68k);
\r
771 d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
\r
772 rdprintf("ret = %02x", (u8)d);
\r
776 // word RAM (2M area)
\r
777 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
778 dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc);
\r
779 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
781 dprintf("(decode)");
\r
783 // allow access in any mode, like Gens does
\r
784 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
\r
786 dprintf("ret = %02x", (u8)d);
\r
790 // word RAM (1M area)
\r
791 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
792 dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc);
\r
793 a=((a&0x1fffe)<<1)|(a&1);
\r
794 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
795 d = Pico_mcd->word_ram[a^1];
\r
796 dprintf("ret = %02x", (u8)d);
\r
800 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
805 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
810 u16 PicoReadS68k16(u32 a)
\r
818 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
823 if ((a&0xfffe00) == 0xff8000) {
\r
824 rdprintf("s68k_regs r16: [%02x] @ %06x", a&0x1fe, SekPcS68k);
\r
825 d = s68k_reg_read16(a, 16);
\r
826 rdprintf("ret = %04x", d);
\r
830 // word RAM (2M area)
\r
831 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
832 dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc);
\r
833 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
835 dprintf("(decode)");
\r
837 // allow access in any mode, like Gens does
\r
838 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
840 dprintf("ret = %04x", (u8)d);
\r
844 // word RAM (1M area)
\r
845 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
846 dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc);
\r
847 a=((a&0x1fffe)<<1);
\r
848 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
849 d = *(u16 *)(Pico_mcd->word_ram+a);
\r
850 dprintf("ret = %04x", (u8)d);
\r
854 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
859 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
864 u32 PicoReadS68k32(u32 a)
\r
872 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
873 d = (pm[0]<<16)|pm[1];
\r
878 if ((a&0xfffe00) == 0xff8000) {
\r
879 rdprintf("s68k_regs r32: [%02x] @ %06x", a&0x1fe, SekPcS68k);
\r
880 d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);
\r
881 rdprintf("ret = %08x", d);
\r
885 // word RAM (2M area)
\r
886 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
887 dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc);
\r
888 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
890 dprintf("(decode)");
\r
892 // allow access in any mode, like Gens does
\r
893 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
895 dprintf("ret = %08x", (u8)d);
\r
899 // word RAM (1M area)
\r
900 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
902 dprintf("s68k_wram1M 32: [%06x] @%06x", a, SekPc);
\r
903 a=((a&0x1fffe)<<1);
\r
904 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
905 pm=(u16 *)(Pico_mcd->word_ram+a);
\r
906 d = (pm[0]<<16)|pm[1];
\r
907 dprintf("ret = %08x", (u8)d);
\r
911 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
916 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
921 // -----------------------------------------------------------------
\r
923 void PicoWriteS68k8(u32 a,u8 d)
\r
926 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
933 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
938 if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack
\r
942 if ((a&0xfffe00) == 0xff8000) {
\r
943 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a&0x1ff, d, SekPcS68k);
\r
944 s68k_reg_write8(a,d,8);
\r
948 // word RAM (2M area)
\r
949 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
950 dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc);
\r
951 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
953 dprintf("(decode)");
\r
955 // allow access in any mode, like Gens does
\r
956 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
\r
961 // word RAM (1M area)
\r
962 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
964 dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc);
\r
965 a=((a&0x1fffe)<<1)|(a&1);
\r
966 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
967 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
\r
971 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
974 void PicoWriteS68k16(u32 a,u16 d)
\r
977 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
984 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
989 if ((a&0xfffe00) == 0xff8000) {
\r
990 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a&0x1ff, d, SekPcS68k);
\r
991 s68k_reg_write8(a, d>>8, 16);
\r
992 s68k_reg_write8(a+1,d&0xff, 16);
\r
996 // word RAM (2M area)
\r
997 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
998 dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc);
\r
999 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
1001 dprintf("(decode)");
\r
1003 // allow access in any mode, like Gens does
\r
1004 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
1009 // word RAM (1M area)
\r
1010 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1012 dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc);
\r
1013 a=((a&0x1fffe)<<1);
\r
1014 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1015 *(u16 *)(Pico_mcd->word_ram+a)=d;
\r
1019 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1022 void PicoWriteS68k32(u32 a,u32 d)
\r
1024 #ifdef __debug_io2
\r
1025 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1031 if (a < 0x80000) {
\r
1032 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1033 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1038 if ((a&0xfffe00) == 0xff8000) {
\r
1039 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a&0x1ff, d, SekPcS68k);
\r
1040 s68k_reg_write8(a, d>>24, 32);
\r
1041 s68k_reg_write8(a+1,(d>>16)&0xff, 32);
\r
1042 s68k_reg_write8(a+2,(d>>8) &0xff, 32);
\r
1043 s68k_reg_write8(a+3, d &0xff, 32);
\r
1047 // word RAM (2M area)
\r
1048 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1049 dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc);
\r
1050 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
1052 dprintf("(decode)");
\r
1054 // allow access in any mode, like Gens does
\r
1055 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
1056 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1061 // word RAM (1M area)
\r
1062 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1065 dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc);
\r
1066 a=((a&0x1fffe)<<1);
\r
1067 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1068 pm=(u16 *)(Pico_mcd->word_ram+a);
\r
1069 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1072 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1077 // -----------------------------------------------------------------
\r
1080 unsigned char PicoReadCD8w (unsigned int a) {
\r
1081 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1083 unsigned short PicoReadCD16w(unsigned int a) {
\r
1084 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1086 unsigned int PicoReadCD32w(unsigned int a) {
\r
1087 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1089 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1090 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1092 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1093 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1095 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1096 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1099 // these are allowed to access RAM
\r
1100 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1102 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1103 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1104 else dprintf("s68k read_pcrel8 @ %06x", a);
\r
1106 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom
\r
1107 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1109 return 0;//(u8) lastread_d;
\r
1111 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1113 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1114 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1115 else dprintf("s68k read_pcrel16 @ %06x", a);
\r
1117 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom
\r
1118 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1120 return 0;//(u16) lastread_d;
\r
1122 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1124 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1125 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1126 else dprintf("s68k read_pcrel32 @ %06x", a);
\r
1128 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1129 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1131 return 0; //lastread_d;
\r
1133 #endif // EMU_M68K
\r