1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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19 typedef unsigned char u8;
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20 typedef unsigned short u16;
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21 typedef unsigned int u32;
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23 //#define __debug_io
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24 //#define __debug_io2
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26 // -----------------------------------------------------------------
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28 // extern m68ki_cpu_core m68ki_cpu;
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30 extern int counter75hz;
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33 static u32 m68k_reg_read16(u32 a, int realsize)
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37 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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41 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m68k_regs[1]; // here IFL2 is always 0, just like in Gens
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44 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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47 dprintf("m68k host data read");
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48 d = Read_CDC_Host(0);
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51 dprintf("m68k stopwatch read");
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56 d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1];
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61 // comm flag/cmd/status (0xE-0x2F)
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62 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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66 dprintf("m68k_regs invalid read @ %02x", a);
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70 // dprintf("ret = %04x", d);
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74 static void m68k_reg_write8(u32 a, u32 d, int realsize)
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77 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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82 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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86 if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset
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87 if ( (Pico_mcd->m68k_regs[1]&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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88 if ( (Pico_mcd->m68k_regs[1]&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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89 if (/*!(Pico_mcd->m68k_regs[1]&1) &&*/ (PicoMCD&2) && (d&3)==1) {
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90 SekResetS68k(); // S68k comes out of RESET or BRQ state
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92 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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96 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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100 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
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101 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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102 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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103 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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104 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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105 d |= Pico_mcd->s68k_regs[3]&0x1d;
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106 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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107 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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110 //dprintf("m68k: comm flag: %02x", d);
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112 //dprintf("s68k @ %06x", SekPcS68k);
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114 Pico_mcd->s68k_regs[0xe] = d;
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119 Pico_mcd->m68k_regs[a] = (u8) d;
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123 if ((a&0xf0) == 0x10) {
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124 Pico_mcd->s68k_regs[a] = d;
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128 if (a >= 0x20 || (a >= 0xa && a <= 0xd) || a == 0x0f)
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129 dprintf("m68k: invalid write?");
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134 static u32 s68k_reg_read16(u32 a, int realsize)
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139 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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143 d = 1; goto end; // ver = 0, not in reset state
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145 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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148 d = CDC_Read_Reg();
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151 dprintf("s68k host data read");
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152 d = Read_CDC_Host(1);
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155 dprintf("s68k stopwatch read");
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157 case 0x34: // fader
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158 d = 0; // no busy bit
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162 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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166 // dprintf("ret = %04x", d);
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171 static void s68k_reg_write8(u32 a, u32 d, int realsize)
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174 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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176 // TODO: review against Gens
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179 return; // only m68k can change WP
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183 d |= Pico_mcd->s68k_regs[3]&0xc2;
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184 if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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186 d |= Pico_mcd->s68k_regs[3]&0xc3;
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187 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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191 dprintf("s68k CDC dest: %x", d&7);
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192 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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195 dprintf("s68k CDC reg addr: %x", d&0xf);
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201 dprintf("s68k set CDC dma addr");
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203 case 0x33: // IRQ mask
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204 dprintf("s68k irq mask: %02x", d);
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205 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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206 CDD_Export_Status();
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207 // counter75hz = 0; // ???
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210 case 0x34: // fader
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211 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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214 return; // d/m bit is unsetable
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216 u32 d_old = Pico_mcd->s68k_regs[0x37];
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217 Pico_mcd->s68k_regs[0x37] = d&7;
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218 if ((d&4) && !(d_old&4)) {
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219 CDD_Export_Status();
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220 // counter75hz = 0; // ???
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225 Pico_mcd->s68k_regs[a] = (u8) d;
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226 CDD_Import_Command();
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230 if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))
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232 dprintf("m68k: invalid write @ %02x?", a);
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236 Pico_mcd->s68k_regs[a] = (u8) d;
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243 static int PadRead(int i)
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245 int pad=0,value=0,TH;
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246 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
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247 TH=Pico.ioports[i+1]&0x40;
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249 if(PicoOpt & 0x20) { // 6 button gamepad enabled
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250 int phase = Pico.m.padTHPhase[i];
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252 if(phase == 2 && !TH) {
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253 value=(pad&0xc0)>>2; // ?0SA 0000
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255 } else if(phase == 3 && TH) {
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256 value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
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258 } else if(phase == 3 && !TH) {
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259 value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
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264 if(TH) value=(pad&0x3f); // ?1CB RLDU
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265 else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
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269 // orr the bits, which are set as output
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270 value |= Pico.ioports[i+1]&Pico.ioports[i+4];
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272 return value; // will mirror later
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275 static u8 z80Read8(u32 a)
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277 if(Pico.m.z80Run&1) return 0;
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282 // Z80 disabled, do some faking
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283 static u8 zerosent = 0;
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284 if(a == Pico.m.z80_lastaddr) { // probably polling something
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285 u8 d = Pico.m.z80_fakeval;
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286 if((d & 0xf) == 0xf && !zerosent) {
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287 d = 0; zerosent = 1;
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289 Pico.m.z80_fakeval++;
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294 Pico.m.z80_fakeval = 0;
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298 Pico.m.z80_lastaddr = (u16) a;
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299 return Pico.zram[a];
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303 // for nonstandard reads
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304 static u32 UnusualRead16(u32 a, int realsize)
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308 dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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311 dprintf("ret = %04x", d);
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315 static u32 OtherRead16(u32 a, int realsize)
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319 if ((a&0xff0000)==0xa00000) {
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320 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
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321 if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled
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322 d=0xffff; goto end;
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324 if ((a&0xffffe0)==0xa10000) { // I/O ports
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327 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
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328 case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
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329 case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
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330 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
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335 // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
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336 if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }
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338 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
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340 if ((a&0xffffc0)==0xa12000) {
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341 d=m68k_reg_read16(a, realsize);
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345 d = UnusualRead16(a, realsize);
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351 //extern UINT32 mz80GetRegisterValue(void *, UINT32);
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353 static void OtherWrite8(u32 a,u32 d,int realsize)
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355 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
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356 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
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357 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
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358 if ((a&0xffffe0)==0xa10000) { // I/O ports
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360 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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363 Pico.m.padDelay[0] = 0;
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364 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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367 Pico.m.padDelay[1] = 0;
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368 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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371 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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375 extern int z80startCycle, z80stopCycle;
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376 //int lineCycles=(488-SekCyclesLeft)&0x1ff;
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379 // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
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380 if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);
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381 z80stopCycle = SekCyclesDone();
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382 //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()
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384 z80startCycle = SekCyclesDone();
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385 //if(Pico.m.scanline != -1)
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386 //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;
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388 //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);
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389 Pico.m.z80Run=(u8)d; return;
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391 if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }
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393 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
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395 Pico.m.z80_bank68k>>=1;
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396 Pico.m.z80_bank68k|=(d&1)<<8;
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397 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
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401 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored
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403 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d, realsize); return; }
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405 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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408 static void OtherWrite16(u32 a,u32 d)
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410 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
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411 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
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413 if ((a&0xffffe0)==0xa10000) { // I/O ports
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415 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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418 Pico.m.padDelay[0] = 0;
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419 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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422 Pico.m.padDelay[1] = 0;
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423 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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426 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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429 if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
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430 if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }
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432 OtherWrite8(a, d>>8, 16);
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433 OtherWrite8(a+1,d&0xff, 16);
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436 // -----------------------------------------------------------------
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437 // Read Rom and read Ram
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439 u8 PicoReadM68k8(u32 a)
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443 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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447 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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450 if ((a&0xfe0000)==0x020000) {
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451 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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452 d = *(prg_bank+((a^1)&0x1ffff));
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457 if ((a&0xfc0000)==0x200000) {
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458 dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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459 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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462 // allow access in any mode, like Gens does
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463 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
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465 dprintf("ret = %02x", (u8)d);
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469 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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471 if ((a&0xffffc0)==0xa12000)
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472 dprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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474 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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476 if ((a&0xffffc0)==0xa12000)
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477 dprintf("ret = %02x", (u8)d);
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482 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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487 u16 PicoReadM68k16(u32 a)
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491 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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495 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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498 if ((a&0xfe0000)==0x020000) {
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499 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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500 d = *(u16 *)(prg_bank+(a&0x1fffe));
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505 if ((a&0xfc0000)==0x200000) {
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506 dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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507 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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510 // allow access in any mode, like Gens does
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511 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
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513 dprintf("ret = %04x", d);
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517 if ((a&0xffffc0)==0xa12000)
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518 dprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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520 d = (u16)OtherRead16(a, 16);
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522 if ((a&0xffffc0)==0xa12000)
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523 dprintf("ret = %04x", d);
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528 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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533 u32 PicoReadM68k32(u32 a)
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537 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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541 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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544 if ((a&0xfe0000)==0x020000) {
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545 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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546 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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547 d = (pm[0]<<16)|pm[1];
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552 if ((a&0xfc0000)==0x200000) {
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553 dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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554 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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557 // allow access in any mode, like Gens does
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558 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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560 dprintf("ret = %08x", d);
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564 if ((a&0xffffc0)==0xa12000)
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565 dprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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567 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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569 if ((a&0xffffc0)==0xa12000)
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570 dprintf("ret = %08x", d);
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574 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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579 // -----------------------------------------------------------------
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582 void PicoWriteM68k8(u32 a,u8 d)
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585 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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587 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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588 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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591 if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram
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596 if ((a&0xfe0000)==0x020000) {
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597 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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598 u8 *pm=(u8 *)(prg_bank+((a^1)&0x1ffff));
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604 if ((a&0xfc0000)==0x200000) {
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605 dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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606 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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609 // allow access in any mode, like Gens does
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610 u8 *pm=(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff));
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616 if ((a&0xffffc0)==0xa12000)
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617 dprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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619 OtherWrite8(a,d,8);
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622 void PicoWriteM68k16(u32 a,u16 d)
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625 dprintf("w16: %06x, %04x", a&0xffffff, d);
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627 //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)
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628 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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630 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram
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635 if ((a&0xfe0000)==0x020000) {
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636 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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637 *(u16 *)(prg_bank+(a&0x1fffe))=d;
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642 if ((a&0xfc0000)==0x200000) {
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643 dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
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644 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
647 // allow access in any mode, like Gens does
\r
648 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
653 if ((a&0xffffc0)==0xa12000)
\r
654 dprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
659 void PicoWriteM68k32(u32 a,u32 d)
\r
662 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
665 if ((a&0xe00000)==0xe00000)
\r
668 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
669 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
676 if ((a&0xfe0000)==0x020000) {
\r
677 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
678 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
679 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
684 if ((a&0xfc0000)==0x200000) {
\r
685 if (d != 0) // don't log clears
\r
686 dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
687 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
690 // allow access in any mode, like Gens does
\r
691 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
692 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
697 if ((a&0xffffc0)==0xa12000)
\r
698 dprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
700 OtherWrite16(a, (u16)(d>>16));
\r
701 OtherWrite16(a+2,(u16)d);
\r
705 // -----------------------------------------------------------------
\r
708 u8 PicoReadS68k8(u32 a)
\r
716 d = *(Pico_mcd->prg_ram+(a^1));
\r
721 if ((a&0xfffe00) == 0xff8000) {
\r
722 dprintf("s68k_regs r8: [%02x] @ %06x", a&0x1ff, SekPcS68k);
\r
723 d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
\r
724 dprintf("ret = %02x", (u8)d);
\r
728 // word RAM (2M area)
\r
729 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
730 dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc);
\r
731 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
733 dprintf("(decode)");
\r
735 // allow access in any mode, like Gens does
\r
736 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
\r
738 dprintf("ret = %02x", (u8)d);
\r
742 // word RAM (1M area)
\r
743 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
744 dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc);
\r
749 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
754 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
759 u16 PicoReadS68k16(u32 a)
\r
767 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
772 if ((a&0xfffe00) == 0xff8000) {
\r
773 dprintf("s68k_regs r16: [%02x] @ %06x", a&0x1fe, SekPcS68k);
\r
774 d = s68k_reg_read16(a, 16);
\r
775 dprintf("ret = %04x", d);
\r
779 // word RAM (2M area)
\r
780 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
781 dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc);
\r
782 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
784 dprintf("(decode)");
\r
786 // allow access in any mode, like Gens does
\r
787 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
789 dprintf("ret = %04x", (u8)d);
\r
793 // word RAM (1M area)
\r
794 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
795 dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc);
\r
800 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
805 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
810 u32 PicoReadS68k32(u32 a)
\r
818 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
819 d = (pm[0]<<16)|pm[1];
\r
824 if ((a&0xfffe00) == 0xff8000) {
\r
825 dprintf("s68k_regs r32: [%02x] @ %06x", a&0x1fe, SekPcS68k);
\r
826 d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);
\r
827 dprintf("ret = %08x", d);
\r
831 // word RAM (2M area)
\r
832 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
833 dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc);
\r
834 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
836 dprintf("(decode)");
\r
838 // allow access in any mode, like Gens does
\r
839 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
841 dprintf("ret = %08x", (u8)d);
\r
845 // word RAM (1M area)
\r
846 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
847 dprintf("s68k_wram1M 32: [%06x] @%06x", a, SekPc);
\r
852 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
857 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
862 // -----------------------------------------------------------------
\r
864 void PicoWriteS68k8(u32 a,u8 d)
\r
867 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
874 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
879 if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack
\r
883 if ((a&0xfffe00) == 0xff8000) {
\r
884 dprintf("s68k_regs w8: [%02x] %02x @ %06x", a&0x1ff, d, SekPcS68k);
\r
885 s68k_reg_write8(a,d,8);
\r
889 // word RAM (2M area)
\r
890 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
891 dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc);
\r
892 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
894 dprintf("(decode)");
\r
896 // allow access in any mode, like Gens does
\r
897 u8 *pm=(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff));
\r
903 // word RAM (1M area)
\r
904 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
906 dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc);
\r
911 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
914 void PicoWriteS68k16(u32 a,u16 d)
\r
917 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
924 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
929 if ((a&0xfffe00) == 0xff8000) {
\r
930 dprintf("s68k_regs w16: [%02x] %04x @ %06x", a&0x1ff, d, SekPcS68k);
\r
931 s68k_reg_write8(a, d>>8, 16);
\r
932 s68k_reg_write8(a+1,d&0xff, 16);
\r
936 // word RAM (2M area)
\r
937 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
938 dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc);
\r
939 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
941 dprintf("(decode)");
\r
943 // allow access in any mode, like Gens does
\r
944 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
949 // word RAM (1M area)
\r
950 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
952 dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc);
\r
957 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
960 void PicoWriteS68k32(u32 a,u32 d)
\r
963 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
970 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
971 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
976 if ((a&0xfffe00) == 0xff8000) {
\r
977 dprintf("s68k_regs w32: [%02x] %08x @ %06x", a&0x1ff, d, SekPcS68k);
\r
978 s68k_reg_write8(a, d>>24, 32);
\r
979 s68k_reg_write8(a+1,(d>>16)&0xff, 32);
\r
980 s68k_reg_write8(a+2,(d>>8) &0xff, 32);
\r
981 s68k_reg_write8(a+3, d &0xff, 32);
\r
985 // word RAM (2M area)
\r
986 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
987 dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc);
\r
988 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
990 dprintf("(decode)");
\r
992 // allow access in any mode, like Gens does
\r
993 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
994 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
999 // word RAM (1M area)
\r
1000 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1002 dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc);
\r
1006 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1011 // -----------------------------------------------------------------
\r
1014 unsigned char PicoReadCD8w (unsigned int a) {
\r
1015 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1017 unsigned short PicoReadCD16w(unsigned int a) {
\r
1018 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1020 unsigned int PicoReadCD32w(unsigned int a) {
\r
1021 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1023 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1024 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1026 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1027 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1029 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1030 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1033 // these are allowed to access RAM
\r
1034 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1036 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1037 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1038 else dprintf("s68k read_pcrel8 @ %06x", a);
\r
1040 if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom
\r
1041 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1043 return 0;//(u8) lastread_d;
\r
1045 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1047 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1048 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1049 else dprintf("s68k read_pcrel16 @ %06x", a);
\r
1051 if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom
\r
1052 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1054 return 0;//(u16) lastread_d;
\r
1056 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1058 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1059 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1060 else dprintf("s68k read_pcrel32 @ %06x", a);
\r
1062 if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1063 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1065 return 0; //lastread_d;
\r
1067 #endif // EMU_M68K
\r