3 @ Memory I/O handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
8 .equiv PCM_STEP_SHIFT, 11
16 .macro mk_m68k_jump_table on sz @ operation name, size
17 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
18 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
19 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
20 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
23 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
24 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
25 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
26 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
29 .long m_m68k_&\on&\sz&_bcram_size @ 0x400000
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x420000
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
34 .long m_m68k_&\on&\sz&_bcram @ 0x600000
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x620000
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7dffff
39 .long m_m68k_&\on&\sz&_bcram_reg @ 0x7e0000
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
41 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
42 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
44 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
46 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
47 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
48 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
49 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
50 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
51 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
52 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
54 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
55 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
56 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
59 .macro mk_s68k_jump_table on sz @ operation name, size
60 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
61 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
62 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
63 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
64 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
68 @ the jumptables themselves.
69 m_m68k_read8_table: mk_m68k_jump_table read 8
70 m_m68k_read16_table: mk_m68k_jump_table read 16
71 m_m68k_read32_table: mk_m68k_jump_table read 32
72 m_m68k_write8_table: mk_m68k_jump_table write 8
73 m_m68k_write16_table: mk_m68k_jump_table write 16
74 m_m68k_write32_table: mk_m68k_jump_table write 32
76 m_s68k_read8_table: mk_s68k_jump_table read 8
77 m_s68k_read16_table: mk_s68k_jump_table read 16
78 m_s68k_read32_table: mk_s68k_jump_table read 32
79 m_s68k_write8_table: mk_s68k_jump_table write 8
80 m_s68k_write16_table: mk_s68k_jump_table write 16
81 m_s68k_write32_table: mk_s68k_jump_table write 32
83 m_s68k_decode_write_table:
84 .long m_s68k_write8_2M_decode_b0_m0
85 .long m_s68k_write16_2M_decode_b0_m0
86 .long m_s68k_write32_2M_decode_b0_m0
87 .long m_s68k_write8_2M_decode_b0_m1
88 .long m_s68k_write16_2M_decode_b0_m1
89 .long m_s68k_write32_2M_decode_b0_m1
90 .long m_s68k_write8_2M_decode_b0_m2
91 .long m_s68k_write16_2M_decode_b0_m2
92 .long m_s68k_write32_2M_decode_b0_m2
93 .long m_s68k_write8_2M_decode_b1_m0
94 .long m_s68k_write16_2M_decode_b1_m0
95 .long m_s68k_write32_2M_decode_b1_m0
96 .long m_s68k_write8_2M_decode_b1_m1
97 .long m_s68k_write16_2M_decode_b1_m1
98 .long m_s68k_write32_2M_decode_b1_m1
99 .long m_s68k_write8_2M_decode_b1_m2
100 .long m_s68k_write16_2M_decode_b1_m2
101 .long m_s68k_write32_2M_decode_b1_m2
104 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
109 .global PicoMemResetCD
110 .global PicoMemResetCDdecode
111 .global PicoReadM68k8
112 .global PicoReadM68k16
113 .global PicoReadM68k32
114 .global PicoWriteM68k8
115 .global PicoWriteM68k16
116 .global PicoWriteM68k32
117 .global PicoReadS68k8
118 .global PicoReadS68k16
119 .global PicoReadS68k32
120 .global PicoWriteS68k8
121 .global PicoWriteS68k16
122 .global PicoWriteS68k32
124 @ externs, just for reference
128 .extern PicoVideoRead
129 .extern Read_CDC_Host
130 .extern m68k_reg_write8
133 .extern s68k_reg_read16
135 .extern gfx_cd_write16
136 .extern s68k_reg_write8
137 .extern s68k_poll_adclk
139 .extern s68k_poll_detect
141 .extern m_m68k_read8_misc
142 .extern m_m68k_write8_misc
145 @ r0=reg3, r1-r3=temp
146 .macro mk_update_table on sz @ operation name, size
147 @ we only set word-ram handlers
148 ldr r1, =m_m68k_&\on&\sz&_table
149 ldr r12,=m_s68k_&\on&\sz&_table
154 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
155 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
158 ldr r2, =m_&\on&_null
169 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
170 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
173 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
175 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
183 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
184 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
187 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
189 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
200 mk_update_table read 8
201 mk_update_table read 16
202 mk_update_table read 32
203 mk_update_table write 8
204 mk_update_table write 16
205 mk_update_table write 32
209 PicoMemResetCDdecode: @reg3
211 bxeq lr @ we should not be called in 2M mode
212 ldr r1, =m_s68k_write8_table
213 ldr r3, =m_s68k_decode_write_table
217 moveq r2, #2 @ mode3 is same as mode2?
219 addeq r2, r2, #3 @ bank1 (r2=0..5)
220 add r2, r2, r2, lsl #1 @ *= 3
221 add r2, r3, r2, lsl #2
222 ldmia r2, {r0,r3,r12}
225 str r3, [r1, #4*4+8*4]
226 str r3, [r1, #5*4+8*4]
227 str r12,[r1, #4*4+8*4*2]
228 str r12,[r1, #5*4+8*4*2]
234 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
236 .macro mk_entry_m68k table
238 bic r0, r0, #0xff000000
239 and r3, r0, #0x00fe0000
240 ldr pc, [r2, r3, lsr #15]
243 PicoReadM68k8: @ u32 a
244 mk_entry_m68k m_m68k_read8_table
246 PicoReadM68k16: @ u32 a
247 mk_entry_m68k m_m68k_read16_table
249 PicoReadM68k32: @ u32 a
250 mk_entry_m68k m_m68k_read32_table
252 PicoWriteM68k8: @ u32 a, u8 d
253 mk_entry_m68k m_m68k_write8_table
255 PicoWriteM68k16: @ u32 a, u16 d
256 mk_entry_m68k m_m68k_write16_table
258 PicoWriteM68k32: @ u32 a, u32 d
259 mk_entry_m68k m_m68k_write32_table
262 .macro mk_entry_s68k on sz
263 bic r0, r0, #0xff000000
265 blt m_s68k_&\on&\sz&_prg
267 ldrlt r2, =m_s68k_&\on&\sz&_table
268 andlt r3, r0, #0x000e0000
269 ldrlt pc, [r2, r3, lsr #15]
271 orr r3, r3, #0x00008000
273 bge m_s68k_&\on&\sz&_regs
275 bge m_s68k_&\on&\sz&_pcm
277 bge m_s68k_&\on&\sz&_backup
282 PicoReadS68k8: @ u32 a
285 PicoReadS68k16: @ u32 a
286 mk_entry_s68k read 16
288 PicoReadS68k32: @ u32 a
289 mk_entry_s68k read 32
291 PicoWriteS68k8: @ u32 a, u8 d
292 mk_entry_s68k write 8
294 PicoWriteS68k16: @ u32 a, u16 d
295 mk_entry_s68k write 16
297 PicoWriteS68k32: @ u32 a, u32 d
298 mk_entry_s68k write 32
303 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
307 @ r0=addr[in,out], r1,r2=tmp
309 ands r1, r0, #0x01c000
310 ldrne pc, [pc, r1, lsr #12]
311 beq 0f @ most common?
321 and r1, r0, #0x7e00 @ col
322 and r2, r0, #0x01fc @ row
324 orr r1, r2, r1, ror #13
327 and r1, r0, #0x3f00 @ col
328 and r2, r0, #0x00fc @ row
330 orr r1, r2, r1, ror #12
333 and r1, r0, #0x1f80 @ col
334 and r2, r0, #0x007c @ row
335 orr r1, r2, r1, ror #11
337 orr r1, r1, r2, lsr #6
340 and r1, r0, #0xfc00 @ col
341 and r2, r0, #0x03fc @ row
342 orr r1, r2, r1, ror #14
345 orr r0, r0, r1, ror #26 @ rol 4+2
349 @ r0=prt1, r1=ptr2; unaligned ptr MUST be r0
355 moveq r0, r0, ror #16
356 orrne r0, r1, r0, lsl #16
360 @ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0
365 movne r1, r1, lsr #16
371 .macro bcram_reg_rw is_read addr_check
372 rsb r0, r0, #0x800000
373 ldr r2, =(Pico+0x22200)
374 cmp r0, #(0x800000-\addr_check)
380 add r2, r2, #0x110000
381 add r2, r2, #0x002200
383 ldrb r0, [r2, #0x18] @ Pico_mcd->m.bcram_reg
390 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
399 ldr r1, =(Pico+0x22200)
400 bic r0, r0, #0xfe0000
407 m_m68k_read8_prgbank:
408 ldr r1, =(Pico+0x22200)
412 orr r3, r2, #0x002200
415 and r3, r3, #0x00030000
416 cmp r3, #0x00010000 @ have bus or in reset state?
419 and r2, r2, #0xc0000000 @ r3 & 0xC0
420 add r1, r1, r2, lsr #12
425 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
426 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
427 ldr r1, =(Pico+0x22200)
428 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
435 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
436 ldr r1, =(Pico+0x22200)
437 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
444 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
445 ldr r1, =(Pico+0x22200)
446 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
453 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
455 ldr r1, =(Pico+0x22200)
456 add r0, r0, #0x0c0000
463 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
465 ldr r1, =(Pico+0x22200)
466 add r0, r0, #0x0e0000
473 m_m68k_read8_bcram_size: @ 0x400000
481 movne r0, #3 @ pretend to be a 64k cart (8<<3)
485 m_m68k_read8_bcram: @ 0x600000 - 0x61ffff
487 bic r0, r0, #0xfe0000
498 m_m68k_read8_bcram_reg: @ 0x7fffff
499 bcram_reg_rw 1, 0x7fffff
502 m_m68k_read8_system_io:
503 bic r2, r0, #0xfe0000
506 bne m_m68k_read8_misc @ now from Pico/Memory.s
508 ldr r1, =(Pico+0x22200)
510 ldr r1, [r1] @ Pico.mcd (used everywhere)
512 ldrlt pc, [pc, r0, lsl #2]
514 .long m_m68k_read8_r00
515 .long m_m68k_read8_r01
516 .long m_m68k_read8_r02
517 .long m_m68k_read8_r03
518 .long m_m68k_read8_r04
519 .long m_read_null @ unused bits
520 .long m_m68k_read8_r06
521 .long m_m68k_read8_r07
522 .long m_m68k_read8_r08
523 .long m_m68k_read8_r09
524 .long m_read_null @ reserved
526 .long m_m68k_read8_r0c
527 .long m_m68k_read8_r0d
529 add r1, r1, #0x110000
531 and r0, r0, #0x04000000 @ we need irq2 mask state
535 add r1, r1, #0x110000
536 add r1, r1, #0x002200
537 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
540 add r1, r1, #0x110000
544 add r1, r1, #0x110000
546 add r1, r1, #0x002200
549 tst r1, #2 @ DMNA pending?
555 add r1, r1, #0x110000
559 ldrb r0, [r1, #0x73] @ IRQ vector
566 bl Read_CDC_Host @ TODO: make it local
573 add r1, r1, #0x110000
574 add r1, r1, #0x002200
575 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
579 add r1, r1, #0x110000
580 add r1, r1, #0x002200
588 add r1, r1, #0x110000
596 cmp r2, #0xa00000 @ Z80 RAM?
598 @ ldreq r2, =z80Read8
603 bl OtherRead16 @ non-MCD version should be ok too
613 bxne lr @ invalid read
616 bl PicoVideoRead @ TODO: implement it in asm
625 bic r0, r0, #0xff0000
631 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
635 ldr r1, =(Pico+0x22200)
636 bic r0, r0, #0xfe0000
643 m_m68k_read16_prgbank:
644 ldr r1, =(Pico+0x22200)
648 orr r3, r2, #0x002200
651 and r3, r3, #0x00030000
652 cmp r3, #0x00010000 @ have bus or in reset state?
655 and r2, r2, #0xc0000000 @ r3 & 0xC0
656 add r1, r1, r2, lsr #12
661 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
662 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
663 ldr r1, =(Pico+0x22200)
664 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
671 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
672 ldr r1, =(Pico+0x22200)
673 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
680 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
681 ldr r1, =(Pico+0x22200)
682 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
689 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
690 @ Warning: read32 relies on NOT using r3 and r12 here
692 ldr r1, =(Pico+0x22200)
693 add r0, r0, #0x0c0000
700 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
702 ldr r1, =(Pico+0x22200)
703 add r0, r0, #0x0e0000
710 m_m68k_read16_bcram_size: @ 0x400000
717 movne r0, #3 @ pretend to be a 64k cart
721 @ m_m68k_read16_bcram: @ 0x600000 - 0x61ffff
722 .equiv m_m68k_read16_bcram, m_m68k_read8_bcram
725 m_m68k_read16_bcram_reg: @ 0x7fffff
726 bcram_reg_rw 1, 0x7ffffe
729 m_m68k_read16_system_io:
730 bic r1, r0, #0xfe0000
733 bne m_m68k_read16_misc
735 m_m68k_read16_m68k_regs:
736 ldr r1, =(Pico+0x22200)
738 ldr r1, [r1] @ Pico.mcd (used everywhere)
740 ldrlt pc, [pc, r0, lsl #1]
742 .long m_m68k_read16_r00
743 .long m_m68k_read16_r02
744 .long m_m68k_read16_r04
745 .long m_m68k_read16_r06
746 .long m_m68k_read16_r08
747 .long m_read_null @ reserved
748 .long m_m68k_read16_r0c
750 add r1, r1, #0x110000
752 add r1, r1, #0x002200
753 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
754 and r0, r0, #0x04000000 @ we need irq2 mask state
755 orr r0, r1, r0, lsr #11
758 add r1, r1, #0x110000
761 add r1, r1, #0x002200
764 orr r0, r2, r0, lsl #8
765 tst r1, #2 @ DMNA pending?
771 add r1, r1, #0x110000
776 ldrh r0, [r1, #0x72] @ IRQ vector
782 add r1, r1, #0x110000
783 add r1, r1, #0x002200
789 addlt r1, r1, #0x110000
795 orr r0, r0, r1, lsl #8
808 bxne lr @ invalid read
815 bic r0, r0, #0xff0000
821 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
825 ldr r1, =(Pico+0x22200)
826 bic r0, r0, #0xfe0000
833 m_m68k_read32_prgbank:
834 ldr r1, =(Pico+0x22200)
838 orr r3, r2, #0x002200
841 and r3, r3, #0x00030000
842 cmp r3, #0x00010000 @ have bus or in reset state?
845 and r2, r2, #0xc0000000 @ r3 & 0xC0
846 add r1, r1, r2, lsr #12
851 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
852 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
853 ldr r1, =(Pico+0x22200)
854 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
861 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
862 ldr r1, =(Pico+0x22200)
863 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
870 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
871 ldr r1, =(Pico+0x22200)
872 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
879 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
881 bne m_m68k_read32_wordram1_1M_b0_unal
883 ldr r1, =(Pico+0x22200)
884 add r0, r0, #0x0c0000
889 m_m68k_read32_wordram1_1M_b0_unal:
890 @ hopefully this doesn't happen too often
893 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
897 bl m_m68k_read16_wordram1_1M_b0
898 orr r0, r0, r3, lsl #16
902 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
904 bne m_m68k_read32_wordram1_1M_b1_unal
906 ldr r1, =(Pico+0x22200)
907 add r0, r0, #0x0e0000
912 m_m68k_read32_wordram1_1M_b1_unal:
915 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
919 bl m_m68k_read16_wordram1_1M_b1
920 orr r0, r0, r3, lsl #16
924 m_m68k_read32_bcram_size: @ 0x400000
931 movne r0, #0x30000 @ pretend to be a 64k cart
935 m_m68k_read32_bcram: @ 0x600000 - 0x61ffff, not likely to be called
938 bl m_m68k_read8_bcram
942 bl m_m68k_read8_bcram
943 orr r0, r0, r3, lsl #16
947 m_m68k_read32_bcram_reg: @ 0x7fffff
948 bcram_reg_rw 1, 0x7ffffc
951 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
952 m_m68k_read32_system_io:
953 bic r1, r0, #0xfe0000
956 bne m_m68k_read32_misc
959 blt m_m68k_read32_misc
963 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
965 ldr r1, =(Pico+0x22200)
968 orr r2, r2, r2, lsl #16
969 add r1, r1, #0x110000
971 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
972 and r0, r2, r0, lsr #8
973 orr r0, r0, r1, lsl #8
979 bl m_m68k_read16_system_io
981 bl m_m68k_read16_system_io
983 orr r0, r0, r1, lsl #16
990 bxne lr @ invalid read
998 orr r0, r0, r1, lsl #16
1004 bic r0, r0, #0xff0000
1011 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1016 m_m68k_write8_bcram_size: @ 0x400000
1020 m_m68k_write8_prgbank:
1021 ldr r2, =(Pico+0x22200)
1025 orr r3, r12, #0x002200
1028 and r3, r3, #0x00030000
1029 cmp r3, #0x00010000 @ have bus or in reset state?
1031 and r12,r12,#0xc0000000 @ r3 & 0xC0
1032 add r2, r2, r12, lsr #12
1037 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
1038 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
1039 ldr r2, =(Pico+0x22200)
1040 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1047 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1048 ldr r2, =(Pico+0x22200)
1049 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1056 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1057 ldr r2, =(Pico+0x22200)
1058 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1065 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1068 ldr r2, =(Pico+0x22200)
1069 add r0, r0, #0x0c0000
1076 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1079 ldr r2, =(Pico+0x22200)
1080 add r0, r0, #0x0e0000
1087 m_m68k_write8_bcram: @ 0x600000 - 0x61ffff
1088 @ can't use r3 or r12, because of write32
1090 bic r0, r0, #0xfe0000
1094 add r0, r2, r0, lsr #1
1095 ldr r2, =(Pico+0x22200)
1098 add r2, r2, #0x110000
1099 add r2, r2, #0x002200
1101 tst r2, #1 @ check bcram reg
1106 strb r0, [r2, #0x0e] @ SRam.changed = 1
1110 m_m68k_write8_bcram_reg: @ 0x7fffff
1111 bcram_reg_rw 0, 0x7fffff
1114 m_m68k_write8_system_io:
1115 bic r2, r0, #0xfe0000
1121 b m_m68k_write8_misc
1133 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
1139 bic r0, r0, #0xff0000
1145 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1148 m_m68k_write16_bios:
1149 m_m68k_write16_bcram_size: @ 0x400000
1153 m_m68k_write16_prgbank:
1154 ldr r2, =(Pico+0x22200)
1158 orr r3, r12, #0x002200
1161 and r3, r3, #0x00030000
1162 cmp r3, #0x00010000 @ have bus or in reset state?
1164 and r12,r12,#0xc0000000 @ r3 & 0xC0
1165 add r2, r2, r12, lsr #12
1170 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1171 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1172 ldr r2, =(Pico+0x22200)
1173 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1180 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1181 ldr r2, =(Pico+0x22200)
1182 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1189 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1190 ldr r2, =(Pico+0x22200)
1191 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1198 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1199 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1202 ldr r1, =(Pico+0x22200)
1203 add r0, r0, #0x0c0000
1210 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1213 ldr r1, =(Pico+0x22200)
1214 add r0, r0, #0x0e0000
1221 @ m_m68k_write16_bcram: @ 0x600000 - 0x61ffff
1222 .equiv m_m68k_write16_bcram, m_m68k_write8_bcram
1225 m_m68k_write16_bcram_reg: @ 0x7fffff
1226 bcram_reg_rw 0, 0x7ffffe
1229 m_m68k_write16_system_io:
1231 bic r2, r0, #0xfe0000
1236 m_m68k_write16_regs:
1239 beq m_m68k_write16_regs_spec
1242 stmfd sp!,{r2,r3,lr}
1245 ldmfd sp!,{r0,r1,lr}
1248 m_m68k_write16_regs_spec: @ special case
1249 ldr r2, =(Pico+0x22200)
1250 ldr r3, =s68k_poll_adclk
1253 add r0, r0, #0x00000e
1255 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
1261 ldr r0, =PicoCpuCS68k
1262 str r1, [r0, #0x58] @ push s68k out of stopped state
1276 b SN76496Write @ lsb goes to 0x11
1281 bic r0, r0, #0xff0000
1287 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1290 m_m68k_write32_bios:
1291 m_m68k_write32_bcram_size: @ 0x400000
1295 m_m68k_write32_prgbank:
1296 ldr r2, =(Pico+0x22200)
1300 orr r3, r12, #0x002200
1303 and r3, r3, #0x00030000
1304 cmp r3, #0x00010000 @ have bus or in reset state?
1306 and r12,r12,#0xc0000000 @ r3 & 0xC0
1307 add r2, r2, r12, lsr #12
1312 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1313 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1314 ldr r2, =(Pico+0x22200)
1315 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1322 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1323 ldr r2, =(Pico+0x22200)
1324 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1331 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1332 ldr r2, =(Pico+0x22200)
1333 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1340 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1342 bne m_m68k_write32_wordram1_1M_b0_unal
1345 ldr r2, =(Pico+0x22200)
1346 add r0, r0, #0x0c0000
1352 m_m68k_write32_wordram1_1M_b0_unal:
1353 @ hopefully this doesn't happen too often
1357 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1361 b m_m68k_write16_wordram1_1M_b0
1364 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1366 bne m_m68k_write32_wordram1_1M_b1_unal
1369 ldr r2, =(Pico+0x22200)
1370 add r0, r0, #0x0e0000
1376 m_m68k_write32_wordram1_1M_b1_unal:
1380 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1384 b m_m68k_write16_wordram1_1M_b1
1387 m_m68k_write32_bcram: @ 0x600000 - 0x61ffff, not likely to be called
1391 bl m_m68k_write8_bcram
1394 bl m_m68k_write8_bcram
1398 m_m68k_write32_bcram_reg: @ 0x7fffff
1399 bcram_reg_rw 0, 0x7ffffc
1403 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1404 m_m68k_write32_system_io:
1405 bic r2, r0, #0xfe0000
1408 bne m_m68k_write32_misc
1413 bge m_m68k_write32_regs_comm
1415 bge m_m68k_write32_regs_spec @ hits the nasty comm reg qiurk
1418 stmfd sp!,{r0,r1,lr}
1431 ldmfd sp!,{r0,r1,lr}
1435 m_m68k_write32_regs_comm: @ Handle the 0x10-0x1f range
1436 ldr r0, =(Pico+0x22200)
1439 orr r3, r3, r3, lsl #16
1440 add r0, r0, #0x110000
1441 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1442 and r1, r3, r1, ror #24
1443 orr r1, r1, r12,lsl #8 @ end of byteswap
1446 ldr r3, =s68k_poll_adclk
1448 movne r1, r1, lsr #16
1452 ldr r0, =PicoCpuCS68k @ remove poll detected state for s68k
1458 m_m68k_write32_misc:
1460 stmfd sp!,{r0,r1,lr}
1463 ldmfd sp!,{r0,r1,lr}
1467 m_m68k_write32_regs_spec:
1469 stmfd sp!,{r0,r1,lr}
1471 bl m_m68k_write16_regs
1472 ldmfd sp!,{r0,r1,lr}
1474 b m_m68k_write16_regs
1483 moveq r0, r1, lsr #16
1484 beq SN76496Write @ which game is crazy enough to do that?
1485 stmfd sp!,{r0,r1,lr}
1488 ldmfd sp!,{r0,r1,lr}
1495 bic r0, r0, #0xff0000
1503 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1505 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1508 .macro m_s68k_read8_ram map_addr
1509 ldr r1, =(Pico+0x22200)
1513 add r0, r0, #\map_addr @ map to our address
1519 .macro m_s68k_read8_wordram_2M_decode map_addr
1520 ldr r2, =(Pico+0x22200)
1523 movs r0, r0, lsr #1 @ +4-6 <<16
1524 add r2, r2, #\map_addr @ map to our address
1526 movcc r0, r0, lsr #4
1532 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1533 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1534 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1535 m_s68k_read8_ram 0x020000
1538 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1539 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1542 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1543 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1546 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1550 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1551 @ must not trash r3 and r12
1552 ldr r1, =(Pico+0x22200)
1555 bic r0, r0, #0xff0000
1556 bic r0, r0, #0x00e000
1557 add r1, r1, #0x110000
1558 add r1, r1, #0x000200
1564 @ must not trash r3 and r12
1565 ldr r1, =(Pico+0x22200)
1566 bic r0, r0, #0xff0000
1567 @ bic r0, r0, #0x008000
1570 orr r2, r2, #0x002200
1572 bge m_s68k_read8_pcm_ram
1576 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1579 ldr r1, [r1, r2, lsl #2]
1581 moveq r0, r1, lsr #PCM_STEP_SHIFT
1582 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1586 m_s68k_read8_pcm_ram:
1589 add r1, r1, #0x100000 @ pcm_ram
1590 and r2, r2, #0x0f000000 @ bank
1591 add r1, r1, r2, lsr #12
1592 bic r0, r0, #0x00e000
1599 bic r0, r0, #0xff0000
1600 bic r0, r0, #0x008000
1605 cmp r2, #(0x30-0x0e)
1606 blo m_s68k_read8_comm
1609 ldrlo r2, =gfx_cd_read
1610 ldrhs r2, =s68k_reg_read16
1617 moveq r0, r0, lsr #8
1622 ldr r1, =(Pico+0x22200)
1624 add r1, r1, #0x110000
1629 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1632 .macro m_s68k_read16_ram map_addr
1633 ldr r1, =(Pico+0x22200)
1637 add r0, r0, #\map_addr @ map to our address
1643 .macro m_s68k_read16_wordram_2M_decode map_addr
1644 ldr r2, =(Pico+0x22200)
1647 mov r0, r0, lsr #1 @ +4-6 <<16
1648 add r2, r2, #\map_addr @ map to our address
1650 orr r0, r0, r0, lsl #4
1656 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1657 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1658 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1659 m_s68k_read16_ram 0x020000
1662 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1663 m_s68k_read16_wordram_2M_decode 0x080000
1666 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1667 m_s68k_read16_wordram_2M_decode 0x0a0000
1670 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1674 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1675 @ bram is not meant to be accessed by words, does any game do this?
1676 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1679 @ m_s68k_read16_pcm:
1680 @ pcm is on 8-bit bus, would this be same as byte access?
1681 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1685 bic r0, r0, #0xff0000
1686 bic r0, r0, #0x008000
1687 bic r0, r0, #0x000001
1700 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1703 .macro m_s68k_read32_ram map_addr
1704 ldr r1, =(Pico+0x22200)
1708 add r0, r0, #\map_addr @ map to our address
1714 .macro m_s68k_read32_wordram_2M_decode map_addr
1715 ldr r2, =(Pico+0x22200)
1718 mov r0, r0, lsr #1 @ +4-6 <<16
1719 add r2, r2, #\map_addr @ map to our address
1722 ldrneb r0, [r2, #-1]
1724 orr r1, r1, r1, lsl #4
1726 orr r0, r0, r0, lsl #4
1728 orr r0, r0, r1, lsl #16
1733 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1734 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1735 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1736 m_s68k_read32_ram 0x020000
1739 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1740 m_s68k_read32_wordram_2M_decode 0x080000
1743 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1744 m_s68k_read32_wordram_2M_decode 0x0a0000
1747 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1751 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1752 @ bram is not meant to be accessed by words, does any game do this?
1755 bl m_s68k_read8_backup @ must preserve r3 and r12
1759 bl m_s68k_read8_backup
1760 orr r0, r0, r3, lsl #16
1767 bl m_s68k_read8_pcm @ must preserve r3 and r12
1772 orr r0, r0, r3, lsl #16
1777 bic r0, r0, #0xff0000
1778 bic r0, r0, #0x008000
1779 bic r0, r0, #0x000001
1786 blo m_s68k_read32_regs_gfx
1792 orr r0, r0, r1, lsl #16
1796 m_s68k_read32_regs_gfx:
1802 orr r0, r0, r1, lsl #16
1807 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1810 .macro m_s68k_write8_ram map_addr
1811 ldr r2, =(Pico+0x22200)
1815 add r0, r0, #\map_addr @ map to our address
1821 .macro m_s68k_write8_2M_decode map_addr
1822 ldr r2, =(Pico+0x22200)
1825 movs r0, r0, lsr #1 @ +4-6 <<16
1826 add r2, r2, #\map_addr @ map to our address
1829 .macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1830 m_s68k_write8_2M_decode \map_addr
1833 movcc r1, r1, lsl #4
1837 cmp r0, r3 @ avoid writing if result is same
1842 .macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1845 m_s68k_write8_2M_decode \map_addr
1847 movcc r1, r1, lsl #4
1858 .macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1861 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1866 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1867 ldr r2, =(Pico+0x22200)
1870 add r3, r0, #0x020000 @ map to our address
1871 add r12,r2, #0x110000
1873 and r12,r12,#0x00ff0000 @ wp
1879 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1880 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1881 m_s68k_write8_ram 0x020000
1884 m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1885 m_s68k_write8_2M_decode_m0 0x080000
1887 m_s68k_write8_2M_decode_b0_m1:
1888 m_s68k_write8_2M_decode_m1 0x080000
1890 m_s68k_write8_2M_decode_b0_m2:
1891 m_s68k_write8_2M_decode_m2 0x080000
1893 m_s68k_write8_2M_decode_b1_m0:
1894 m_s68k_write8_2M_decode_m0 0x0a0000
1896 m_s68k_write8_2M_decode_b1_m1:
1897 m_s68k_write8_2M_decode_m1 0x0a0000
1899 m_s68k_write8_2M_decode_b1_m2:
1900 m_s68k_write8_2M_decode_m2 0x0a0000
1903 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1907 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1908 @ must not trash r3 and r12
1909 ldr r2, =(Pico+0x22200)
1912 bic r0, r0, #0xff0000
1913 bic r0, r0, #0x00e000
1914 add r2, r2, #0x110000
1915 add r2, r2, #0x000200
1919 strb r0, [r1, #0x0e] @ SRam.changed = 1
1924 bic r0, r0, #0xff0000
1926 movlt r0, r0, lsr #1
1932 m_s68k_write8_pcm_ram:
1933 ldr r3, =(Pico+0x22200)
1934 bic r0, r0, #0x00e000
1937 add r2, r3, #0x110000
1938 add r2, r2, #0x002200
1939 add r2, r2, #0x000040
1941 add r3, r3, #0x100000 @ pcm_ram
1942 and r2, r2, #0x0f000000 @ bank
1943 add r3, r3, r2, lsr #12
1949 bic r0, r0, #0xff0000
1950 bic r0, r0, #0x008000
1958 orr r1, r1, r1, lsl #8
1962 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1965 .macro m_s68k_write16_ram map_addr
1966 ldr r2, =(Pico+0x22200)
1970 add r0, r0, #\map_addr @ map to our address
1976 .macro m_s68k_write16_2M_decode map_addr
1977 ldr r2, =(Pico+0x22200)
1980 mov r0, r0, lsr #1 @ +4-6 <<16
1981 add r2, r2, #\map_addr @ map to our address
1984 .macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1985 m_s68k_write16_2M_decode \map_addr
1987 orr r1, r1, r1, lsr #4
1992 .macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1993 bics r1, r1, #0xf000
1994 bicnes r1, r1, #0x00f0
1996 orr r1, r1, r1, lsr #4
1997 m_s68k_write16_2M_decode \map_addr
2009 .macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
2010 bics r1, r1, #0xf000
2011 bicnes r1, r1, #0x00f0
2013 orr r1, r1, r1, lsr #4
2014 m_s68k_write16_2M_decode \map_addr
2028 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
2029 ldr r2, =(Pico+0x22200)
2032 add r3, r0, #0x020000 @ map to our address
2033 add r12,r2, #0x110000
2035 and r12,r12,#0x00ff0000 @ wp
2041 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
2042 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
2043 m_s68k_write16_ram 0x020000
2046 m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
2047 m_s68k_write16_2M_decode_m0 0x080000
2049 m_s68k_write16_2M_decode_b0_m1:
2050 m_s68k_write16_2M_decode_m1 0x080000
2052 m_s68k_write16_2M_decode_b0_m2:
2053 m_s68k_write16_2M_decode_m2 0x080000
2055 m_s68k_write16_2M_decode_b1_m0:
2056 m_s68k_write16_2M_decode_m0 0x0a0000
2058 m_s68k_write16_2M_decode_b1_m1:
2059 m_s68k_write16_2M_decode_m1 0x0a0000
2061 m_s68k_write16_2M_decode_b1_m2:
2062 m_s68k_write16_2M_decode_m2 0x0a0000
2065 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
2066 m_s68k_write16_ram 0
2069 @ m_s68k_write16_backup:
2070 .equiv m_s68k_write16_backup, m_s68k_write8_backup
2073 @ m_s68k_write16_pcm:
2074 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
2077 m_s68k_write16_regs:
2078 bic r0, r0, #0xff0000
2079 bic r0, r0, #0x008000
2085 beq m_s68k_write16_regs_spec
2091 stmfd sp!,{r2,r3,lr}
2094 ldmfd sp!,{r0,r1,lr}
2097 m_s68k_write16_regs_spec: @ special case
2098 ldr r2, =(Pico+0x22200)
2101 add r0, r0, #0x00000f
2102 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
2106 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2109 .macro m_s68k_write32_ram map_addr
2110 ldr r2, =(Pico+0x22200)
2114 add r0, r0, #\map_addr @ map to our address
2120 .macro m_s68k_write32_2M_decode map_addr
2121 ldr r2, =(Pico+0x22200)
2124 mov r0, r0, lsr #1 @ +4-6 <<16
2125 add r2, r2, #\map_addr @ map to our address
2128 .macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
2129 m_s68k_write32_2M_decode \map_addr
2130 bic r1, r1, #0x000000f0
2131 bic r1, r1, #0x00f00000
2132 orr r1, r1, r1, lsr #4
2136 strneb r1, [r2, #-1]
2141 .macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
2142 bics r1, r1, #0x000000f0
2143 bicnes r1, r1, #0x0000f000
2144 bicnes r1, r1, #0x00f00000
2145 bicnes r1, r1, #0xf0000000
2147 orr r1, r1, r1, lsr #4
2148 m_s68k_write32_2M_decode \map_addr
2151 ldrneb r0, [r2, #-1]
2153 and r12,r1, #0x0000000f
2154 orr r0, r0, r3, lsl #16
2155 orrne r0, r0, #0x80000000 @ remember addr lsb bit
2159 andeq r12,r1, #0x000000f0
2162 andeq r12,r1, #0x000f0000
2165 andeq r12,r1, #0x00f00000
2168 strneb r0, [r2, #-1]
2175 .macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
2176 bics r1, r1, #0x000000f0
2177 bicnes r1, r1, #0x0000f000
2178 bicnes r1, r1, #0x00f00000
2179 bicnes r1, r1, #0xf0000000
2181 orr r1, r1, r1, lsr #4
2182 m_s68k_write32_2M_decode \map_addr
2185 ldrneb r0, [r2, #-1]
2187 orrne r1, r1, #0x80000000 @ remember addr lsb bit
2188 orr r0, r0, r3, lsl #16
2190 andeq r12,r0, #0x0000000f
2193 andeq r12,r0, #0x000000f0
2196 andeq r12,r0, #0x000f0000
2199 andeq r12,r0, #0x00f00000
2204 strneb r1, [r2, #-1]
2213 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
2214 ldr r2, =(Pico+0x22200)
2217 add r3, r0, #0x020000 @ map to our address
2218 add r12,r2, #0x110000
2220 and r12,r12,#0x00ff0000 @ wp
2229 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
2230 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
2231 m_s68k_write32_ram 0x020000
2234 m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
2235 m_s68k_write32_2M_decode_m0 0x080000
2237 m_s68k_write32_2M_decode_b0_m1:
2238 m_s68k_write32_2M_decode_m1 0x080000
2240 m_s68k_write32_2M_decode_b0_m2:
2241 m_s68k_write32_2M_decode_m2 0x080000
2243 m_s68k_write32_2M_decode_b1_m0:
2244 m_s68k_write32_2M_decode_m0 0x0a0000
2246 m_s68k_write32_2M_decode_b1_m1:
2247 m_s68k_write32_2M_decode_m1 0x0a0000
2249 m_s68k_write32_2M_decode_b1_m2:
2250 m_s68k_write32_2M_decode_m2 0x0a0000
2253 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
2254 m_s68k_write32_ram 0
2257 m_s68k_write32_backup:
2262 bl m_s68k_write8_backup @ must preserve r3 and r12
2266 b m_s68k_write8_backup
2270 bic r0, r0, #0xff0000
2272 blt m_s68k_write32_pcm_reg
2277 m_s68k_write32_pcm_ram:
2278 ldr r3, =(Pico+0x22200)
2279 bic r0, r0, #0x00e000
2282 add r2, r3, #0x110000
2283 add r2, r2, #0x002200
2284 add r2, r2, #0x000040
2286 add r3, r3, #0x100000 @ pcm_ram
2287 and r2, r2, #0x0f000000 @ bank
2288 add r3, r3, r2, lsr #12
2295 m_s68k_write32_pcm_reg:
2297 stmfd sp!,{r0,r1,lr}
2300 ldmfd sp!,{r0,r1,lr}
2305 m_s68k_write32_regs:
2306 bic r0, r0, #0xff0000
2307 bic r0, r0, #0x008000
2313 blo m_s68k_write32_regs_gfx
2316 beq m_s68k_write32_regs_spec @ hits 0x0f
2319 beq m_s68k_write32_regs_comm
2321 stmfd sp!,{r0,r1,lr}
2334 ldmfd sp!,{r0,r1,lr}
2338 m_s68k_write32_regs_gfx:
2339 stmfd sp!,{r0,r1,lr}
2342 ldmfd sp!,{r0,r1,lr}
2346 m_s68k_write32_regs_comm: @ Handle the 0x20-0x2f range
2347 ldr r2, =(Pico+0x22200)
2350 orr r3, r3, r3, lsl #16
2351 add r2, r2, #0x110000
2352 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
2353 and r1, r3, r1, ror #24
2354 orr r1, r1, r12,lsl #8 @ end of byteswap
2357 movne r1, r1, lsr #16
2361 m_s68k_write32_regs_spec:
2362 stmfd sp!,{r0,r1,lr}
2364 bl m_s68k_write16_regs
2365 ldmfd sp!,{r0,r1,lr}
2367 b m_s68k_write16_regs