3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
17 .macro mk_m68k_jump_table on sz @ operation name, size
18 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
19 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
20 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
23 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
24 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
25 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
26 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
41 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
42 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
46 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
48 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
50 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
54 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
57 .macro mk_s68k_jump_table on sz @ operation name, size
58 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
60 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
61 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
62 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
66 @ the jumptables themselves.
67 m_m68k_read8_table: mk_m68k_jump_table read 8
68 m_m68k_read16_table: mk_m68k_jump_table read 16
69 m_m68k_read32_table: mk_m68k_jump_table read 32
70 m_m68k_write8_table: mk_m68k_jump_table write 8
71 m_m68k_write16_table: mk_m68k_jump_table write 16
72 m_m68k_write32_table: mk_m68k_jump_table write 32
74 m_s68k_read8_table: mk_s68k_jump_table read 8
75 m_s68k_read16_table: mk_s68k_jump_table read 16
76 m_s68k_read32_table: mk_s68k_jump_table read 32
77 m_s68k_write8_table: mk_s68k_jump_table write 8
78 m_s68k_write16_table: mk_s68k_jump_table write 16
79 m_s68k_write32_table: mk_s68k_jump_table write 32
81 m_s68k_decode_write_table:
82 .long m_s68k_write8_2M_decode_b0_m0
83 .long m_s68k_write16_2M_decode_b0_m0
84 .long m_s68k_write32_2M_decode_b0_m0
85 .long m_s68k_write8_2M_decode_b0_m1
86 .long m_s68k_write16_2M_decode_b0_m1
87 .long m_s68k_write32_2M_decode_b0_m1
88 .long m_s68k_write8_2M_decode_b0_m2
89 .long m_s68k_write16_2M_decode_b0_m2
90 .long m_s68k_write32_2M_decode_b0_m2
91 .long m_s68k_write8_2M_decode_b1_m0
92 .long m_s68k_write16_2M_decode_b1_m0
93 .long m_s68k_write32_2M_decode_b1_m0
94 .long m_s68k_write8_2M_decode_b1_m1
95 .long m_s68k_write16_2M_decode_b1_m1
96 .long m_s68k_write32_2M_decode_b1_m1
97 .long m_s68k_write8_2M_decode_b1_m2
98 .long m_s68k_write16_2M_decode_b1_m2
99 .long m_s68k_write32_2M_decode_b1_m2
102 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
107 .global PicoMemResetCD
108 .global PicoMemResetCDdecode
109 .global PicoReadM68k8
110 .global PicoReadM68k16
111 .global PicoReadM68k32
112 .global PicoWriteM68k8
113 .global PicoWriteM68k16
114 .global PicoWriteM68k32
115 .global PicoReadS68k8
116 .global PicoReadS68k16
117 .global PicoReadS68k32
118 .global PicoWriteS68k8
119 .global PicoWriteS68k16
120 .global PicoWriteS68k32
122 @ externs, just for reference
126 .extern PicoVideoRead
127 .extern Read_CDC_Host
128 .extern m68k_reg_write8
132 .extern s68k_reg_read16
134 .extern gfx_cd_write16
135 .extern s68k_reg_write8
136 .extern s68k_poll_adclk
138 .extern s68k_poll_detect
142 @ r0=reg3, r1-r3=temp
143 .macro mk_update_table on sz @ operation name, size
144 @ we only set word-ram handlers
145 ldr r1, =m_m68k_&\on&\sz&_table
146 ldr r12,=m_s68k_&\on&\sz&_table
151 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
152 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
155 ldr r2, =m_&\on&_null
166 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
167 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
170 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
172 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
180 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
181 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
184 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
186 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
197 mk_update_table read 8
198 mk_update_table read 16
199 mk_update_table read 32
200 mk_update_table write 8
201 mk_update_table write 16
202 mk_update_table write 32
206 PicoMemResetCDdecode: @reg3
208 bxeq lr @ we should not be called in 2M mode
209 ldr r1, =m_s68k_write8_table
210 ldr r3, =m_s68k_decode_write_table
214 moveq r2, #2 @ mode3 is same as mode2?
216 addeq r2, r2, #3 @ bank1 (r2=0..5)
217 add r2, r2, r2, lsl #1 @ *= 3
218 add r2, r3, r2, lsl #2
219 ldmia r2, {r0,r3,r12}
222 str r3, [r1, #4*4+8*4]
223 str r3, [r1, #5*4+8*4]
224 str r12,[r1, #4*4+8*4*2]
225 str r12,[r1, #5*4+8*4*2]
231 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
233 .macro mk_entry_m68k table
235 bic r0, r0, #0xff000000
236 and r3, r0, #0x00fe0000
237 ldr pc, [r2, r3, lsr #15]
240 PicoReadM68k8: @ u32 a
241 mk_entry_m68k m_m68k_read8_table
243 PicoReadM68k16: @ u32 a
244 mk_entry_m68k m_m68k_read16_table
246 PicoReadM68k32: @ u32 a
247 mk_entry_m68k m_m68k_read32_table
249 PicoWriteM68k8: @ u32 a, u8 d
250 mk_entry_m68k m_m68k_write8_table
252 PicoWriteM68k16: @ u32 a, u16 d
253 mk_entry_m68k m_m68k_write16_table
255 PicoWriteM68k32: @ u32 a, u32 d
256 mk_entry_m68k m_m68k_write32_table
259 .macro mk_entry_s68k on sz
260 bic r0, r0, #0xff000000
262 blt m_s68k_&\on&\sz&_prg
264 ldrlt r2, =m_s68k_&\on&\sz&_table
265 andlt r3, r0, #0x000e0000
266 ldrlt pc, [r2, r3, lsr #15]
268 orr r3, r3, #0x00008000
270 bge m_s68k_&\on&\sz&_regs
272 bge m_s68k_&\on&\sz&_pcm
274 bge m_s68k_&\on&\sz&_backup
279 PicoReadS68k8: @ u32 a
282 PicoReadS68k16: @ u32 a
283 mk_entry_s68k read 16
285 PicoReadS68k32: @ u32 a
286 mk_entry_s68k read 32
288 PicoWriteS68k8: @ u32 a, u8 d
289 mk_entry_s68k write 8
291 PicoWriteS68k16: @ u32 a, u16 d
292 mk_entry_s68k write 16
294 PicoWriteS68k32: @ u32 a, u32 d
295 mk_entry_s68k write 32
300 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
304 @ r0=addr[in,out], r1,r2=tmp
306 ands r1, r0, #0x01c000
307 ldrne pc, [pc, r1, lsr #12]
308 beq 0f @ most common?
318 and r1, r0, #0x7e00 @ col
319 and r2, r0, #0x01fc @ row
321 orr r1, r2, r1, ror #13
324 and r1, r0, #0x3f00 @ col
325 and r2, r0, #0x00fc @ row
327 orr r1, r2, r1, ror #12
330 and r1, r0, #0x1f80 @ col
331 and r2, r0, #0x007c @ row
332 orr r1, r2, r1, ror #11
334 orr r1, r1, r2, lsr #6
337 and r1, r0, #0xfc00 @ col
338 and r2, r0, #0x03fc @ row
339 orr r1, r2, r1, ror #14
342 orr r0, r0, r1, ror #26 @ rol 4+2
346 @ r0=prt1, r1=ptr2; unaligned ptr MUST be r0
352 moveq r0, r0, ror #16
353 orrne r0, r1, r0, lsl #16
357 @ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0
362 movne r1, r1, lsr #16
368 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
377 ldr r1, =(Pico+0x22200)
378 bic r0, r0, #0xfe0000
385 m_m68k_read8_prgbank:
386 ldr r1, =(Pico+0x22200)
390 orr r3, r2, #0x002200
393 tst r3, #0x00020000 @ have bus?
396 and r2, r2, #0xc0000000 @ r3 & 0xC0
397 add r1, r1, r2, lsr #12
402 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
403 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
404 ldr r1, =(Pico+0x22200)
405 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
412 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
413 ldr r1, =(Pico+0x22200)
414 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
421 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
422 ldr r1, =(Pico+0x22200)
423 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
430 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
432 ldr r1, =(Pico+0x22200)
433 add r0, r0, #0x0c0000
440 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
442 ldr r1, =(Pico+0x22200)
443 add r0, r0, #0x0e0000
450 m_m68k_read8_system_io:
451 bic r2, r0, #0xfe0000
454 bne m_m68k_read8_misc
456 ldr r1, =(Pico+0x22200)
458 ldr r1, [r1] @ Pico.mcd (used everywhere)
460 ldrlt pc, [pc, r0, lsl #2]
462 .long m_m68k_read8_r00
463 .long m_m68k_read8_r01
464 .long m_m68k_read8_r02
465 .long m_m68k_read8_r03
466 .long m_m68k_read8_r04
467 .long m_read_null @ unused bits
468 .long m_m68k_read8_r06
469 .long m_m68k_read8_r07
470 .long m_m68k_read8_r08
471 .long m_m68k_read8_r09
472 .long m_read_null @ reserved
474 .long m_m68k_read8_r0c
475 .long m_m68k_read8_r0d
477 add r1, r1, #0x110000
479 and r0, r0, #0x04000000 @ we need irq2 mask state
483 add r1, r1, #0x110000
484 add r1, r1, #0x002200
485 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
488 add r1, r1, #0x110000
492 add r1, r1, #0x110000
494 add r1, r1, #0x002200
497 tst r1, #2 @ DMNA pending?
503 add r1, r1, #0x110000
507 ldrb r0, [r1, #0x73] @ IRQ vector
514 bl Read_CDC_Host @ TODO: make it local
521 add r1, r1, #0x110000
522 add r1, r1, #0x002200
523 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
527 add r1, r1, #0x110000
528 add r1, r1, #0x002200
536 add r1, r1, #0x110000
544 cmp r2, #0xa00000 @ Z80 RAM?
546 @ ldreq r2, =z80Read8
551 bl OtherRead16 @ non-MCD version should be ok too
561 bxne lr @ invalid read
564 bl PicoVideoRead @ TODO: implement it in asm
573 bic r0, r0, #0xff0000
579 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
583 ldr r1, =(Pico+0x22200)
584 bic r0, r0, #0xfe0000
591 m_m68k_read16_prgbank:
592 ldr r1, =(Pico+0x22200)
596 orr r3, r2, #0x002200
599 tst r3, #0x00020000 @ have bus?
602 and r2, r2, #0xc0000000 @ r3 & 0xC0
603 add r1, r1, r2, lsr #12
608 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
609 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
610 ldr r1, =(Pico+0x22200)
611 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
618 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
619 ldr r1, =(Pico+0x22200)
620 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
627 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
628 ldr r1, =(Pico+0x22200)
629 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
636 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
637 @ Warning: read32 relies on NOT using r3 and r12 here
639 ldr r1, =(Pico+0x22200)
640 add r0, r0, #0x0c0000
647 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
649 ldr r1, =(Pico+0x22200)
650 add r0, r0, #0x0e0000
657 m_m68k_read16_system_io:
658 bic r1, r0, #0xfe0000
661 bne m_m68k_read16_misc
663 m_m68k_read16_m68k_regs:
664 ldr r1, =(Pico+0x22200)
666 ldr r1, [r1] @ Pico.mcd (used everywhere)
668 ldrlt pc, [pc, r0, lsl #1]
670 .long m_m68k_read16_r00
671 .long m_m68k_read16_r02
672 .long m_m68k_read16_r04
673 .long m_m68k_read16_r06
674 .long m_m68k_read16_r08
675 .long m_read_null @ reserved
676 .long m_m68k_read16_r0c
678 add r1, r1, #0x110000
680 add r1, r1, #0x002200
681 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
682 and r0, r0, #0x04000000 @ we need irq2 mask state
683 orr r0, r1, r0, lsr #11
686 add r1, r1, #0x110000
689 add r1, r1, #0x002200
692 orr r0, r2, r0, lsl #8
693 tst r1, #2 @ DMNA pending?
699 add r1, r1, #0x110000
704 ldrh r0, [r1, #0x72] @ IRQ vector
710 add r1, r1, #0x110000
711 add r1, r1, #0x002200
717 addlt r1, r1, #0x110000
723 orr r0, r0, r1, lsl #8
736 bxne lr @ invalid read
743 bic r0, r0, #0xff0000
749 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
753 ldr r1, =(Pico+0x22200)
754 bic r0, r0, #0xfe0000
761 m_m68k_read32_prgbank:
762 ldr r1, =(Pico+0x22200)
766 orr r3, r2, #0x002200
769 tst r3, #0x00020000 @ have bus?
772 and r2, r2, #0xc0000000 @ r3 & 0xC0
773 add r1, r1, r2, lsr #12
778 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
779 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
780 ldr r1, =(Pico+0x22200)
781 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
788 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
789 ldr r1, =(Pico+0x22200)
790 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
797 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
798 ldr r1, =(Pico+0x22200)
799 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
806 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
808 bne m_m68k_read32_wordram1_1M_b0_unal
810 ldr r1, =(Pico+0x22200)
811 add r0, r0, #0x0c0000
816 m_m68k_read32_wordram1_1M_b0_unal:
817 @ hopefully this doesn't happen too often
820 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
824 bl m_m68k_read16_wordram1_1M_b0
825 orr r0, r0, r3, lsl #16
829 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
831 bne m_m68k_read32_wordram1_1M_b1_unal
833 ldr r1, =(Pico+0x22200)
834 add r0, r0, #0x0e0000
839 m_m68k_read32_wordram1_1M_b1_unal:
842 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
846 bl m_m68k_read16_wordram1_1M_b1
847 orr r0, r0, r3, lsl #16
851 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
852 m_m68k_read32_system_io:
853 bic r1, r0, #0xfe0000
856 bne m_m68k_read32_misc
859 blt m_m68k_read32_misc
863 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
865 ldr r1, =(Pico+0x22200)
868 orr r2, r2, r2, lsl #16
869 add r1, r1, #0x110000
871 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
872 and r0, r2, r0, lsr #8
873 orr r0, r0, r1, lsl #8
879 bl m_m68k_read16_system_io
881 bl m_m68k_read16_system_io
883 orr r0, r0, r1, lsl #16
890 bxne lr @ invalid read
898 orr r0, r0, r1, lsl #16
904 bic r0, r0, #0xff0000
911 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
919 m_m68k_write8_prgbank:
920 ldr r2, =(Pico+0x22200)
924 orr r3, r12, #0x002200
927 tst r3, #0x00020000 @ have bus?
929 and r12,r12,#0xc0000000 @ r3 & 0xC0
930 add r2, r2, r12, lsr #12
935 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
936 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
937 ldr r2, =(Pico+0x22200)
938 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
945 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
946 ldr r2, =(Pico+0x22200)
947 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
954 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
955 ldr r2, =(Pico+0x22200)
956 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
963 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
966 ldr r2, =(Pico+0x22200)
967 add r0, r0, #0x0c0000
974 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
977 ldr r2, =(Pico+0x22200)
978 add r0, r0, #0x0e0000
985 m_m68k_write8_system_io:
986 bic r2, r0, #0xfe0000
1003 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
1009 bic r0, r0, #0xff0000
1015 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1018 m_m68k_write16_bios:
1022 m_m68k_write16_prgbank:
1023 ldr r2, =(Pico+0x22200)
1027 orr r3, r12, #0x002200
1030 tst r3, #0x00020000 @ have bus?
1032 and r12,r12,#0xc0000000 @ r3 & 0xC0
1033 add r2, r2, r12, lsr #12
1038 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1039 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1040 ldr r2, =(Pico+0x22200)
1041 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1048 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1049 ldr r2, =(Pico+0x22200)
1050 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1057 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1058 ldr r2, =(Pico+0x22200)
1059 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1066 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1067 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1070 ldr r1, =(Pico+0x22200)
1071 add r0, r0, #0x0c0000
1078 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1081 ldr r1, =(Pico+0x22200)
1082 add r0, r0, #0x0e0000
1089 m_m68k_write16_system_io:
1091 bic r2, r0, #0xfe0000
1096 m_m68k_write16_m68k_regs:
1099 beq m_m68k_write16_regs_spec
1102 stmfd sp!,{r2,r3,lr}
1105 ldmfd sp!,{r0,r1,lr}
1108 m_m68k_write16_regs_spec: @ special case
1109 ldr r2, =(Pico+0x22200)
1110 ldr r3, =s68k_poll_adclk
1113 add r0, r0, #0x00000e
1115 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
1121 ldr r0, =PicoCpuS68k
1122 str r1, [r0, #0x58] @ push s68k out of stopped state
1136 b SN76496Write @ lsb goes to 0x11
1141 bic r0, r0, #0xff0000
1147 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1150 m_m68k_write32_bios:
1154 m_m68k_write32_prgbank:
1155 ldr r2, =(Pico+0x22200)
1159 orr r3, r12, #0x002200
1162 tst r3, #0x00020000 @ have bus?
1164 and r12,r12,#0xc0000000 @ r3 & 0xC0
1165 add r2, r2, r12, lsr #12
1170 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1171 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1172 ldr r2, =(Pico+0x22200)
1173 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1180 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1181 ldr r2, =(Pico+0x22200)
1182 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1189 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1190 ldr r2, =(Pico+0x22200)
1191 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1198 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1200 bne m_m68k_write32_wordram1_1M_b0_unal
1203 ldr r2, =(Pico+0x22200)
1204 add r0, r0, #0x0c0000
1210 m_m68k_write32_wordram1_1M_b0_unal:
1211 @ hopefully this doesn't happen too often
1215 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1219 b m_m68k_write16_wordram1_1M_b0
1222 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1224 bne m_m68k_write32_wordram1_1M_b1_unal
1227 ldr r2, =(Pico+0x22200)
1228 add r0, r0, #0x0e0000
1234 m_m68k_write32_wordram1_1M_b1_unal:
1238 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1242 b m_m68k_write16_wordram1_1M_b1
1245 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1246 m_m68k_write32_system_io:
1247 bic r2, r0, #0xfe0000
1250 bne m_m68k_write32_misc
1253 blt m_m68k_write32_regs
1256 @ Handle the 0x10-0x1f range
1257 ldr r0, =(Pico+0x22200)
1260 orr r3, r3, r3, lsl #16
1261 add r0, r0, #0x110000
1262 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1263 and r1, r3, r1, ror #24
1264 orr r1, r1, r12,lsl #8 @ end of byteswap
1267 movne r1, r1, lsr #16
1271 m_m68k_write32_regs:
1273 stmfd sp!,{r0,r1,lr}
1286 ldmfd sp!,{r0,r1,lr}
1290 m_m68k_write32_misc:
1292 stmfd sp!,{r0,r1,lr}
1295 ldmfd sp!,{r0,r1,lr}
1306 moveq r0, r1, lsr #16
1307 beq SN76496Write @ which game is crazy enough to do that?
1308 stmfd sp!,{r0,r1,lr}
1311 ldmfd sp!,{r0,r1,lr}
1318 bic r0, r0, #0xff0000
1326 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1328 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1331 .macro m_s68k_read8_ram map_addr
1332 ldr r1, =(Pico+0x22200)
1336 add r0, r0, #\map_addr @ map to our address
1342 .macro m_s68k_read8_wordram_2M_decode map_addr
1343 ldr r2, =(Pico+0x22200)
1346 movs r0, r0, lsr #1 @ +4-6 <<16
1347 add r2, r2, #\map_addr @ map to our address
1349 movcc r0, r0, lsr #4
1355 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1356 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1357 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1358 m_s68k_read8_ram 0x020000
1361 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1362 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1365 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1366 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1369 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1373 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1374 @ must not trash r3 and r12
1375 ldr r1, =(Pico+0x22200)
1378 bic r0, r0, #0xff0000
1379 bic r0, r0, #0x00e000
1380 add r1, r1, #0x110000
1381 add r1, r1, #0x000200
1387 @ must not trash r3 and r12
1388 ldr r1, =(Pico+0x22200)
1389 bic r0, r0, #0xff0000
1390 @ bic r0, r0, #0x008000
1393 orr r2, r2, #0x002200
1395 bge m_s68k_read8_pcm_ram
1399 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1402 ldr r1, [r1, r2, lsl #2]
1404 moveq r0, r1, lsr #PCM_STEP_SHIFT
1405 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1409 m_s68k_read8_pcm_ram:
1412 add r1, r1, #0x100000 @ pcm_ram
1413 and r2, r2, #0x0f000000 @ bank
1414 add r1, r1, r2, lsr #12
1415 bic r0, r0, #0x00e000
1422 bic r0, r0, #0xff0000
1423 bic r0, r0, #0x008000
1428 cmp r2, #(0x30-0x0e)
1429 blo m_s68k_read8_comm
1432 ldrlo r2, =gfx_cd_read
1433 ldrhs r2, =s68k_reg_read16
1440 moveq r0, r0, lsr #8
1445 ldr r1, =(Pico+0x22200)
1447 add r1, r1, #0x110000
1452 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1455 .macro m_s68k_read16_ram map_addr
1456 ldr r1, =(Pico+0x22200)
1460 add r0, r0, #\map_addr @ map to our address
1466 .macro m_s68k_read16_wordram_2M_decode map_addr
1467 ldr r2, =(Pico+0x22200)
1470 mov r0, r0, lsr #1 @ +4-6 <<16
1471 add r2, r2, #\map_addr @ map to our address
1473 orr r0, r0, r0, lsl #4
1479 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1480 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1481 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1482 m_s68k_read16_ram 0x020000
1485 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1486 m_s68k_read16_wordram_2M_decode 0x080000
1489 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1490 m_s68k_read16_wordram_2M_decode 0x0a0000
1493 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1497 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1498 @ bram is not meant to be accessed by words, does any game do this?
1499 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1502 @ m_s68k_read16_pcm:
1503 @ pcm is on 8-bit bus, would this be same as byte access?
1504 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1508 bic r0, r0, #0xff0000
1509 bic r0, r0, #0x008000
1510 bic r0, r0, #0x000001
1523 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1526 .macro m_s68k_read32_ram map_addr
1527 ldr r1, =(Pico+0x22200)
1531 add r0, r0, #\map_addr @ map to our address
1537 .macro m_s68k_read32_wordram_2M_decode map_addr
1538 ldr r2, =(Pico+0x22200)
1541 mov r0, r0, lsr #1 @ +4-6 <<16
1542 add r2, r2, #\map_addr @ map to our address
1545 ldrneb r0, [r2, #-1]
1547 orr r1, r1, r1, lsl #4
1549 orr r0, r0, r0, lsl #4
1551 orr r0, r0, r1, lsl #16
1556 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1557 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1558 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1559 m_s68k_read32_ram 0x020000
1562 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1563 m_s68k_read32_wordram_2M_decode 0x080000
1566 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1567 m_s68k_read32_wordram_2M_decode 0x0a0000
1570 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1574 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1575 @ bram is not meant to be accessed by words, does any game do this?
1578 bl m_s68k_read8_backup @ must preserve r3 and r12
1582 bl m_s68k_read8_backup
1583 orr r0, r0, r3, lsl #16
1590 bl m_s68k_read8_pcm @ must preserve r3 and r12
1595 orr r0, r0, r3, lsl #16
1600 bic r0, r0, #0xff0000
1601 bic r0, r0, #0x008000
1602 bic r0, r0, #0x000001
1609 blo m_s68k_read32_regs_gfx
1615 orr r0, r0, r1, lsl #16
1619 m_s68k_read32_regs_gfx:
1625 orr r0, r0, r1, lsl #16
1630 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1633 .macro m_s68k_write8_ram map_addr
1634 ldr r2, =(Pico+0x22200)
1638 add r0, r0, #\map_addr @ map to our address
1644 .macro m_s68k_write8_2M_decode map_addr
1645 ldr r2, =(Pico+0x22200)
1648 movs r0, r0, lsr #1 @ +4-6 <<16
1649 add r2, r2, #\map_addr @ map to our address
1652 .macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1653 m_s68k_write8_2M_decode \map_addr
1656 movcc r1, r1, lsl #4
1660 cmp r0, r3 @ avoid writing if result is same
1665 .macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1668 m_s68k_write8_2M_decode \map_addr
1670 movcc r1, r1, lsl #4
1681 .macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1684 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1689 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1690 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1691 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1692 m_s68k_write8_ram 0x020000
1695 m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1696 m_s68k_write8_2M_decode_m0 0x080000
1698 m_s68k_write8_2M_decode_b0_m1:
1699 m_s68k_write8_2M_decode_m1 0x080000
1701 m_s68k_write8_2M_decode_b0_m2:
1702 m_s68k_write8_2M_decode_m2 0x080000
1704 m_s68k_write8_2M_decode_b1_m0:
1705 m_s68k_write8_2M_decode_m0 0x0a0000
1707 m_s68k_write8_2M_decode_b1_m1:
1708 m_s68k_write8_2M_decode_m1 0x0a0000
1710 m_s68k_write8_2M_decode_b1_m2:
1711 m_s68k_write8_2M_decode_m2 0x0a0000
1714 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1718 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1719 @ must not trash r3 and r12
1720 ldr r2, =(Pico+0x22200)
1723 bic r0, r0, #0xff0000
1724 bic r0, r0, #0x00e000
1725 add r2, r2, #0x110000
1726 add r2, r2, #0x000200
1730 strb r0, [r1, #0x0e] @ SRam.changed = 1
1735 bic r0, r0, #0xff0000
1737 movlt r0, r0, lsr #1
1743 m_s68k_write8_pcm_ram:
1744 ldr r3, =(Pico+0x22200)
1745 bic r0, r0, #0x00e000
1748 add r2, r3, #0x110000
1749 add r2, r2, #0x002200
1750 add r2, r2, #0x000040
1752 add r3, r3, #0x100000 @ pcm_ram
1753 and r2, r2, #0x0f000000 @ bank
1754 add r3, r3, r2, lsr #12
1760 bic r0, r0, #0xff0000
1761 bic r0, r0, #0x008000
1769 orr r1, r1, r1, lsl #8
1773 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1776 .macro m_s68k_write16_ram map_addr
1777 ldr r2, =(Pico+0x22200)
1781 add r0, r0, #\map_addr @ map to our address
1787 .macro m_s68k_write16_2M_decode map_addr
1788 ldr r2, =(Pico+0x22200)
1791 mov r0, r0, lsr #1 @ +4-6 <<16
1792 add r2, r2, #\map_addr @ map to our address
1795 .macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1796 m_s68k_write16_2M_decode \map_addr
1798 orr r1, r1, r1, lsr #4
1803 .macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1804 bics r1, r1, #0xf000
1805 bicnes r1, r1, #0x00f0
1807 orr r1, r1, r1, lsr #4
1808 m_s68k_write16_2M_decode \map_addr
1820 .macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
1821 bics r1, r1, #0xf000
1822 bicnes r1, r1, #0x00f0
1824 orr r1, r1, r1, lsr #4
1825 m_s68k_write16_2M_decode \map_addr
1839 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1840 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1841 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1842 m_s68k_write16_ram 0x020000
1845 m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1846 m_s68k_write16_2M_decode_m0 0x080000
1848 m_s68k_write16_2M_decode_b0_m1:
1849 m_s68k_write16_2M_decode_m1 0x080000
1851 m_s68k_write16_2M_decode_b0_m2:
1852 m_s68k_write16_2M_decode_m2 0x080000
1854 m_s68k_write16_2M_decode_b1_m0:
1855 m_s68k_write16_2M_decode_m0 0x0a0000
1857 m_s68k_write16_2M_decode_b1_m1:
1858 m_s68k_write16_2M_decode_m1 0x0a0000
1860 m_s68k_write16_2M_decode_b1_m2:
1861 m_s68k_write16_2M_decode_m2 0x0a0000
1864 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1865 m_s68k_write16_ram 0
1868 @ m_s68k_write16_backup:
1869 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1872 @ m_s68k_write16_pcm:
1873 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1876 m_s68k_write16_regs:
1877 bic r0, r0, #0xff0000
1878 bic r0, r0, #0x008000
1884 beq m_s68k_write16_regs_spec
1890 stmfd sp!,{r2,r3,lr}
1893 ldmfd sp!,{r0,r1,lr}
1896 m_s68k_write16_regs_spec: @ special case
1897 ldr r2, =(Pico+0x22200)
1900 add r0, r0, #0x00000f
1901 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
1905 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1908 .macro m_s68k_write32_ram map_addr
1909 ldr r2, =(Pico+0x22200)
1913 add r0, r0, #\map_addr @ map to our address
1919 .macro m_s68k_write32_2M_decode map_addr
1920 ldr r2, =(Pico+0x22200)
1923 mov r0, r0, lsr #1 @ +4-6 <<16
1924 add r2, r2, #\map_addr @ map to our address
1927 .macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
1928 m_s68k_write32_2M_decode \map_addr
1929 bic r1, r1, #0x000000f0
1930 bic r1, r1, #0x00f00000
1931 orr r1, r1, r1, lsr #4
1935 strneb r1, [r2, #-1]
1940 .macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
1941 bics r1, r1, #0x000000f0
1942 bicnes r1, r1, #0x0000f000
1943 bicnes r1, r1, #0x00f00000
1944 bicnes r1, r1, #0xf0000000
1946 orr r1, r1, r1, lsr #4
1947 m_s68k_write32_2M_decode \map_addr
1950 ldrneb r0, [r2, #-1]
1952 and r12,r1, #0x0000000f
1953 orr r0, r0, r3, lsl #16
1954 orrne r0, r0, #0x80000000 @ remember addr lsb bit
1958 andeq r12,r1, #0x000000f0
1961 andeq r12,r1, #0x000f0000
1964 andeq r12,r1, #0x00f00000
1967 strneb r0, [r2, #-1]
1974 .macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
1975 bics r1, r1, #0x000000f0
1976 bicnes r1, r1, #0x0000f000
1977 bicnes r1, r1, #0x00f00000
1978 bicnes r1, r1, #0xf0000000
1980 orr r1, r1, r1, lsr #4
1981 m_s68k_write32_2M_decode \map_addr
1984 ldrneb r0, [r2, #-1]
1986 orrne r1, r1, #0x80000000 @ remember addr lsb bit
1987 orr r0, r0, r3, lsl #16
1989 andeq r12,r0, #0x0000000f
1992 andeq r12,r0, #0x000000f0
1995 andeq r12,r0, #0x000f0000
1998 andeq r12,r0, #0x00f00000
2003 strneb r1, [r2, #-1]
2012 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
2013 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
2014 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
2015 m_s68k_write32_ram 0x020000
2018 m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
2019 m_s68k_write32_2M_decode_m0 0x080000
2021 m_s68k_write32_2M_decode_b0_m1:
2022 m_s68k_write32_2M_decode_m1 0x080000
2024 m_s68k_write32_2M_decode_b0_m2:
2025 m_s68k_write32_2M_decode_m2 0x080000
2027 m_s68k_write32_2M_decode_b1_m0:
2028 m_s68k_write32_2M_decode_m0 0x0a0000
2030 m_s68k_write32_2M_decode_b1_m1:
2031 m_s68k_write32_2M_decode_m1 0x0a0000
2033 m_s68k_write32_2M_decode_b1_m2:
2034 m_s68k_write32_2M_decode_m2 0x0a0000
2037 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
2038 m_s68k_write32_ram 0
2041 m_s68k_write32_backup:
2046 bl m_s68k_write8_backup @ must preserve r3 and r12
2050 b m_s68k_write8_backup
2054 bic r0, r0, #0xff0000
2056 blt m_s68k_write32_pcm_reg
2061 m_s68k_write32_pcm_ram:
2062 ldr r3, =(Pico+0x22200)
2063 bic r0, r0, #0x00e000
2066 add r2, r3, #0x110000
2067 add r2, r2, #0x002200
2068 add r2, r2, #0x000040
2070 add r3, r3, #0x100000 @ pcm_ram
2071 and r2, r2, #0x0f000000 @ bank
2072 add r3, r3, r2, lsr #12
2079 m_s68k_write32_pcm_reg:
2083 stmfd sp!,{r2,r3,lr}
2086 ldmfd sp!,{r0,r1,lr}
2090 m_s68k_write32_regs:
2091 bic r0, r0, #0xff0000
2092 bic r0, r0, #0x008000
2099 blo m_s68k_write32_regs_gfx
2101 stmfd sp!,{r0,r1,lr}
2114 ldmfd sp!,{r0,r1,lr}
2118 m_s68k_write32_regs_gfx:
2121 stmfd sp!,{r2,r3,lr}
2124 ldmfd sp!,{r0,r1,lr}