3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
17 .macro mk_m68k_jump_table on sz @ operation name, size
18 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
19 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
20 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
23 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
24 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
25 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
26 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
41 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
42 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
46 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
48 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
50 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
54 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
57 .macro mk_s68k_jump_table on sz @ operation name, size
58 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
60 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
61 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
62 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
66 @ the jumptables themselves.
67 m_m68k_read8_table: mk_m68k_jump_table read 8
68 m_m68k_read16_table: mk_m68k_jump_table read 16
69 m_m68k_read32_table: mk_m68k_jump_table read 32
70 m_m68k_write8_table: mk_m68k_jump_table write 8
71 m_m68k_write16_table: mk_m68k_jump_table write 16
72 m_m68k_write32_table: mk_m68k_jump_table write 32
74 m_s68k_read8_table: mk_s68k_jump_table read 8
75 m_s68k_read16_table: mk_s68k_jump_table read 16
76 m_s68k_read32_table: mk_s68k_jump_table read 32
77 m_s68k_write8_table: mk_s68k_jump_table write 8
78 m_s68k_write16_table: mk_s68k_jump_table write 16
79 m_s68k_write32_table: mk_s68k_jump_table write 32
81 m_s68k_decode_write_table:
82 .long m_s68k_write8_2M_decode_b0_m0
83 .long m_s68k_write16_2M_decode_b0_m0
84 .long m_s68k_write32_2M_decode_b0_m0
85 .long m_s68k_write8_2M_decode_b0_m1
86 .long m_s68k_write16_2M_decode_b0_m1
87 .long m_s68k_write32_2M_decode_b0_m1
88 .long m_s68k_write8_2M_decode_b0_m2
89 .long m_s68k_write16_2M_decode_b0_m2
90 .long m_s68k_write32_2M_decode_b0_m2
91 .long m_s68k_write8_2M_decode_b1_m0
92 .long m_s68k_write16_2M_decode_b1_m0
93 .long m_s68k_write32_2M_decode_b1_m0
94 .long m_s68k_write8_2M_decode_b1_m1
95 .long m_s68k_write16_2M_decode_b1_m1
96 .long m_s68k_write32_2M_decode_b1_m1
97 .long m_s68k_write8_2M_decode_b1_m2
98 .long m_s68k_write16_2M_decode_b1_m2
99 .long m_s68k_write32_2M_decode_b1_m2
102 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
107 .global PicoMemResetCD
108 .global PicoMemResetCDdecode
109 .global PicoReadM68k8
110 .global PicoReadM68k16
111 .global PicoReadM68k32
112 .global PicoWriteM68k8
113 .global PicoWriteM68k16
114 .global PicoWriteM68k32
115 .global PicoReadS68k8
116 .global PicoReadS68k16
117 .global PicoReadS68k32
118 .global PicoWriteS68k8
119 .global PicoWriteS68k16
120 .global PicoWriteS68k32
122 @ externs, just for reference
126 .extern PicoVideoRead
127 .extern Read_CDC_Host
128 .extern m68k_reg_write8
132 .extern s68k_reg_read16
134 .extern gfx_cd_write16
135 .extern s68k_reg_write8
136 .extern s68k_poll_adclk
140 @ r0=reg3, r1-r3=temp
141 .macro mk_update_table on sz @ operation name, size
142 @ we only set word-ram handlers
143 ldr r1, =m_m68k_&\on&\sz&_table
144 ldr r12,=m_s68k_&\on&\sz&_table
149 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
150 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
153 ldr r2, =m_&\on&_null
164 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
165 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
168 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
170 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
178 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
179 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
182 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
184 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
195 mk_update_table read 8
196 mk_update_table read 16
197 mk_update_table read 32
198 mk_update_table write 8
199 mk_update_table write 16
200 mk_update_table write 32
204 PicoMemResetCDdecode: @reg3
206 bxeq lr @ we should not be called in 2M mode
207 ldr r1, =m_s68k_write8_table
208 ldr r3, =m_s68k_decode_write_table
212 moveq r2, #2 @ mode3 is same as mode2?
214 addeq r2, r2, #3 @ bank1 (r2=0..5)
215 add r2, r2, r2, lsl #1 @ *= 3
216 add r2, r3, r2, lsl #2
217 ldmia r2, {r0,r3,r12}
220 str r3, [r1, #4*4+8*4]
221 str r3, [r1, #5*4+8*4]
222 str r12,[r1, #4*4+8*4*2]
223 str r12,[r1, #5*4+8*4*2]
229 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
231 .macro mk_entry_m68k table
233 bic r0, r0, #0xff000000
234 and r3, r0, #0x00fe0000
235 ldr pc, [r2, r3, lsr #15]
238 PicoReadM68k8: @ u32 a
239 mk_entry_m68k m_m68k_read8_table
241 PicoReadM68k16: @ u32 a
242 mk_entry_m68k m_m68k_read16_table
244 PicoReadM68k32: @ u32 a
245 mk_entry_m68k m_m68k_read32_table
247 PicoWriteM68k8: @ u32 a, u8 d
248 mk_entry_m68k m_m68k_write8_table
250 PicoWriteM68k16: @ u32 a, u16 d
251 mk_entry_m68k m_m68k_write16_table
253 PicoWriteM68k32: @ u32 a, u32 d
254 mk_entry_m68k m_m68k_write32_table
257 .macro mk_entry_s68k on sz
258 bic r0, r0, #0xff000000
260 blt m_s68k_&\on&\sz&_prg
262 ldrlt r2, =m_s68k_&\on&\sz&_table
263 andlt r3, r0, #0x000e0000
264 ldrlt pc, [r2, r3, lsr #15]
266 orr r3, r3, #0x00008000
268 bge m_s68k_&\on&\sz&_regs
270 bge m_s68k_&\on&\sz&_pcm
272 bge m_s68k_&\on&\sz&_backup
277 PicoReadS68k8: @ u32 a
280 PicoReadS68k16: @ u32 a
281 mk_entry_s68k read 16
283 PicoReadS68k32: @ u32 a
284 mk_entry_s68k read 32
286 PicoWriteS68k8: @ u32 a, u8 d
287 mk_entry_s68k write 8
289 PicoWriteS68k16: @ u32 a, u16 d
290 mk_entry_s68k write 16
292 PicoWriteS68k32: @ u32 a, u32 d
293 mk_entry_s68k write 32
298 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
302 @ r0=addr[in,out], r1,r2=tmp
304 ands r1, r0, #0x01c000
305 ldrne pc, [pc, r1, lsr #12]
306 beq 0f @ most common?
316 and r1, r0, #0x7e00 @ col
317 and r2, r0, #0x01fc @ row
319 orr r1, r2, r1, ror #13
322 and r1, r0, #0x3f00 @ col
323 and r2, r0, #0x00fc @ row
325 orr r1, r2, r1, ror #12
328 and r1, r0, #0x1f80 @ col
329 and r2, r0, #0x007c @ row
330 orr r1, r2, r1, ror #11
332 orr r1, r1, r2, lsr #6
335 and r1, r0, #0xfc00 @ col
336 and r2, r0, #0x03fc @ row
337 orr r1, r2, r1, ror #14
340 orr r0, r0, r1, ror #26 @ rol 4+2
344 @ r0=prt1, r1=ptr2; unaligned ptr MUST be r0
350 moveq r0, r0, ror #16
351 orrne r0, r1, r0, lsl #16
355 @ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0
360 movne r1, r1, lsr #16
366 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
375 ldr r1, =(Pico+0x22200)
376 bic r0, r0, #0xfe0000
383 m_m68k_read8_prgbank:
384 ldr r1, =(Pico+0x22200)
388 orr r3, r2, #0x002200
391 tst r3, #0x00020000 @ have bus?
394 and r2, r2, #0xc0000000 @ r3 & 0xC0
395 add r1, r1, r2, lsr #12
400 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
401 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
402 ldr r1, =(Pico+0x22200)
403 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
410 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
411 ldr r1, =(Pico+0x22200)
412 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
419 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
420 ldr r1, =(Pico+0x22200)
421 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
428 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
430 ldr r1, =(Pico+0x22200)
431 add r0, r0, #0x0c0000
438 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
440 ldr r1, =(Pico+0x22200)
441 add r0, r0, #0x0e0000
448 m_m68k_read8_system_io:
449 bic r2, r0, #0xfe0000
452 bne m_m68k_read8_misc
454 ldr r1, =(Pico+0x22200)
456 ldr r1, [r1] @ Pico.mcd (used everywhere)
458 ldrlt pc, [pc, r0, lsl #2]
460 .long m_m68k_read8_r00
461 .long m_m68k_read8_r01
462 .long m_m68k_read8_r02
463 .long m_m68k_read8_r03
464 .long m_m68k_read8_r04
465 .long m_read_null @ unused bits
466 .long m_m68k_read8_r06
467 .long m_m68k_read8_r07
468 .long m_m68k_read8_r08
469 .long m_m68k_read8_r09
470 .long m_read_null @ reserved
472 .long m_m68k_read8_r0c
473 .long m_m68k_read8_r0d
475 add r1, r1, #0x110000
477 and r0, r0, #0x04000000 @ we need irq2 mask state
481 add r1, r1, #0x110000
482 add r1, r1, #0x002200
483 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
486 add r1, r1, #0x110000
490 add r1, r1, #0x110000
495 add r1, r1, #0x110000
499 ldrb r0, [r1, #0x73] @ IRQ vector
506 bl Read_CDC_Host @ TODO: make it local
513 add r1, r1, #0x110000
514 add r1, r1, #0x002200
515 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
519 add r1, r1, #0x110000
520 add r1, r1, #0x002200
528 add r1, r1, #0x110000
536 cmp r2, #0xa00000 @ Z80 RAM?
538 @ ldreq r2, =z80Read8
543 bl OtherRead16 @ non-MCD version should be ok too
553 bxne lr @ invalid read
556 bl PicoVideoRead @ TODO: implement it in asm
565 bic r0, r0, #0xff0000
571 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
575 ldr r1, =(Pico+0x22200)
576 bic r0, r0, #0xfe0000
583 m_m68k_read16_prgbank:
584 ldr r1, =(Pico+0x22200)
588 orr r3, r2, #0x002200
591 tst r3, #0x00020000 @ have bus?
594 and r2, r2, #0xc0000000 @ r3 & 0xC0
595 add r1, r1, r2, lsr #12
600 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
601 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
602 ldr r1, =(Pico+0x22200)
603 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
610 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
611 ldr r1, =(Pico+0x22200)
612 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
619 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
620 ldr r1, =(Pico+0x22200)
621 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
628 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
629 @ Warning: read32 relies on NOT using r3 and r12 here
631 ldr r1, =(Pico+0x22200)
632 add r0, r0, #0x0c0000
639 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
641 ldr r1, =(Pico+0x22200)
642 add r0, r0, #0x0e0000
649 m_m68k_read16_system_io:
650 bic r1, r0, #0xfe0000
653 bne m_m68k_read16_misc
655 m_m68k_read16_m68k_regs:
656 ldr r1, =(Pico+0x22200)
658 ldr r1, [r1] @ Pico.mcd (used everywhere)
660 ldrlt pc, [pc, r0, lsl #1]
662 .long m_m68k_read16_r00
663 .long m_m68k_read16_r02
664 .long m_m68k_read16_r04
665 .long m_m68k_read16_r06
666 .long m_m68k_read16_r08
667 .long m_read_null @ reserved
668 .long m_m68k_read16_r0c
670 add r1, r1, #0x110000
672 add r1, r1, #0x002200
673 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
674 and r0, r0, #0x04000000 @ we need irq2 mask state
675 orr r0, r1, r0, lsr #11
678 add r1, r1, #0x110000
682 orr r0, r1, r0, lsl #8
685 add r1, r1, #0x110000
690 ldrh r0, [r1, #0x72] @ IRQ vector
696 add r1, r1, #0x110000
697 add r1, r1, #0x002200
703 addlt r1, r1, #0x110000
709 orr r0, r0, r1, lsl #8
722 bxne lr @ invalid read
729 bic r0, r0, #0xff0000
735 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
739 ldr r1, =(Pico+0x22200)
740 bic r0, r0, #0xfe0000
747 m_m68k_read32_prgbank:
748 ldr r1, =(Pico+0x22200)
752 orr r3, r2, #0x002200
755 tst r3, #0x00020000 @ have bus?
758 and r2, r2, #0xc0000000 @ r3 & 0xC0
759 add r1, r1, r2, lsr #12
764 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
765 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
766 ldr r1, =(Pico+0x22200)
767 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
774 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
775 ldr r1, =(Pico+0x22200)
776 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
783 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
784 ldr r1, =(Pico+0x22200)
785 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
792 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
794 bne m_m68k_read32_wordram1_1M_b0_unal
796 ldr r1, =(Pico+0x22200)
797 add r0, r0, #0x0c0000
802 m_m68k_read32_wordram1_1M_b0_unal:
803 @ hopefully this doesn't happen too often
806 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
810 bl m_m68k_read16_wordram1_1M_b0
811 orr r0, r0, r3, lsl #16
815 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
817 bne m_m68k_read32_wordram1_1M_b1_unal
819 ldr r1, =(Pico+0x22200)
820 add r0, r0, #0x0e0000
825 m_m68k_read32_wordram1_1M_b1_unal:
828 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
832 bl m_m68k_read16_wordram1_1M_b1
833 orr r0, r0, r3, lsl #16
837 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
838 m_m68k_read32_system_io:
839 bic r1, r0, #0xfe0000
842 bne m_m68k_read32_misc
845 blt m_m68k_read32_misc
849 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
851 ldr r1, =(Pico+0x22200)
854 orr r2, r2, r2, lsl #16
855 add r1, r1, #0x110000
857 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
858 and r0, r2, r0, lsr #8
859 orr r0, r0, r1, lsl #8
865 bl m_m68k_read16_system_io
867 bl m_m68k_read16_system_io
869 orr r0, r0, r1, lsl #16
876 bxne lr @ invalid read
884 orr r0, r0, r1, lsl #16
890 bic r0, r0, #0xff0000
897 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
905 m_m68k_write8_prgbank:
906 ldr r2, =(Pico+0x22200)
910 orr r3, r12, #0x002200
913 tst r3, #0x00020000 @ have bus?
915 and r12,r12,#0xc0000000 @ r3 & 0xC0
916 add r2, r2, r12, lsr #12
921 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
922 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
923 ldr r2, =(Pico+0x22200)
924 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
931 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
932 ldr r2, =(Pico+0x22200)
933 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
940 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
941 ldr r2, =(Pico+0x22200)
942 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
949 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
952 ldr r2, =(Pico+0x22200)
953 add r0, r0, #0x0c0000
960 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
963 ldr r2, =(Pico+0x22200)
964 add r0, r0, #0x0e0000
971 m_m68k_write8_system_io:
972 bic r2, r0, #0xfe0000
985 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
991 bic r0, r0, #0xff0000
997 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1000 m_m68k_write16_bios:
1004 m_m68k_write16_prgbank:
1005 ldr r2, =(Pico+0x22200)
1009 orr r3, r12, #0x002200
1012 tst r3, #0x00020000 @ have bus?
1014 and r12,r12,#0xc0000000 @ r3 & 0xC0
1015 add r2, r2, r12, lsr #12
1020 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1021 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1022 ldr r2, =(Pico+0x22200)
1023 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1030 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1031 ldr r2, =(Pico+0x22200)
1032 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1039 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1040 ldr r2, =(Pico+0x22200)
1041 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1048 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1049 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1052 ldr r1, =(Pico+0x22200)
1053 add r0, r0, #0x0c0000
1060 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1063 ldr r1, =(Pico+0x22200)
1064 add r0, r0, #0x0e0000
1071 m_m68k_write16_system_io:
1073 bic r2, r0, #0xfe0000
1078 m_m68k_write16_m68k_regs:
1081 beq m_m68k_write16_regs_spec
1084 stmfd sp!,{r2,r3,lr}
1087 ldmfd sp!,{r0,r1,lr}
1090 m_m68k_write16_regs_spec: @ special case
1091 ldr r2, =(Pico+0x22200)
1092 ldr r3, =s68k_poll_adclk
1095 add r0, r0, #0x00000e
1097 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
1103 ldr r0, =PicoCpuS68k
1104 str r1, [r0, #0x58] @ push s68k out of stopped state
1119 bic r0, r0, #0xff0000
1125 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1128 m_m68k_write32_bios:
1132 m_m68k_write32_prgbank:
1133 ldr r2, =(Pico+0x22200)
1137 orr r3, r12, #0x002200
1140 tst r3, #0x00020000 @ have bus?
1142 and r12,r12,#0xc0000000 @ r3 & 0xC0
1143 add r2, r2, r12, lsr #12
1148 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1149 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1150 ldr r2, =(Pico+0x22200)
1151 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1158 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1159 ldr r2, =(Pico+0x22200)
1160 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1167 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1168 ldr r2, =(Pico+0x22200)
1169 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1176 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1178 bne m_m68k_write32_wordram1_1M_b0_unal
1181 ldr r2, =(Pico+0x22200)
1182 add r0, r0, #0x0c0000
1188 m_m68k_write32_wordram1_1M_b0_unal:
1189 @ hopefully this doesn't happen too often
1193 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1197 b m_m68k_write16_wordram1_1M_b0
1200 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1202 bne m_m68k_write32_wordram1_1M_b1_unal
1205 ldr r2, =(Pico+0x22200)
1206 add r0, r0, #0x0e0000
1212 m_m68k_write32_wordram1_1M_b1_unal:
1216 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1220 b m_m68k_write16_wordram1_1M_b1
1223 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1224 m_m68k_write32_system_io:
1225 bic r2, r0, #0xfe0000
1228 bne m_m68k_write32_misc
1231 blt m_m68k_write32_regs
1234 @ Handle the 0x10-0x1f range
1235 ldr r0, =(Pico+0x22200)
1238 orr r3, r3, r3, lsl #16
1239 add r0, r0, #0x110000
1240 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1241 and r1, r3, r1, ror #24
1242 orr r1, r1, r12,lsl #8 @ end of byteswap
1245 movne r1, r1, lsr #16
1249 m_m68k_write32_regs:
1251 stmfd sp!,{r0,r1,lr}
1264 ldmfd sp!,{r0,r1,lr}
1268 m_m68k_write32_misc:
1270 stmfd sp!,{r0,r1,lr}
1273 ldmfd sp!,{r0,r1,lr}
1282 stmfd sp!,{r0,r1,lr}
1285 ldmfd sp!,{r0,r1,lr}
1292 bic r0, r0, #0xff0000
1300 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1302 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1305 .macro m_s68k_read8_ram map_addr
1306 ldr r1, =(Pico+0x22200)
1310 add r0, r0, #\map_addr @ map to our address
1316 .macro m_s68k_read8_wordram_2M_decode map_addr
1317 ldr r2, =(Pico+0x22200)
1320 movs r0, r0, lsr #1 @ +4-6 <<16
1321 add r2, r2, #\map_addr @ map to our address
1323 movcc r0, r0, lsr #4
1329 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1330 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1331 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1332 m_s68k_read8_ram 0x020000
1335 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1336 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1339 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1340 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1343 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1347 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1348 @ must not trash r3 and r12
1349 ldr r1, =(Pico+0x22200)
1352 bic r0, r0, #0xff0000
1353 bic r0, r0, #0x00e000
1354 add r1, r1, #0x110000
1355 add r1, r1, #0x000200
1361 @ must not trash r3 and r12
1362 ldr r1, =(Pico+0x22200)
1363 bic r0, r0, #0xff0000
1364 @ bic r0, r0, #0x008000
1367 orr r2, r2, #0x002200
1369 bge m_s68k_read8_pcm_ram
1373 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1376 ldr r1, [r1, r2, lsl #2]
1378 moveq r0, r1, lsr #PCM_STEP_SHIFT
1379 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1383 m_s68k_read8_pcm_ram:
1386 add r1, r1, #0x100000 @ pcm_ram
1387 and r2, r2, #0x0f000000 @ bank
1388 add r1, r1, r2, lsr #12
1389 bic r0, r0, #0x00e000
1396 bic r0, r0, #0xff0000
1397 bic r0, r0, #0x008000
1403 ldrlo r2, =gfx_cd_read
1404 ldrhs r2, =s68k_reg_read16
1411 moveq r0, r0, lsr #8
1416 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1419 .macro m_s68k_read16_ram map_addr
1420 ldr r1, =(Pico+0x22200)
1424 add r0, r0, #\map_addr @ map to our address
1430 .macro m_s68k_read16_wordram_2M_decode map_addr
1431 ldr r2, =(Pico+0x22200)
1434 mov r0, r0, lsr #1 @ +4-6 <<16
1435 add r2, r2, #\map_addr @ map to our address
1437 orr r0, r0, r0, lsl #4
1443 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1444 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1445 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1446 m_s68k_read16_ram 0x020000
1449 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1450 m_s68k_read16_wordram_2M_decode 0x080000
1453 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1454 m_s68k_read16_wordram_2M_decode 0x0a0000
1457 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1461 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1462 @ bram is not meant to be accessed by words, does any game do this?
1463 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1466 @ m_s68k_read16_pcm:
1467 @ pcm is on 8-bit bus, would this be same as byte access?
1468 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1472 bic r0, r0, #0xff0000
1473 bic r0, r0, #0x008000
1474 bic r0, r0, #0x000001
1487 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1490 .macro m_s68k_read32_ram map_addr
1491 ldr r1, =(Pico+0x22200)
1495 add r0, r0, #\map_addr @ map to our address
1501 .macro m_s68k_read32_wordram_2M_decode map_addr
1502 ldr r2, =(Pico+0x22200)
1505 mov r0, r0, lsr #1 @ +4-6 <<16
1506 add r2, r2, #\map_addr @ map to our address
1509 ldrneb r0, [r2, #-1]
1511 orr r1, r1, r1, lsl #4
1513 orr r0, r0, r0, lsl #4
1515 orr r0, r0, r1, lsl #16
1520 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1521 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1522 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1523 m_s68k_read32_ram 0x020000
1526 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1527 m_s68k_read32_wordram_2M_decode 0x080000
1530 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1531 m_s68k_read32_wordram_2M_decode 0x0a0000
1534 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1538 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1539 @ bram is not meant to be accessed by words, does any game do this?
1542 bl m_s68k_read8_backup @ must preserve r3 and r12
1546 bl m_s68k_read8_backup
1547 orr r0, r0, r3, lsl #16
1554 bl m_s68k_read8_pcm @ must preserve r3 and r12
1559 orr r0, r0, r3, lsl #16
1564 bic r0, r0, #0xff0000
1565 bic r0, r0, #0x008000
1566 bic r0, r0, #0x000001
1573 blo m_s68k_read32_regs_gfx
1579 orr r0, r0, r1, lsl #16
1583 m_s68k_read32_regs_gfx:
1589 orr r0, r0, r1, lsl #16
1594 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1597 .macro m_s68k_write8_ram map_addr
1598 ldr r2, =(Pico+0x22200)
1602 add r0, r0, #\map_addr @ map to our address
1608 .macro m_s68k_write8_2M_decode map_addr
1609 ldr r2, =(Pico+0x22200)
1612 movs r0, r0, lsr #1 @ +4-6 <<16
1613 add r2, r2, #\map_addr @ map to our address
1616 .macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1617 m_s68k_write8_2M_decode \map_addr
1620 movcc r1, r1, lsl #4
1624 cmp r0, r3 @ avoid writing if result is same
1629 .macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1632 m_s68k_write8_2M_decode \map_addr
1634 movcc r1, r1, lsl #4
1645 .macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1648 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1653 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1654 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1655 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1656 m_s68k_write8_ram 0x020000
1659 m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1660 m_s68k_write8_2M_decode_m0 0x080000
1662 m_s68k_write8_2M_decode_b0_m1:
1663 m_s68k_write8_2M_decode_m1 0x080000
1665 m_s68k_write8_2M_decode_b0_m2:
1666 m_s68k_write8_2M_decode_m2 0x080000
1668 m_s68k_write8_2M_decode_b1_m0:
1669 m_s68k_write8_2M_decode_m0 0x0a0000
1671 m_s68k_write8_2M_decode_b1_m1:
1672 m_s68k_write8_2M_decode_m1 0x0a0000
1674 m_s68k_write8_2M_decode_b1_m2:
1675 m_s68k_write8_2M_decode_m2 0x0a0000
1678 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1682 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1683 @ must not trash r3 and r12
1684 ldr r2, =(Pico+0x22200)
1687 bic r0, r0, #0xff0000
1688 bic r0, r0, #0x00e000
1689 add r2, r2, #0x110000
1690 add r2, r2, #0x000200
1694 strb r0, [r1, #0x0e] @ SRam.changed = 1
1699 bic r0, r0, #0xff0000
1701 movlt r0, r0, lsr #1
1707 m_s68k_write8_pcm_ram:
1708 ldr r3, =(Pico+0x22200)
1709 bic r0, r0, #0x00e000
1712 add r2, r3, #0x110000
1713 add r2, r2, #0x002200
1714 add r2, r2, #0x000040
1716 add r3, r3, #0x100000 @ pcm_ram
1717 and r2, r2, #0x0f000000 @ bank
1718 add r3, r3, r2, lsr #12
1724 bic r0, r0, #0xff0000
1725 bic r0, r0, #0x008000
1733 orr r1, r1, r1, lsl #8
1737 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1740 .macro m_s68k_write16_ram map_addr
1741 ldr r2, =(Pico+0x22200)
1745 add r0, r0, #\map_addr @ map to our address
1751 .macro m_s68k_write16_2M_decode map_addr
1752 ldr r2, =(Pico+0x22200)
1755 mov r0, r0, lsr #1 @ +4-6 <<16
1756 add r2, r2, #\map_addr @ map to our address
1759 .macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1760 m_s68k_write16_2M_decode \map_addr
1762 orr r1, r1, r1, lsr #4
1767 .macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1768 bics r1, r1, #0xf000
1769 bicnes r1, r1, #0x00f0
1771 orr r1, r1, r1, lsr #4
1772 m_s68k_write16_2M_decode \map_addr
1784 .macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
1785 bics r1, r1, #0xf000
1786 bicnes r1, r1, #0x00f0
1788 orr r1, r1, r1, lsr #4
1789 m_s68k_write16_2M_decode \map_addr
1803 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1804 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1805 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1806 m_s68k_write16_ram 0x020000
1809 m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1810 m_s68k_write16_2M_decode_m0 0x080000
1812 m_s68k_write16_2M_decode_b0_m1:
1813 m_s68k_write16_2M_decode_m1 0x080000
1815 m_s68k_write16_2M_decode_b0_m2:
1816 m_s68k_write16_2M_decode_m2 0x080000
1818 m_s68k_write16_2M_decode_b1_m0:
1819 m_s68k_write16_2M_decode_m0 0x0a0000
1821 m_s68k_write16_2M_decode_b1_m1:
1822 m_s68k_write16_2M_decode_m1 0x0a0000
1824 m_s68k_write16_2M_decode_b1_m2:
1825 m_s68k_write16_2M_decode_m2 0x0a0000
1828 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1829 m_s68k_write16_ram 0
1832 @ m_s68k_write16_backup:
1833 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1836 @ m_s68k_write16_pcm:
1837 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1840 m_s68k_write16_regs:
1841 bic r0, r0, #0xff0000
1842 bic r0, r0, #0x008000
1848 beq m_s68k_write16_regs_spec
1854 stmfd sp!,{r2,r3,lr}
1857 ldmfd sp!,{r0,r1,lr}
1860 m_s68k_write16_regs_spec: @ special case
1861 ldr r2, =(Pico+0x22200)
1864 add r0, r0, #0x00000f
1865 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
1869 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1872 .macro m_s68k_write32_ram map_addr
1873 ldr r2, =(Pico+0x22200)
1877 add r0, r0, #\map_addr @ map to our address
1883 .macro m_s68k_write32_2M_decode map_addr
1884 ldr r2, =(Pico+0x22200)
1887 mov r0, r0, lsr #1 @ +4-6 <<16
1888 add r2, r2, #\map_addr @ map to our address
1891 .macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
1892 m_s68k_write32_2M_decode \map_addr
1893 bic r1, r1, #0x000000f0
1894 bic r1, r1, #0x00f00000
1895 orr r1, r1, r1, lsr #4
1899 strneb r1, [r2, #-1]
1904 .macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
1905 bics r1, r1, #0x000000f0
1906 bicnes r1, r1, #0x0000f000
1907 bicnes r1, r1, #0x00f00000
1908 bicnes r1, r1, #0xf0000000
1910 orr r1, r1, r1, lsr #4
1911 m_s68k_write32_2M_decode \map_addr
1914 ldrneb r0, [r2, #-1]
1916 and r12,r1, #0x0000000f
1917 orr r0, r0, r3, lsl #16
1918 orrne r0, r0, #0x80000000 @ remember addr lsb bit
1922 andeq r12,r1, #0x000000f0
1925 andeq r12,r1, #0x000f0000
1928 andeq r12,r1, #0x00f00000
1931 strneb r0, [r2, #-1]
1938 .macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
1939 bics r1, r1, #0x000000f0
1940 bicnes r1, r1, #0x0000f000
1941 bicnes r1, r1, #0x00f00000
1942 bicnes r1, r1, #0xf0000000
1944 orr r1, r1, r1, lsr #4
1945 m_s68k_write32_2M_decode \map_addr
1948 ldrneb r0, [r2, #-1]
1950 orrne r1, r1, #0x80000000 @ remember addr lsb bit
1951 orr r0, r0, r3, lsl #16
1953 andeq r12,r0, #0x0000000f
1956 andeq r12,r0, #0x000000f0
1959 andeq r12,r0, #0x000f0000
1962 andeq r12,r0, #0x00f00000
1967 strneb r1, [r2, #-1]
1976 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
1977 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
1978 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1979 m_s68k_write32_ram 0x020000
1982 m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1983 m_s68k_write32_2M_decode_m0 0x080000
1985 m_s68k_write32_2M_decode_b0_m1:
1986 m_s68k_write32_2M_decode_m1 0x080000
1988 m_s68k_write32_2M_decode_b0_m2:
1989 m_s68k_write32_2M_decode_m2 0x080000
1991 m_s68k_write32_2M_decode_b1_m0:
1992 m_s68k_write32_2M_decode_m0 0x0a0000
1994 m_s68k_write32_2M_decode_b1_m1:
1995 m_s68k_write32_2M_decode_m1 0x0a0000
1997 m_s68k_write32_2M_decode_b1_m2:
1998 m_s68k_write32_2M_decode_m2 0x0a0000
2001 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
2002 m_s68k_write32_ram 0
2005 m_s68k_write32_backup:
2010 bl m_s68k_write8_backup @ must preserve r3 and r12
2014 b m_s68k_write8_backup
2018 bic r0, r0, #0xff0000
2020 blt m_s68k_write32_pcm_reg
2025 m_s68k_write32_pcm_ram:
2026 ldr r3, =(Pico+0x22200)
2027 bic r0, r0, #0x00e000
2030 add r2, r3, #0x110000
2031 add r2, r2, #0x002200
2032 add r2, r2, #0x000040
2034 add r3, r3, #0x100000 @ pcm_ram
2035 and r2, r2, #0x0f000000 @ bank
2036 add r3, r3, r2, lsr #12
2043 m_s68k_write32_pcm_reg:
2047 stmfd sp!,{r2,r3,lr}
2050 ldmfd sp!,{r0,r1,lr}
2054 m_s68k_write32_regs:
2055 bic r0, r0, #0xff0000
2056 bic r0, r0, #0x008000
2063 blo m_s68k_write32_regs_gfx
2065 stmfd sp!,{r0,r1,lr}
2078 ldmfd sp!,{r0,r1,lr}
2082 m_s68k_write32_regs_gfx:
2085 stmfd sp!,{r2,r3,lr}
2088 ldmfd sp!,{r0,r1,lr}