3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
16 .macro mk_m68k_jump_table on sz @ operation name, size
17 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
18 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
19 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
20 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
23 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
24 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
25 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
26 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
41 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
42 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
46 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
48 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
50 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
56 .macro mk_s68k_jump_table on sz @ operation name, size
57 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
58 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
60 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
61 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
65 @ the jumptables themselves.
66 m_m68k_read8_table: mk_m68k_jump_table read 8
67 m_m68k_read16_table: mk_m68k_jump_table read 16
68 m_m68k_read32_table: mk_m68k_jump_table read 32
69 m_m68k_write8_table: mk_m68k_jump_table write 8
70 m_m68k_write16_table: mk_m68k_jump_table write 16
71 m_m68k_write32_table: mk_m68k_jump_table write 32
73 m_s68k_read8_table: mk_s68k_jump_table read 8
74 m_s68k_read16_table: mk_s68k_jump_table read 16
75 m_s68k_read32_table: mk_s68k_jump_table read 32
76 m_s68k_write8_table: mk_s68k_jump_table write 8
77 m_s68k_write16_table: mk_s68k_jump_table write 16
78 m_s68k_write32_table: mk_s68k_jump_table write 32
80 m_s68k_decode_write_table:
81 .long m_s68k_write8_2M_decode_b0_m0
82 .long m_s68k_write16_2M_decode_b0_m0
83 .long m_s68k_write32_2M_decode_b0_m0
84 .long m_s68k_write8_2M_decode_b0_m1
85 .long m_s68k_write16_2M_decode_b0_m1
86 .long m_s68k_write32_2M_decode_b0_m1
87 .long m_s68k_write8_2M_decode_b0_m2
88 .long m_s68k_write16_2M_decode_b0_m2
89 .long m_s68k_write32_2M_decode_b0_m2
90 .long m_s68k_write8_2M_decode_b1_m0
91 .long m_s68k_write16_2M_decode_b1_m0
92 .long m_s68k_write32_2M_decode_b1_m0
93 .long m_s68k_write8_2M_decode_b1_m1
94 .long m_s68k_write16_2M_decode_b1_m1
95 .long m_s68k_write32_2M_decode_b1_m1
96 .long m_s68k_write8_2M_decode_b1_m2
97 .long m_s68k_write16_2M_decode_b1_m2
98 .long m_s68k_write32_2M_decode_b1_m2
101 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
106 .global PicoMemResetCD
107 .global PicoMemResetCDdecode
108 .global PicoReadM68k8
109 .global PicoReadM68k16
110 .global PicoReadM68k32
111 .global PicoWriteM68k8
112 .global PicoWriteM68k16
113 .global PicoWriteM68k32
114 .global PicoReadS68k8
115 .global PicoReadS68k16
116 .global PicoReadS68k32
117 .global PicoWriteS68k8
118 .global PicoWriteS68k16
119 .global PicoWriteS68k32
121 @ externs, just for reference
125 .extern PicoVideoRead
126 .extern Read_CDC_Host
127 .extern m68k_reg_write8
131 .extern s68k_reg_read16
133 .extern gfx_cd_write16
134 .extern s68k_reg_write8
137 @ r0=reg3, r1-r3=temp
138 .macro mk_update_table on sz @ operation name, size
139 @ we only set word-ram handlers
140 ldr r1, =m_m68k_&\on&\sz&_table
141 ldr r12,=m_s68k_&\on&\sz&_table
146 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
147 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
150 ldr r2, =m_&\on&_null
161 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
162 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
165 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
167 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
175 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
176 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
179 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
181 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
192 mk_update_table read 8
193 mk_update_table read 16
194 mk_update_table read 32
195 mk_update_table write 8
196 mk_update_table write 16
197 mk_update_table write 32
201 PicoMemResetCDdecode: @r3
202 ldr r1, =m_s68k_write8_table
203 ldr r3, =m_s68k_decode_write_table
207 moveq r2, #2 @ mode3 is same as mode2?
209 addeq r2, r2, #3 @ bank1 (r2=0..5)
210 add r2, r2, r2, lsl #1 @ *= 3
211 add r2, r3, r2, lsl #2
212 ldmia r2, {r0,r3,r12}
215 str r3, [r1, #4*4+8*4]
216 str r3, [r1, #5*4+8*4]
217 str r12,[r1, #4*4+8*4*2]
218 str r12,[r1, #5*4+8*4*2]
224 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
226 .macro mk_entry_m68k table
228 bic r0, r0, #0xff000000
229 and r3, r0, #0x00fe0000
230 ldr pc, [r2, r3, lsr #15]
233 PicoReadM68k8: @ u32 a
234 mk_entry_m68k m_m68k_read8_table
236 PicoReadM68k16: @ u32 a
237 mk_entry_m68k m_m68k_read16_table
239 PicoReadM68k32: @ u32 a
240 mk_entry_m68k m_m68k_read32_table
242 PicoWriteM68k8: @ u32 a, u8 d
243 mk_entry_m68k m_m68k_write8_table
245 PicoWriteM68k16: @ u32 a, u16 d
246 mk_entry_m68k m_m68k_write16_table
248 PicoWriteM68k32: @ u32 a, u32 d
249 mk_entry_m68k m_m68k_write32_table
252 .macro mk_entry_s68k on sz
253 bic r0, r0, #0xff000000
255 blt m_s68k_&\on&\sz&_prg
257 ldrlt r2, =m_s68k_&\on&\sz&_table
258 andlt r3, r0, #0x000e0000
259 ldrlt pc, [r2, r3, lsr #15]
261 orr r3, r3, #0x00008000
263 bge m_s68k_&\on&\sz&_regs
265 bge m_s68k_&\on&\sz&_pcm
267 bge m_s68k_&\on&\sz&_backup
272 PicoReadS68k8: @ u32 a
275 PicoReadS68k16: @ u32 a
276 mk_entry_s68k read 16
278 PicoReadS68k32: @ u32 a
279 mk_entry_s68k read 32
281 PicoWriteS68k8: @ u32 a, u8 d
282 mk_entry_s68k write 8
284 PicoWriteS68k16: @ u32 a, u16 d
285 mk_entry_s68k write 16
287 PicoWriteS68k32: @ u32 a, u32 d
288 mk_entry_s68k write 32
293 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
297 @ r0=addr[in,out], r1,r2=tmp
299 ands r1, r0, #0x01c000
300 ldrne pc, [pc, r1, lsr #12]
301 beq 0f @ most common?
311 and r1, r0, #0x7e00 @ col
312 and r2, r0, #0x01fc @ row
314 orr r1, r2, r1, ror #13
317 and r1, r0, #0x3f00 @ col
318 and r2, r0, #0x00fc @ row
320 orr r1, r2, r1, ror #12
323 and r1, r0, #0x1f80 @ col
324 and r2, r0, #0x007c @ row
325 orr r1, r2, r1, ror #11
327 orr r1, r1, r2, lsr #6
330 and r1, r0, #0xfc00 @ col
331 and r2, r0, #0x03fc @ row
332 orr r1, r2, r1, ror #14
335 orr r0, r0, r1, ror #26 @ rol 4+2
345 moveq r0, r0, ror #16
346 orrne r0, r1, r0, lsl #16
350 @ r0=prt1, r1=data, r2=ptr2
355 movne r1, r1, lsr #16
361 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
370 ldr r1, =(Pico+0x22200)
371 bic r0, r0, #0xfe0000
378 m_m68k_read8_prgbank:
379 ldr r1, =(Pico+0x22200)
383 orr r3, r2, #0x002200
386 tst r3, #0x00020000 @ have bus?
389 and r2, r2, #0xc0000000 @ r3 & 0xC0
390 add r1, r1, r2, lsr #12
395 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
396 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
397 ldr r1, =(Pico+0x22200)
398 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
405 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
406 ldr r1, =(Pico+0x22200)
407 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
414 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
415 ldr r1, =(Pico+0x22200)
416 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
423 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
425 ldr r1, =(Pico+0x22200)
426 add r0, r0, #0x0c0000
433 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
435 ldr r1, =(Pico+0x22200)
436 add r0, r0, #0x0e0000
443 m_m68k_read8_system_io:
444 bic r2, r0, #0xfe0000
447 bne m_m68k_read8_misc
449 ldr r1, =(Pico+0x22200)
451 ldr r1, [r1] @ Pico.mcd (used everywhere)
453 ldrlt pc, [pc, r0, lsl #2]
455 .long m_m68k_read8_r00
456 .long m_m68k_read8_r01
457 .long m_m68k_read8_r02
458 .long m_m68k_read8_r03
459 .long m_m68k_read8_r04
460 .long m_read_null @ unused bits
461 .long m_m68k_read8_r06
462 .long m_m68k_read8_r07
463 .long m_m68k_read8_r08
464 .long m_m68k_read8_r09
465 .long m_read_null @ reserved
467 .long m_m68k_read8_r0c
468 .long m_m68k_read8_r0d
470 add r1, r1, #0x110000
472 and r0, r0, #0x04000000 @ we need irq2 mask state
476 add r1, r1, #0x110000
477 add r1, r1, #0x002200
478 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
481 add r1, r1, #0x110000
485 add r1, r1, #0x110000
490 add r1, r1, #0x110000
494 ldrb r0, [r1, #0x73] @ IRQ vector
501 bl Read_CDC_Host @ TODO: make it local
508 add r1, r1, #0x110000
509 add r1, r1, #0x002200
510 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
514 add r1, r1, #0x110000
515 add r1, r1, #0x002200
523 add r1, r1, #0x110000
531 cmp r2, #0xa00000 @ Z80 RAM?
533 @ ldreq r2, =z80Read8
538 bl OtherRead16 @ non-MCD version should be ok too
548 bxne lr @ invalid read
551 bl PicoVideoRead @ TODO: implement it in asm
560 bic r0, r0, #0xff0000
566 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
570 ldr r1, =(Pico+0x22200)
571 bic r0, r0, #0xfe0000
578 m_m68k_read16_prgbank:
579 ldr r1, =(Pico+0x22200)
583 orr r3, r2, #0x002200
586 tst r3, #0x00020000 @ have bus?
589 and r2, r2, #0xc0000000 @ r3 & 0xC0
590 add r1, r1, r2, lsr #12
595 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
596 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
597 ldr r1, =(Pico+0x22200)
598 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
605 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
606 ldr r1, =(Pico+0x22200)
607 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
614 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
615 ldr r1, =(Pico+0x22200)
616 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
623 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
624 @ Warning: read32 relies on NOT using r3 and r12 here
626 ldr r1, =(Pico+0x22200)
627 add r0, r0, #0x0c0000
634 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
636 ldr r1, =(Pico+0x22200)
637 add r0, r0, #0x0e0000
644 m_m68k_read16_system_io:
645 bic r1, r0, #0xfe0000
648 bne m_m68k_read16_misc
650 m_m68k_read16_m68k_regs:
651 ldr r1, =(Pico+0x22200)
653 ldr r1, [r1] @ Pico.mcd (used everywhere)
655 ldrlt pc, [pc, r0, lsl #1]
657 .long m_m68k_read16_r00
658 .long m_m68k_read16_r02
659 .long m_m68k_read16_r04
660 .long m_m68k_read16_r06
661 .long m_m68k_read16_r08
662 .long m_read_null @ reserved
663 .long m_m68k_read16_r0c
665 add r1, r1, #0x110000
667 add r1, r1, #0x002200
668 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
669 and r0, r0, #0x04000000 @ we need irq2 mask state
670 orr r0, r1, r0, lsr #11
673 add r1, r1, #0x110000
677 orr r0, r1, r0, lsl #8
680 add r1, r1, #0x110000
685 ldrh r0, [r1, #0x72] @ IRQ vector
691 add r1, r1, #0x110000
692 add r1, r1, #0x002200
698 addlt r1, r1, #0x110000
704 orr r0, r0, r1, lsl #8
717 bxne lr @ invalid read
724 bic r0, r0, #0xff0000
730 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
734 ldr r1, =(Pico+0x22200)
735 bic r0, r0, #0xfe0000
742 m_m68k_read32_prgbank:
743 ldr r1, =(Pico+0x22200)
747 orr r3, r2, #0x002200
750 tst r3, #0x00020000 @ have bus?
753 and r2, r2, #0xc0000000 @ r3 & 0xC0
754 add r1, r1, r2, lsr #12
759 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
760 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
761 ldr r1, =(Pico+0x22200)
762 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
769 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
770 ldr r1, =(Pico+0x22200)
771 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
778 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
779 ldr r1, =(Pico+0x22200)
780 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
787 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
789 bne m_m68k_read32_wordram1_1M_b0_unal
791 ldr r1, =(Pico+0x22200)
792 add r0, r0, #0x0c0000
797 m_m68k_read32_wordram1_1M_b0_unal:
798 @ hopefully this doesn't happen too often
801 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
805 bl m_m68k_read16_wordram1_1M_b0
806 orr r0, r0, r3, lsl #16
810 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
812 bne m_m68k_read32_wordram1_1M_b1_unal
814 ldr r1, =(Pico+0x22200)
815 add r0, r0, #0x0e0000
820 m_m68k_read32_wordram1_1M_b1_unal:
823 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
827 bl m_m68k_read16_wordram1_1M_b1
828 orr r0, r0, r3, lsl #16
832 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
833 m_m68k_read32_system_io:
834 bic r1, r0, #0xfe0000
837 bne m_m68k_read32_misc
840 blt m_m68k_read32_misc
844 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
845 ldr r0, =(Pico+0x22200)
848 orr r2, r2, r2, lsl #16
849 add r0, r0, #0x110000
851 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
852 and r0, r2, r0, lsr #8
853 orr r0, r0, r1, lsl #8
859 bl m_m68k_read16_system_io
861 bl m_m68k_read16_system_io
863 orr r0, r0, r1, lsl #16
870 bxne lr @ invalid read
878 orr r0, r0, r1, lsl #16
884 bic r0, r0, #0xff0000
891 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
899 m_m68k_write8_prgbank:
900 ldr r2, =(Pico+0x22200)
904 orr r3, r12, #0x002200
907 tst r3, #0x00020000 @ have bus?
909 and r12,r12,#0xc0000000 @ r3 & 0xC0
910 add r2, r2, r12, lsr #12
915 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
916 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
917 ldr r2, =(Pico+0x22200)
918 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
925 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
926 ldr r2, =(Pico+0x22200)
927 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
934 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
935 ldr r2, =(Pico+0x22200)
936 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
943 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
946 ldr r2, =(Pico+0x22200)
947 add r0, r0, #0x0c0000
954 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
957 ldr r2, =(Pico+0x22200)
958 add r0, r0, #0x0e0000
965 m_m68k_write8_system_io:
966 bic r2, r0, #0xfe0000
979 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
985 bic r0, r0, #0xff0000
991 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
998 m_m68k_write16_prgbank:
999 ldr r2, =(Pico+0x22200)
1003 orr r3, r12, #0x002200
1006 tst r3, #0x00020000 @ have bus?
1008 and r12,r12,#0xc0000000 @ r3 & 0xC0
1009 add r2, r2, r12, lsr #12
1014 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1015 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1016 ldr r2, =(Pico+0x22200)
1017 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1024 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1025 ldr r2, =(Pico+0x22200)
1026 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1033 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1034 ldr r2, =(Pico+0x22200)
1035 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1042 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1043 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1046 ldr r1, =(Pico+0x22200)
1047 add r0, r0, #0x0c0000
1054 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1057 ldr r1, =(Pico+0x22200)
1058 add r0, r0, #0x0e0000
1065 m_m68k_write16_system_io:
1067 bic r2, r0, #0xfe0000
1072 m_m68k_write16_m68k_regs:
1075 stmfd sp!,{r2,r3,lr}
1078 ldmfd sp!,{r0,r1,lr}
1092 bic r0, r0, #0xff0000
1098 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1101 m_m68k_write32_bios:
1105 m_m68k_write32_prgbank:
1106 ldr r2, =(Pico+0x22200)
1110 orr r3, r12, #0x002200
1113 tst r3, #0x00020000 @ have bus?
1115 and r12,r12,#0xc0000000 @ r3 & 0xC0
1116 add r2, r2, r12, lsr #12
1121 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1122 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1123 ldr r2, =(Pico+0x22200)
1124 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1131 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1132 ldr r2, =(Pico+0x22200)
1133 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1140 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1141 ldr r2, =(Pico+0x22200)
1142 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1149 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1151 bne m_m68k_write32_wordram1_1M_b0_unal
1154 ldr r2, =(Pico+0x22200)
1155 add r0, r0, #0x0c0000
1161 m_m68k_write32_wordram1_1M_b0_unal:
1162 @ hopefully this doesn't happen too often
1166 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1170 b m_m68k_write16_wordram1_1M_b0
1173 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1175 bne m_m68k_write32_wordram1_1M_b1_unal
1178 ldr r2, =(Pico+0x22200)
1179 add r0, r0, #0x0e0000
1185 m_m68k_write32_wordram1_1M_b1_unal:
1189 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1193 b m_m68k_write16_wordram1_1M_b1
1196 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1197 m_m68k_write32_system_io:
1198 bic r2, r0, #0xfe0000
1201 bne m_m68k_write32_misc
1204 blt m_m68k_write32_regs
1207 @ Handle the 0x10-0x1f range
1208 ldr r0, =(Pico+0x22200)
1211 orr r3, r3, r3, lsl #16
1212 add r0, r0, #0x110000
1213 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1214 and r1, r3, r1, ror #24
1215 orr r1, r1, r12,lsl #8 @ end of byteswap
1218 movne r1, r1, lsr #16
1222 m_m68k_write32_regs:
1224 stmfd sp!,{r0,r1,lr}
1237 ldmfd sp!,{r0,r1,lr}
1241 m_m68k_write32_misc:
1243 stmfd sp!,{r0,r1,lr}
1246 ldmfd sp!,{r0,r1,lr}
1255 stmfd sp!,{r0,r1,lr}
1258 ldmfd sp!,{r0,r1,lr}
1265 bic r0, r0, #0xff0000
1273 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1275 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1278 .macro m_s68k_read8_ram map_addr
1279 ldr r1, =(Pico+0x22200)
1283 add r0, r0, #\map_addr @ map to our address
1289 .macro m_s68k_read8_wordram_2M_decode map_addr
1290 ldr r2, =(Pico+0x22200)
1293 movs r0, r0, lsr #1 @ +4-6 <<16
1294 add r2, r2, #\map_addr @ map to our address
1296 movcc r0, r0, lsr #4
1302 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1303 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1304 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1305 m_s68k_read8_ram 0x020000
1308 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1309 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1312 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1313 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1316 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1320 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1321 @ must not trash r3 and r12
1322 ldr r1, =(Pico+0x22200)
1325 bic r0, r0, #0xff0000
1326 bic r0, r0, #0x00e000
1327 add r1, r1, #0x110000
1328 add r1, r1, #0x000200
1334 @ must not trash r3 and r12
1335 ldr r1, =(Pico+0x22200)
1336 bic r0, r0, #0xff0000
1337 @ bic r0, r0, #0x008000
1340 orr r2, r2, #0x002200
1342 bge m_s68k_read8_pcm_ram
1346 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1349 ldr r1, [r1, r2, lsl #2]
1351 moveq r0, r1, lsr #PCM_STEP_SHIFT
1352 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1356 m_s68k_read8_pcm_ram:
1359 add r1, r1, #0x100000 @ pcm_ram
1360 and r2, r2, #0x0f000000 @ bank
1361 add r1, r1, r2, lsr #12
1362 bic r0, r0, #0x00e000
1369 bic r0, r0, #0xff0000
1370 bic r0, r0, #0x008000
1376 ldrlo r2, =gfx_cd_read
1377 ldrhs r2, =s68k_reg_read16
1384 moveq r0, r0, lsr #8
1389 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1392 .macro m_s68k_read16_ram map_addr
1393 ldr r1, =(Pico+0x22200)
1397 add r0, r0, #\map_addr @ map to our address
1403 .macro m_s68k_read16_wordram_2M_decode map_addr
1404 ldr r2, =(Pico+0x22200)
1407 mov r0, r0, lsr #1 @ +4-6 <<16
1408 add r2, r2, #\map_addr @ map to our address
1410 orr r0, r0, r0, lsl #4
1416 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1417 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1418 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1419 m_s68k_read16_ram 0x020000
1422 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1423 m_s68k_read16_wordram_2M_decode 0x080000
1426 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1427 m_s68k_read16_wordram_2M_decode 0x0a0000
1430 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1434 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1435 @ bram is not meant to be accessed by words, does any game do this?
1436 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1439 @ m_s68k_read16_pcm:
1440 @ pcm is on 8-bit bus, would this be same as byte access?
1441 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1445 bic r0, r0, #0xff0000
1446 bic r0, r0, #0x008000
1447 bic r0, r0, #0x000001
1457 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1460 .macro m_s68k_read32_ram map_addr
1461 ldr r1, =(Pico+0x22200)
1465 add r0, r0, #\map_addr @ map to our address
1471 .macro m_s68k_read32_wordram_2M_decode map_addr
1472 ldr r2, =(Pico+0x22200)
1475 mov r0, r0, lsr #1 @ +4-6 <<16
1476 add r2, r2, #\map_addr @ map to our address
1479 ldrneb r0, [r2, #-1]
1481 orr r1, r1, r1, lsl #4
1483 orr r0, r0, r0, lsl #4
1485 orr r0, r0, r1, lsl #16
1490 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1491 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1492 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1493 m_s68k_read32_ram 0x020000
1496 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1497 m_s68k_read32_wordram_2M_decode 0x080000
1500 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1501 m_s68k_read32_wordram_2M_decode 0x0a0000
1504 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1508 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1509 @ bram is not meant to be accessed by words, does any game do this?
1512 bl m_s68k_read8_backup @ must preserve r3 and r12
1516 bl m_s68k_read8_backup
1517 orr r0, r0, r3, lsl #16
1524 bl m_s68k_read8_pcm @ must preserve r3 and r12
1529 orr r0, r0, r3, lsl #16
1534 bic r0, r0, #0xff0000
1535 bic r0, r0, #0x008000
1536 bic r0, r0, #0x000001
1543 blo m_s68k_read32_regs_gfx
1549 orr r0, r0, r1, lsl #16
1553 m_s68k_read32_regs_gfx:
1559 orr r0, r0, r1, lsl #16
1564 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1567 .macro m_s68k_write8_ram map_addr
1568 ldr r2, =(Pico+0x22200)
1572 add r0, r0, #\map_addr @ map to our address
1578 .macro m_s68k_write8_2M_decode map_addr
1579 ldr r2, =(Pico+0x22200)
1582 movs r0, r0, lsr #1 @ +4-6 <<16
1583 add r2, r2, #\map_addr @ map to our address
1586 .macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1587 m_s68k_write8_2M_decode \map_addr
1590 movcc r1, r1, lsl #4
1594 cmp r0, r3 @ avoid writing if result is same
1599 .macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1602 m_s68k_write8_2M_decode \map_addr
1604 movcc r1, r1, lsl #4
1615 .macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1618 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1623 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1624 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1625 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1626 m_s68k_write8_ram 0x020000
1629 m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1630 m_s68k_write8_2M_decode_m0 0x080000
1632 m_s68k_write8_2M_decode_b0_m1:
1633 m_s68k_write8_2M_decode_m1 0x080000
1635 m_s68k_write8_2M_decode_b0_m2:
1636 m_s68k_write8_2M_decode_m2 0x080000
1638 m_s68k_write8_2M_decode_b1_m0:
1639 m_s68k_write8_2M_decode_m0 0x0a0000
1641 m_s68k_write8_2M_decode_b1_m1:
1642 m_s68k_write8_2M_decode_m1 0x0a0000
1644 m_s68k_write8_2M_decode_b1_m2:
1645 m_s68k_write8_2M_decode_m2 0x0a0000
1648 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1652 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1653 @ must not trash r3 and r12
1654 ldr r2, =(Pico+0x22200)
1657 bic r0, r0, #0xff0000
1658 bic r0, r0, #0x00e000
1659 add r2, r2, #0x110000
1660 add r2, r2, #0x000200
1664 str r0, [r1, #0x0e] @ SRam.changed = 1
1669 bic r0, r0, #0xff0000
1671 movlt r0, r0, lsr #1
1677 m_s68k_write8_pcm_ram:
1678 ldr r3, =(Pico+0x22200)
1679 bic r0, r0, #0x00e000
1682 add r2, r3, #0x110000
1683 add r2, r2, #0x002200
1684 add r2, r2, #0x000040
1686 add r3, r3, #0x100000 @ pcm_ram
1687 and r2, r2, #0x0f000000 @ bank
1688 add r3, r3, r2, lsr #12
1694 bic r0, r0, #0xff0000
1695 bic r0, r0, #0x008000
1703 orr r1, r1, r1, lsl #8
1707 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1710 .macro m_s68k_write16_ram map_addr
1711 ldr r2, =(Pico+0x22200)
1715 add r0, r0, #\map_addr @ map to our address
1721 .macro m_s68k_write16_2M_decode map_addr
1722 ldr r2, =(Pico+0x22200)
1725 mov r0, r0, lsr #1 @ +4-6 <<16
1726 add r2, r2, #\map_addr @ map to our address
1729 .macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1730 m_s68k_write16_2M_decode \map_addr
1732 orr r1, r1, r1, lsr #4
1737 .macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1738 bics r1, r1, #0xf000
1739 bicnes r1, r1, #0x00f0
1741 orr r1, r1, r1, lsr #4
1742 m_s68k_write16_2M_decode \map_addr
1754 .macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
1755 bics r1, r1, #0xf000
1756 bicnes r1, r1, #0x00f0
1758 orr r1, r1, r1, lsr #4
1759 m_s68k_write16_2M_decode \map_addr
1773 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1774 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1775 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1776 m_s68k_write16_ram 0x020000
1779 m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1780 m_s68k_write16_2M_decode_m0 0x080000
1782 m_s68k_write16_2M_decode_b0_m1:
1783 m_s68k_write16_2M_decode_m1 0x080000
1785 m_s68k_write16_2M_decode_b0_m2:
1786 m_s68k_write16_2M_decode_m2 0x080000
1788 m_s68k_write16_2M_decode_b1_m0:
1789 m_s68k_write16_2M_decode_m0 0x0a0000
1791 m_s68k_write16_2M_decode_b1_m1:
1792 m_s68k_write16_2M_decode_m1 0x0a0000
1794 m_s68k_write16_2M_decode_b1_m2:
1795 m_s68k_write16_2M_decode_m2 0x0a0000
1798 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1799 m_s68k_write16_ram 0
1802 @ m_s68k_write16_backup:
1803 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1806 @ m_s68k_write16_pcm:
1807 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1810 m_s68k_write16_regs:
1811 bic r0, r0, #0xff0000
1812 bic r0, r0, #0x008000
1818 beq m_s68k_write16_regs_spec
1824 stmfd sp!,{r2,r3,lr}
1827 ldmfd sp!,{r0,r1,lr}
1830 m_s68k_write16_regs_spec: @ special case
1831 ldr r2, =(Pico+0x22200)
1834 add r0, r0, #0x00000f
1835 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
1839 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1842 .macro m_s68k_write32_ram map_addr
1843 ldr r2, =(Pico+0x22200)
1847 add r0, r0, #\map_addr @ map to our address
1853 .macro m_s68k_write32_2M_decode map_addr
1854 ldr r2, =(Pico+0x22200)
1857 mov r0, r0, lsr #1 @ +4-6 <<16
1858 add r2, r2, #\map_addr @ map to our address
1861 .macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
1862 m_s68k_write32_2M_decode \map_addr
1863 bic r1, r1, #0x000000f0
1864 bic r1, r1, #0x00f00000
1865 orr r1, r1, r1, lsr #4
1869 strneb r1, [r2, #-1]
1874 .macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
1875 bics r1, r1, #0x000000f0
1876 bicnes r1, r1, #0x0000f000
1877 bicnes r1, r1, #0x00f00000
1878 bicnes r1, r1, #0xf0000000
1880 orr r1, r1, r1, lsr #4
1881 m_s68k_write32_2M_decode \map_addr
1884 ldrneb r0, [r2, #-1]
1886 and r12,r1, #0x0000000f
1887 orr r0, r0, r3, lsl #16
1888 orrne r0, r0, #0x80000000 @ remember addr lsb bit
1892 andeq r12,r1, #0x000000f0
1895 andeq r12,r1, #0x000f0000
1898 andeq r12,r1, #0x00f00000
1901 strneb r0, [r2, #-1]
1908 .macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
1909 bics r1, r1, #0x000000f0
1910 bicnes r1, r1, #0x0000f000
1911 bicnes r1, r1, #0x00f00000
1912 bicnes r1, r1, #0xf0000000
1914 orr r1, r1, r1, lsr #4
1915 m_s68k_write32_2M_decode \map_addr
1918 ldrneb r0, [r2, #-1]
1920 orrne r1, r1, #0x80000000 @ remember addr lsb bit
1921 orr r0, r0, r3, lsl #16
1923 andeq r12,r0, #0x0000000f
1926 andeq r12,r0, #0x000000f0
1929 andeq r12,r0, #0x000f0000
1932 andeq r12,r0, #0x00f00000
1937 strneb r1, [r2, #-1]
1946 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
1947 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
1948 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1949 m_s68k_write32_ram 0x020000
1952 m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1953 m_s68k_write32_2M_decode_m0 0x080000
1955 m_s68k_write32_2M_decode_b0_m1:
1956 m_s68k_write32_2M_decode_m1 0x080000
1958 m_s68k_write32_2M_decode_b0_m2:
1959 m_s68k_write32_2M_decode_m2 0x080000
1961 m_s68k_write32_2M_decode_b1_m0:
1962 m_s68k_write32_2M_decode_m0 0x0a0000
1964 m_s68k_write32_2M_decode_b1_m1:
1965 m_s68k_write32_2M_decode_m1 0x0a0000
1967 m_s68k_write32_2M_decode_b1_m2:
1968 m_s68k_write32_2M_decode_m2 0x0a0000
1971 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1972 m_s68k_write32_ram 0
1975 m_s68k_write32_backup:
1980 bl m_s68k_write8_backup @ must preserve r3 and r12
1984 b m_s68k_write8_backup
1988 bic r0, r0, #0xff0000
1990 blt m_s68k_write32_pcm_reg
1995 m_s68k_write32_pcm_ram:
1996 ldr r3, =(Pico+0x22200)
1997 bic r0, r0, #0x00e000
2000 add r2, r3, #0x110000
2001 add r2, r2, #0x002200
2002 add r2, r2, #0x000040
2004 add r3, r3, #0x100000 @ pcm_ram
2005 and r2, r2, #0x0f000000 @ bank
2006 add r3, r3, r2, lsr #12
2013 m_s68k_write32_pcm_reg:
2017 stmfd sp!,{r2,r3,lr}
2020 ldmfd sp!,{r0,r1,lr}
2024 m_s68k_write32_regs:
2025 bic r0, r0, #0xff0000
2026 bic r0, r0, #0x008000
2033 blo m_s68k_write32_regs_gfx
2035 stmfd sp!,{r0,r1,lr}
2048 ldmfd sp!,{r0,r1,lr}
2052 m_s68k_write32_regs_gfx:
2055 stmfd sp!,{r2,r3,lr}
2058 ldmfd sp!,{r0,r1,lr}