3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
17 .macro mk_m68k_jump_table on sz @ operation name, size
18 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
19 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
20 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
23 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
24 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
25 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
26 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
41 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
42 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
46 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
48 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
50 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
54 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
57 .macro mk_s68k_jump_table on sz @ operation name, size
58 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
60 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
61 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
62 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
66 @ the jumptables themselves.
67 m_m68k_read8_table: mk_m68k_jump_table read 8
68 m_m68k_read16_table: mk_m68k_jump_table read 16
69 m_m68k_read32_table: mk_m68k_jump_table read 32
70 m_m68k_write8_table: mk_m68k_jump_table write 8
71 m_m68k_write16_table: mk_m68k_jump_table write 16
72 m_m68k_write32_table: mk_m68k_jump_table write 32
74 m_s68k_read8_table: mk_s68k_jump_table read 8
75 m_s68k_read16_table: mk_s68k_jump_table read 16
76 m_s68k_read32_table: mk_s68k_jump_table read 32
77 m_s68k_write8_table: mk_s68k_jump_table write 8
78 m_s68k_write16_table: mk_s68k_jump_table write 16
79 m_s68k_write32_table: mk_s68k_jump_table write 32
81 m_s68k_decode_write_table:
82 .long m_s68k_write8_2M_decode_b0_m0
83 .long m_s68k_write16_2M_decode_b0_m0
84 .long m_s68k_write32_2M_decode_b0_m0
85 .long m_s68k_write8_2M_decode_b0_m1
86 .long m_s68k_write16_2M_decode_b0_m1
87 .long m_s68k_write32_2M_decode_b0_m1
88 .long m_s68k_write8_2M_decode_b0_m2
89 .long m_s68k_write16_2M_decode_b0_m2
90 .long m_s68k_write32_2M_decode_b0_m2
91 .long m_s68k_write8_2M_decode_b1_m0
92 .long m_s68k_write16_2M_decode_b1_m0
93 .long m_s68k_write32_2M_decode_b1_m0
94 .long m_s68k_write8_2M_decode_b1_m1
95 .long m_s68k_write16_2M_decode_b1_m1
96 .long m_s68k_write32_2M_decode_b1_m1
97 .long m_s68k_write8_2M_decode_b1_m2
98 .long m_s68k_write16_2M_decode_b1_m2
99 .long m_s68k_write32_2M_decode_b1_m2
102 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
107 .global PicoMemResetCD
108 .global PicoMemResetCDdecode
109 .global PicoReadM68k8
110 .global PicoReadM68k16
111 .global PicoReadM68k32
112 .global PicoWriteM68k8
113 .global PicoWriteM68k16
114 .global PicoWriteM68k32
115 .global PicoReadS68k8
116 .global PicoReadS68k16
117 .global PicoReadS68k32
118 .global PicoWriteS68k8
119 .global PicoWriteS68k16
120 .global PicoWriteS68k32
122 @ externs, just for reference
126 .extern PicoVideoRead
127 .extern Read_CDC_Host
128 .extern m68k_reg_write8
132 .extern s68k_reg_read16
134 .extern gfx_cd_write16
135 .extern s68k_reg_write8
136 .extern s68k_poll_adclk
140 @ r0=reg3, r1-r3=temp
141 .macro mk_update_table on sz @ operation name, size
142 @ we only set word-ram handlers
143 ldr r1, =m_m68k_&\on&\sz&_table
144 ldr r12,=m_s68k_&\on&\sz&_table
149 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
150 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
153 ldr r2, =m_&\on&_null
164 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
165 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
168 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
170 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
178 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
179 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
182 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
184 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
195 mk_update_table read 8
196 mk_update_table read 16
197 mk_update_table read 32
198 mk_update_table write 8
199 mk_update_table write 16
200 mk_update_table write 32
204 PicoMemResetCDdecode: @reg3
206 bxeq lr @ we should not be called in 2M mode
207 ldr r1, =m_s68k_write8_table
208 ldr r3, =m_s68k_decode_write_table
212 moveq r2, #2 @ mode3 is same as mode2?
214 addeq r2, r2, #3 @ bank1 (r2=0..5)
215 add r2, r2, r2, lsl #1 @ *= 3
216 add r2, r3, r2, lsl #2
217 ldmia r2, {r0,r3,r12}
220 str r3, [r1, #4*4+8*4]
221 str r3, [r1, #5*4+8*4]
222 str r12,[r1, #4*4+8*4*2]
223 str r12,[r1, #5*4+8*4*2]
229 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
231 .macro mk_entry_m68k table
233 bic r0, r0, #0xff000000
234 and r3, r0, #0x00fe0000
235 ldr pc, [r2, r3, lsr #15]
238 PicoReadM68k8: @ u32 a
239 mk_entry_m68k m_m68k_read8_table
241 PicoReadM68k16: @ u32 a
242 mk_entry_m68k m_m68k_read16_table
244 PicoReadM68k32: @ u32 a
245 mk_entry_m68k m_m68k_read32_table
247 PicoWriteM68k8: @ u32 a, u8 d
248 mk_entry_m68k m_m68k_write8_table
250 PicoWriteM68k16: @ u32 a, u16 d
251 mk_entry_m68k m_m68k_write16_table
253 PicoWriteM68k32: @ u32 a, u32 d
254 mk_entry_m68k m_m68k_write32_table
257 .macro mk_entry_s68k on sz
258 bic r0, r0, #0xff000000
260 blt m_s68k_&\on&\sz&_prg
262 ldrlt r2, =m_s68k_&\on&\sz&_table
263 andlt r3, r0, #0x000e0000
264 ldrlt pc, [r2, r3, lsr #15]
266 orr r3, r3, #0x00008000
268 bge m_s68k_&\on&\sz&_regs
270 bge m_s68k_&\on&\sz&_pcm
272 bge m_s68k_&\on&\sz&_backup
277 PicoReadS68k8: @ u32 a
280 PicoReadS68k16: @ u32 a
281 mk_entry_s68k read 16
283 PicoReadS68k32: @ u32 a
284 mk_entry_s68k read 32
286 PicoWriteS68k8: @ u32 a, u8 d
287 mk_entry_s68k write 8
289 PicoWriteS68k16: @ u32 a, u16 d
290 mk_entry_s68k write 16
292 PicoWriteS68k32: @ u32 a, u32 d
293 mk_entry_s68k write 32
298 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
302 @ r0=addr[in,out], r1,r2=tmp
304 ands r1, r0, #0x01c000
305 ldrne pc, [pc, r1, lsr #12]
306 beq 0f @ most common?
316 and r1, r0, #0x7e00 @ col
317 and r2, r0, #0x01fc @ row
319 orr r1, r2, r1, ror #13
322 and r1, r0, #0x3f00 @ col
323 and r2, r0, #0x00fc @ row
325 orr r1, r2, r1, ror #12
328 and r1, r0, #0x1f80 @ col
329 and r2, r0, #0x007c @ row
330 orr r1, r2, r1, ror #11
332 orr r1, r1, r2, lsr #6
335 and r1, r0, #0xfc00 @ col
336 and r2, r0, #0x03fc @ row
337 orr r1, r2, r1, ror #14
340 orr r0, r0, r1, ror #26 @ rol 4+2
344 @ r0=prt1, r1=ptr2; unaligned ptr MUST be r0
350 moveq r0, r0, ror #16
351 orrne r0, r1, r0, lsl #16
355 @ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0
360 movne r1, r1, lsr #16
366 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
375 ldr r1, =(Pico+0x22200)
376 bic r0, r0, #0xfe0000
383 m_m68k_read8_prgbank:
384 ldr r1, =(Pico+0x22200)
388 orr r3, r2, #0x002200
391 tst r3, #0x00020000 @ have bus?
394 and r2, r2, #0xc0000000 @ r3 & 0xC0
395 add r1, r1, r2, lsr #12
400 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
401 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
402 ldr r1, =(Pico+0x22200)
403 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
410 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
411 ldr r1, =(Pico+0x22200)
412 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
419 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
420 ldr r1, =(Pico+0x22200)
421 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
428 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
430 ldr r1, =(Pico+0x22200)
431 add r0, r0, #0x0c0000
438 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
440 ldr r1, =(Pico+0x22200)
441 add r0, r0, #0x0e0000
448 m_m68k_read8_system_io:
449 bic r2, r0, #0xfe0000
452 bne m_m68k_read8_misc
454 ldr r1, =(Pico+0x22200)
456 ldr r1, [r1] @ Pico.mcd (used everywhere)
458 ldrlt pc, [pc, r0, lsl #2]
460 .long m_m68k_read8_r00
461 .long m_m68k_read8_r01
462 .long m_m68k_read8_r02
463 .long m_m68k_read8_r03
464 .long m_m68k_read8_r04
465 .long m_read_null @ unused bits
466 .long m_m68k_read8_r06
467 .long m_m68k_read8_r07
468 .long m_m68k_read8_r08
469 .long m_m68k_read8_r09
470 .long m_read_null @ reserved
472 .long m_m68k_read8_r0c
473 .long m_m68k_read8_r0d
475 add r1, r1, #0x110000
477 and r0, r0, #0x04000000 @ we need irq2 mask state
481 add r1, r1, #0x110000
482 add r1, r1, #0x002200
483 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
486 add r1, r1, #0x110000
490 add r1, r1, #0x110000
492 add r1, r1, #0x002200
495 tst r1, #2 @ DMNA pending?
501 add r1, r1, #0x110000
505 ldrb r0, [r1, #0x73] @ IRQ vector
512 bl Read_CDC_Host @ TODO: make it local
519 add r1, r1, #0x110000
520 add r1, r1, #0x002200
521 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
525 add r1, r1, #0x110000
526 add r1, r1, #0x002200
534 add r1, r1, #0x110000
542 cmp r2, #0xa00000 @ Z80 RAM?
544 @ ldreq r2, =z80Read8
549 bl OtherRead16 @ non-MCD version should be ok too
559 bxne lr @ invalid read
562 bl PicoVideoRead @ TODO: implement it in asm
571 bic r0, r0, #0xff0000
577 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
581 ldr r1, =(Pico+0x22200)
582 bic r0, r0, #0xfe0000
589 m_m68k_read16_prgbank:
590 ldr r1, =(Pico+0x22200)
594 orr r3, r2, #0x002200
597 tst r3, #0x00020000 @ have bus?
600 and r2, r2, #0xc0000000 @ r3 & 0xC0
601 add r1, r1, r2, lsr #12
606 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
607 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
608 ldr r1, =(Pico+0x22200)
609 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
616 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
617 ldr r1, =(Pico+0x22200)
618 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
625 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
626 ldr r1, =(Pico+0x22200)
627 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
634 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
635 @ Warning: read32 relies on NOT using r3 and r12 here
637 ldr r1, =(Pico+0x22200)
638 add r0, r0, #0x0c0000
645 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
647 ldr r1, =(Pico+0x22200)
648 add r0, r0, #0x0e0000
655 m_m68k_read16_system_io:
656 bic r1, r0, #0xfe0000
659 bne m_m68k_read16_misc
661 m_m68k_read16_m68k_regs:
662 ldr r1, =(Pico+0x22200)
664 ldr r1, [r1] @ Pico.mcd (used everywhere)
666 ldrlt pc, [pc, r0, lsl #1]
668 .long m_m68k_read16_r00
669 .long m_m68k_read16_r02
670 .long m_m68k_read16_r04
671 .long m_m68k_read16_r06
672 .long m_m68k_read16_r08
673 .long m_read_null @ reserved
674 .long m_m68k_read16_r0c
676 add r1, r1, #0x110000
678 add r1, r1, #0x002200
679 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
680 and r0, r0, #0x04000000 @ we need irq2 mask state
681 orr r0, r1, r0, lsr #11
684 add r1, r1, #0x110000
687 add r1, r1, #0x002200
690 orr r0, r2, r0, lsl #8
691 tst r1, #2 @ DMNA pending?
697 add r1, r1, #0x110000
702 ldrh r0, [r1, #0x72] @ IRQ vector
708 add r1, r1, #0x110000
709 add r1, r1, #0x002200
715 addlt r1, r1, #0x110000
721 orr r0, r0, r1, lsl #8
734 bxne lr @ invalid read
741 bic r0, r0, #0xff0000
747 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
751 ldr r1, =(Pico+0x22200)
752 bic r0, r0, #0xfe0000
759 m_m68k_read32_prgbank:
760 ldr r1, =(Pico+0x22200)
764 orr r3, r2, #0x002200
767 tst r3, #0x00020000 @ have bus?
770 and r2, r2, #0xc0000000 @ r3 & 0xC0
771 add r1, r1, r2, lsr #12
776 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
777 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
778 ldr r1, =(Pico+0x22200)
779 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
786 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
787 ldr r1, =(Pico+0x22200)
788 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
795 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
796 ldr r1, =(Pico+0x22200)
797 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
804 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
806 bne m_m68k_read32_wordram1_1M_b0_unal
808 ldr r1, =(Pico+0x22200)
809 add r0, r0, #0x0c0000
814 m_m68k_read32_wordram1_1M_b0_unal:
815 @ hopefully this doesn't happen too often
818 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
822 bl m_m68k_read16_wordram1_1M_b0
823 orr r0, r0, r3, lsl #16
827 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
829 bne m_m68k_read32_wordram1_1M_b1_unal
831 ldr r1, =(Pico+0x22200)
832 add r0, r0, #0x0e0000
837 m_m68k_read32_wordram1_1M_b1_unal:
840 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
844 bl m_m68k_read16_wordram1_1M_b1
845 orr r0, r0, r3, lsl #16
849 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
850 m_m68k_read32_system_io:
851 bic r1, r0, #0xfe0000
854 bne m_m68k_read32_misc
857 blt m_m68k_read32_misc
861 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
863 ldr r1, =(Pico+0x22200)
866 orr r2, r2, r2, lsl #16
867 add r1, r1, #0x110000
869 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
870 and r0, r2, r0, lsr #8
871 orr r0, r0, r1, lsl #8
877 bl m_m68k_read16_system_io
879 bl m_m68k_read16_system_io
881 orr r0, r0, r1, lsl #16
888 bxne lr @ invalid read
896 orr r0, r0, r1, lsl #16
902 bic r0, r0, #0xff0000
909 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
917 m_m68k_write8_prgbank:
918 ldr r2, =(Pico+0x22200)
922 orr r3, r12, #0x002200
925 tst r3, #0x00020000 @ have bus?
927 and r12,r12,#0xc0000000 @ r3 & 0xC0
928 add r2, r2, r12, lsr #12
933 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
934 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
935 ldr r2, =(Pico+0x22200)
936 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
943 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
944 ldr r2, =(Pico+0x22200)
945 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
952 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
953 ldr r2, =(Pico+0x22200)
954 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
961 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
964 ldr r2, =(Pico+0x22200)
965 add r0, r0, #0x0c0000
972 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
975 ldr r2, =(Pico+0x22200)
976 add r0, r0, #0x0e0000
983 m_m68k_write8_system_io:
984 bic r2, r0, #0xfe0000
997 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
1003 bic r0, r0, #0xff0000
1009 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1012 m_m68k_write16_bios:
1016 m_m68k_write16_prgbank:
1017 ldr r2, =(Pico+0x22200)
1021 orr r3, r12, #0x002200
1024 tst r3, #0x00020000 @ have bus?
1026 and r12,r12,#0xc0000000 @ r3 & 0xC0
1027 add r2, r2, r12, lsr #12
1032 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1033 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1034 ldr r2, =(Pico+0x22200)
1035 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1042 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1043 ldr r2, =(Pico+0x22200)
1044 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1051 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1052 ldr r2, =(Pico+0x22200)
1053 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1060 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1061 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1064 ldr r1, =(Pico+0x22200)
1065 add r0, r0, #0x0c0000
1072 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1075 ldr r1, =(Pico+0x22200)
1076 add r0, r0, #0x0e0000
1083 m_m68k_write16_system_io:
1085 bic r2, r0, #0xfe0000
1090 m_m68k_write16_m68k_regs:
1093 beq m_m68k_write16_regs_spec
1096 stmfd sp!,{r2,r3,lr}
1099 ldmfd sp!,{r0,r1,lr}
1102 m_m68k_write16_regs_spec: @ special case
1103 ldr r2, =(Pico+0x22200)
1104 ldr r3, =s68k_poll_adclk
1107 add r0, r0, #0x00000e
1109 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
1115 ldr r0, =PicoCpuS68k
1116 str r1, [r0, #0x58] @ push s68k out of stopped state
1131 bic r0, r0, #0xff0000
1137 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1140 m_m68k_write32_bios:
1144 m_m68k_write32_prgbank:
1145 ldr r2, =(Pico+0x22200)
1149 orr r3, r12, #0x002200
1152 tst r3, #0x00020000 @ have bus?
1154 and r12,r12,#0xc0000000 @ r3 & 0xC0
1155 add r2, r2, r12, lsr #12
1160 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1161 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1162 ldr r2, =(Pico+0x22200)
1163 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1170 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1171 ldr r2, =(Pico+0x22200)
1172 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1179 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1180 ldr r2, =(Pico+0x22200)
1181 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1188 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1190 bne m_m68k_write32_wordram1_1M_b0_unal
1193 ldr r2, =(Pico+0x22200)
1194 add r0, r0, #0x0c0000
1200 m_m68k_write32_wordram1_1M_b0_unal:
1201 @ hopefully this doesn't happen too often
1205 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1209 b m_m68k_write16_wordram1_1M_b0
1212 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1214 bne m_m68k_write32_wordram1_1M_b1_unal
1217 ldr r2, =(Pico+0x22200)
1218 add r0, r0, #0x0e0000
1224 m_m68k_write32_wordram1_1M_b1_unal:
1228 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1232 b m_m68k_write16_wordram1_1M_b1
1235 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1236 m_m68k_write32_system_io:
1237 bic r2, r0, #0xfe0000
1240 bne m_m68k_write32_misc
1243 blt m_m68k_write32_regs
1246 @ Handle the 0x10-0x1f range
1247 ldr r0, =(Pico+0x22200)
1250 orr r3, r3, r3, lsl #16
1251 add r0, r0, #0x110000
1252 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1253 and r1, r3, r1, ror #24
1254 orr r1, r1, r12,lsl #8 @ end of byteswap
1257 movne r1, r1, lsr #16
1261 m_m68k_write32_regs:
1263 stmfd sp!,{r0,r1,lr}
1276 ldmfd sp!,{r0,r1,lr}
1280 m_m68k_write32_misc:
1282 stmfd sp!,{r0,r1,lr}
1285 ldmfd sp!,{r0,r1,lr}
1294 stmfd sp!,{r0,r1,lr}
1297 ldmfd sp!,{r0,r1,lr}
1304 bic r0, r0, #0xff0000
1312 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1314 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1317 .macro m_s68k_read8_ram map_addr
1318 ldr r1, =(Pico+0x22200)
1322 add r0, r0, #\map_addr @ map to our address
1328 .macro m_s68k_read8_wordram_2M_decode map_addr
1329 ldr r2, =(Pico+0x22200)
1332 movs r0, r0, lsr #1 @ +4-6 <<16
1333 add r2, r2, #\map_addr @ map to our address
1335 movcc r0, r0, lsr #4
1341 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1342 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1343 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1344 m_s68k_read8_ram 0x020000
1347 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1348 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1351 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1352 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1355 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1359 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1360 @ must not trash r3 and r12
1361 ldr r1, =(Pico+0x22200)
1364 bic r0, r0, #0xff0000
1365 bic r0, r0, #0x00e000
1366 add r1, r1, #0x110000
1367 add r1, r1, #0x000200
1373 @ must not trash r3 and r12
1374 ldr r1, =(Pico+0x22200)
1375 bic r0, r0, #0xff0000
1376 @ bic r0, r0, #0x008000
1379 orr r2, r2, #0x002200
1381 bge m_s68k_read8_pcm_ram
1385 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1388 ldr r1, [r1, r2, lsl #2]
1390 moveq r0, r1, lsr #PCM_STEP_SHIFT
1391 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1395 m_s68k_read8_pcm_ram:
1398 add r1, r1, #0x100000 @ pcm_ram
1399 and r2, r2, #0x0f000000 @ bank
1400 add r1, r1, r2, lsr #12
1401 bic r0, r0, #0x00e000
1408 bic r0, r0, #0xff0000
1409 bic r0, r0, #0x008000
1415 ldrlo r2, =gfx_cd_read
1416 ldrhs r2, =s68k_reg_read16
1423 moveq r0, r0, lsr #8
1428 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1431 .macro m_s68k_read16_ram map_addr
1432 ldr r1, =(Pico+0x22200)
1436 add r0, r0, #\map_addr @ map to our address
1442 .macro m_s68k_read16_wordram_2M_decode map_addr
1443 ldr r2, =(Pico+0x22200)
1446 mov r0, r0, lsr #1 @ +4-6 <<16
1447 add r2, r2, #\map_addr @ map to our address
1449 orr r0, r0, r0, lsl #4
1455 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1456 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1457 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1458 m_s68k_read16_ram 0x020000
1461 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1462 m_s68k_read16_wordram_2M_decode 0x080000
1465 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1466 m_s68k_read16_wordram_2M_decode 0x0a0000
1469 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1473 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1474 @ bram is not meant to be accessed by words, does any game do this?
1475 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1478 @ m_s68k_read16_pcm:
1479 @ pcm is on 8-bit bus, would this be same as byte access?
1480 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1484 bic r0, r0, #0xff0000
1485 bic r0, r0, #0x008000
1486 bic r0, r0, #0x000001
1499 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1502 .macro m_s68k_read32_ram map_addr
1503 ldr r1, =(Pico+0x22200)
1507 add r0, r0, #\map_addr @ map to our address
1513 .macro m_s68k_read32_wordram_2M_decode map_addr
1514 ldr r2, =(Pico+0x22200)
1517 mov r0, r0, lsr #1 @ +4-6 <<16
1518 add r2, r2, #\map_addr @ map to our address
1521 ldrneb r0, [r2, #-1]
1523 orr r1, r1, r1, lsl #4
1525 orr r0, r0, r0, lsl #4
1527 orr r0, r0, r1, lsl #16
1532 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1533 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1534 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1535 m_s68k_read32_ram 0x020000
1538 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1539 m_s68k_read32_wordram_2M_decode 0x080000
1542 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1543 m_s68k_read32_wordram_2M_decode 0x0a0000
1546 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1550 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1551 @ bram is not meant to be accessed by words, does any game do this?
1554 bl m_s68k_read8_backup @ must preserve r3 and r12
1558 bl m_s68k_read8_backup
1559 orr r0, r0, r3, lsl #16
1566 bl m_s68k_read8_pcm @ must preserve r3 and r12
1571 orr r0, r0, r3, lsl #16
1576 bic r0, r0, #0xff0000
1577 bic r0, r0, #0x008000
1578 bic r0, r0, #0x000001
1585 blo m_s68k_read32_regs_gfx
1591 orr r0, r0, r1, lsl #16
1595 m_s68k_read32_regs_gfx:
1601 orr r0, r0, r1, lsl #16
1606 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1609 .macro m_s68k_write8_ram map_addr
1610 ldr r2, =(Pico+0x22200)
1614 add r0, r0, #\map_addr @ map to our address
1620 .macro m_s68k_write8_2M_decode map_addr
1621 ldr r2, =(Pico+0x22200)
1624 movs r0, r0, lsr #1 @ +4-6 <<16
1625 add r2, r2, #\map_addr @ map to our address
1628 .macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1629 m_s68k_write8_2M_decode \map_addr
1632 movcc r1, r1, lsl #4
1636 cmp r0, r3 @ avoid writing if result is same
1641 .macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1644 m_s68k_write8_2M_decode \map_addr
1646 movcc r1, r1, lsl #4
1657 .macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1660 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1665 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1666 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1667 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1668 m_s68k_write8_ram 0x020000
1671 m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1672 m_s68k_write8_2M_decode_m0 0x080000
1674 m_s68k_write8_2M_decode_b0_m1:
1675 m_s68k_write8_2M_decode_m1 0x080000
1677 m_s68k_write8_2M_decode_b0_m2:
1678 m_s68k_write8_2M_decode_m2 0x080000
1680 m_s68k_write8_2M_decode_b1_m0:
1681 m_s68k_write8_2M_decode_m0 0x0a0000
1683 m_s68k_write8_2M_decode_b1_m1:
1684 m_s68k_write8_2M_decode_m1 0x0a0000
1686 m_s68k_write8_2M_decode_b1_m2:
1687 m_s68k_write8_2M_decode_m2 0x0a0000
1690 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1694 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1695 @ must not trash r3 and r12
1696 ldr r2, =(Pico+0x22200)
1699 bic r0, r0, #0xff0000
1700 bic r0, r0, #0x00e000
1701 add r2, r2, #0x110000
1702 add r2, r2, #0x000200
1706 strb r0, [r1, #0x0e] @ SRam.changed = 1
1711 bic r0, r0, #0xff0000
1713 movlt r0, r0, lsr #1
1719 m_s68k_write8_pcm_ram:
1720 ldr r3, =(Pico+0x22200)
1721 bic r0, r0, #0x00e000
1724 add r2, r3, #0x110000
1725 add r2, r2, #0x002200
1726 add r2, r2, #0x000040
1728 add r3, r3, #0x100000 @ pcm_ram
1729 and r2, r2, #0x0f000000 @ bank
1730 add r3, r3, r2, lsr #12
1736 bic r0, r0, #0xff0000
1737 bic r0, r0, #0x008000
1745 orr r1, r1, r1, lsl #8
1749 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1752 .macro m_s68k_write16_ram map_addr
1753 ldr r2, =(Pico+0x22200)
1757 add r0, r0, #\map_addr @ map to our address
1763 .macro m_s68k_write16_2M_decode map_addr
1764 ldr r2, =(Pico+0x22200)
1767 mov r0, r0, lsr #1 @ +4-6 <<16
1768 add r2, r2, #\map_addr @ map to our address
1771 .macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1772 m_s68k_write16_2M_decode \map_addr
1774 orr r1, r1, r1, lsr #4
1779 .macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1780 bics r1, r1, #0xf000
1781 bicnes r1, r1, #0x00f0
1783 orr r1, r1, r1, lsr #4
1784 m_s68k_write16_2M_decode \map_addr
1796 .macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
1797 bics r1, r1, #0xf000
1798 bicnes r1, r1, #0x00f0
1800 orr r1, r1, r1, lsr #4
1801 m_s68k_write16_2M_decode \map_addr
1815 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1816 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1817 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1818 m_s68k_write16_ram 0x020000
1821 m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1822 m_s68k_write16_2M_decode_m0 0x080000
1824 m_s68k_write16_2M_decode_b0_m1:
1825 m_s68k_write16_2M_decode_m1 0x080000
1827 m_s68k_write16_2M_decode_b0_m2:
1828 m_s68k_write16_2M_decode_m2 0x080000
1830 m_s68k_write16_2M_decode_b1_m0:
1831 m_s68k_write16_2M_decode_m0 0x0a0000
1833 m_s68k_write16_2M_decode_b1_m1:
1834 m_s68k_write16_2M_decode_m1 0x0a0000
1836 m_s68k_write16_2M_decode_b1_m2:
1837 m_s68k_write16_2M_decode_m2 0x0a0000
1840 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1841 m_s68k_write16_ram 0
1844 @ m_s68k_write16_backup:
1845 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1848 @ m_s68k_write16_pcm:
1849 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1852 m_s68k_write16_regs:
1853 bic r0, r0, #0xff0000
1854 bic r0, r0, #0x008000
1860 beq m_s68k_write16_regs_spec
1866 stmfd sp!,{r2,r3,lr}
1869 ldmfd sp!,{r0,r1,lr}
1872 m_s68k_write16_regs_spec: @ special case
1873 ldr r2, =(Pico+0x22200)
1876 add r0, r0, #0x00000f
1877 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
1881 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1884 .macro m_s68k_write32_ram map_addr
1885 ldr r2, =(Pico+0x22200)
1889 add r0, r0, #\map_addr @ map to our address
1895 .macro m_s68k_write32_2M_decode map_addr
1896 ldr r2, =(Pico+0x22200)
1899 mov r0, r0, lsr #1 @ +4-6 <<16
1900 add r2, r2, #\map_addr @ map to our address
1903 .macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
1904 m_s68k_write32_2M_decode \map_addr
1905 bic r1, r1, #0x000000f0
1906 bic r1, r1, #0x00f00000
1907 orr r1, r1, r1, lsr #4
1911 strneb r1, [r2, #-1]
1916 .macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
1917 bics r1, r1, #0x000000f0
1918 bicnes r1, r1, #0x0000f000
1919 bicnes r1, r1, #0x00f00000
1920 bicnes r1, r1, #0xf0000000
1922 orr r1, r1, r1, lsr #4
1923 m_s68k_write32_2M_decode \map_addr
1926 ldrneb r0, [r2, #-1]
1928 and r12,r1, #0x0000000f
1929 orr r0, r0, r3, lsl #16
1930 orrne r0, r0, #0x80000000 @ remember addr lsb bit
1934 andeq r12,r1, #0x000000f0
1937 andeq r12,r1, #0x000f0000
1940 andeq r12,r1, #0x00f00000
1943 strneb r0, [r2, #-1]
1950 .macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
1951 bics r1, r1, #0x000000f0
1952 bicnes r1, r1, #0x0000f000
1953 bicnes r1, r1, #0x00f00000
1954 bicnes r1, r1, #0xf0000000
1956 orr r1, r1, r1, lsr #4
1957 m_s68k_write32_2M_decode \map_addr
1960 ldrneb r0, [r2, #-1]
1962 orrne r1, r1, #0x80000000 @ remember addr lsb bit
1963 orr r0, r0, r3, lsl #16
1965 andeq r12,r0, #0x0000000f
1968 andeq r12,r0, #0x000000f0
1971 andeq r12,r0, #0x000f0000
1974 andeq r12,r0, #0x00f00000
1979 strneb r1, [r2, #-1]
1988 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
1989 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
1990 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1991 m_s68k_write32_ram 0x020000
1994 m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1995 m_s68k_write32_2M_decode_m0 0x080000
1997 m_s68k_write32_2M_decode_b0_m1:
1998 m_s68k_write32_2M_decode_m1 0x080000
2000 m_s68k_write32_2M_decode_b0_m2:
2001 m_s68k_write32_2M_decode_m2 0x080000
2003 m_s68k_write32_2M_decode_b1_m0:
2004 m_s68k_write32_2M_decode_m0 0x0a0000
2006 m_s68k_write32_2M_decode_b1_m1:
2007 m_s68k_write32_2M_decode_m1 0x0a0000
2009 m_s68k_write32_2M_decode_b1_m2:
2010 m_s68k_write32_2M_decode_m2 0x0a0000
2013 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
2014 m_s68k_write32_ram 0
2017 m_s68k_write32_backup:
2022 bl m_s68k_write8_backup @ must preserve r3 and r12
2026 b m_s68k_write8_backup
2030 bic r0, r0, #0xff0000
2032 blt m_s68k_write32_pcm_reg
2037 m_s68k_write32_pcm_ram:
2038 ldr r3, =(Pico+0x22200)
2039 bic r0, r0, #0x00e000
2042 add r2, r3, #0x110000
2043 add r2, r2, #0x002200
2044 add r2, r2, #0x000040
2046 add r3, r3, #0x100000 @ pcm_ram
2047 and r2, r2, #0x0f000000 @ bank
2048 add r3, r3, r2, lsr #12
2055 m_s68k_write32_pcm_reg:
2059 stmfd sp!,{r2,r3,lr}
2062 ldmfd sp!,{r0,r1,lr}
2066 m_s68k_write32_regs:
2067 bic r0, r0, #0xff0000
2068 bic r0, r0, #0x008000
2075 blo m_s68k_write32_regs_gfx
2077 stmfd sp!,{r0,r1,lr}
2090 ldmfd sp!,{r0,r1,lr}
2094 m_s68k_write32_regs_gfx:
2097 stmfd sp!,{r2,r3,lr}
2100 ldmfd sp!,{r0,r1,lr}