1 /* Macros for DPI ops, auto-generated from template
3 * Copyright (c) 2002 Wild West Software
4 * Copyright (c) 2001, 2002 Sergey Chaban
6 * Permission is hereby granted, free of charge, to any person
7 * obtaining a copy of this software and associated documentation
8 * files (the "Software"), to deal in the Software without restriction,
9 * including without limitation the rights to use, copy, modify, merge,
10 * publish, distribute, sublicense, and/or sell copies of the Software,
11 * and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
19 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
23 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 /* Rd := imm8 ROR rot */
31 #define ARM_MOV_REG_IMM_COND(p, reg, imm8, rot, cond) \
32 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, rot, cond)
33 #define ARM_MOV_REG_IMM(p, reg, imm8, rot) \
34 ARM_MOV_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
36 #define ARM_MOVS_REG_IMM_COND(p, reg, imm8, rot, cond) \
37 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, rot, cond)
38 #define ARM_MOVS_REG_IMM(p, reg, imm8, rot) \
39 ARM_MOVS_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
42 #define _MOV_REG_IMM_COND(reg, imm8, rot, cond) \
43 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, rot, cond)
44 #define _MOV_REG_IMM(reg, imm8, rot) \
45 _MOV_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
47 #define _MOVS_REG_IMM_COND(reg, imm8, rot, cond) \
48 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, rot, cond)
49 #define _MOVS_REG_IMM(reg, imm8, rot) \
50 _MOVS_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
55 #define ARM_MOV_REG_IMM8_COND(p, reg, imm8, cond) \
56 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, 0, cond)
57 #define ARM_MOV_REG_IMM8(p, reg, imm8) \
58 ARM_MOV_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
60 #define ARM_MOVS_REG_IMM8_COND(p, reg, imm8, cond) \
61 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MOV, reg, 0, imm8, 0, cond)
62 #define ARM_MOVS_REG_IMM8(p, reg, imm8) \
63 ARM_MOVS_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
66 #define _MOV_REG_IMM8_COND(reg, imm8, cond) \
67 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, 0, cond)
68 #define _MOV_REG_IMM8(reg, imm8) \
69 _MOV_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
71 #define _MOVS_REG_IMM8_COND(reg, imm8, cond) \
72 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MOV, reg, 0, imm8, 0, cond)
73 #define _MOVS_REG_IMM8(reg, imm8) \
74 _MOVS_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
79 #define ARM_MOV_REG_REG_COND(p, rd, rm, cond) \
80 ARM_DPIOP_REG_REG_COND(p, ARMOP_MOV, rd, 0, rm, cond)
81 #define ARM_MOV_REG_REG(p, rd, rm) \
82 ARM_MOV_REG_REG_COND(p, rd, rm, ARMCOND_AL)
84 #define ARM_MOVS_REG_REG_COND(p, rd, rm, cond) \
85 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_MOV, rd, 0, rm, cond)
86 #define ARM_MOVS_REG_REG(p, rd, rm) \
87 ARM_MOVS_REG_REG_COND(p, rd, rm, ARMCOND_AL)
90 #define _MOV_REG_REG_COND(rd, rm, cond) \
91 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_MOV, rd, 0, rm, cond)
92 #define _MOV_REG_REG(rd, rm) \
93 _MOV_REG_REG_COND(rd, rm, ARMCOND_AL)
95 #define _MOVS_REG_REG_COND(rd, rm, cond) \
96 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_MOV, rd, 0, rm, cond)
97 #define _MOVS_REG_REG(rd, rm) \
98 _MOVS_REG_REG_COND(rd, rm, ARMCOND_AL)
102 /* Rd := Rm <shift_type> imm_shift */
103 #define ARM_MOV_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
104 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
105 #define ARM_MOV_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
106 ARM_MOV_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
108 #define ARM_MOVS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
109 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
110 #define ARM_MOVS_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
111 ARM_MOVS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
114 #define _MOV_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
115 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
116 #define _MOV_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
117 _MOV_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
119 #define _MOVS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
120 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, imm_shift, cond)
121 #define _MOVS_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
122 _MOVS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
127 /* Rd := (Rm <shift_type> Rs) */
128 #define ARM_MOV_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
129 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
130 #define ARM_MOV_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
131 ARM_MOV_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
133 #define ARM_MOVS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
134 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
135 #define ARM_MOVS_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
136 ARM_MOVS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
139 #define _MOV_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
140 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
141 #define _MOV_REG_REGSHIFT(rd, rm, shift_type, rs) \
142 _MOV_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
144 #define _MOVS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
145 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_MOV, rd, 0, rm, shift_type, rs, cond)
146 #define _MOVS_REG_REGSHIFT(rd, rm, shift_type, rs) \
147 _MOVS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
151 /* Rd := imm8 ROR rot */
152 #define ARM_MVN_REG_IMM_COND(p, reg, imm8, rot, cond) \
153 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, rot, cond)
154 #define ARM_MVN_REG_IMM(p, reg, imm8, rot) \
155 ARM_MVN_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
157 #define ARM_MVNS_REG_IMM_COND(p, reg, imm8, rot, cond) \
158 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, rot, cond)
159 #define ARM_MVNS_REG_IMM(p, reg, imm8, rot) \
160 ARM_MVNS_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL)
163 #define _MVN_REG_IMM_COND(reg, imm8, rot, cond) \
164 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, rot, cond)
165 #define _MVN_REG_IMM(reg, imm8, rot) \
166 _MVN_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
168 #define _MVNS_REG_IMM_COND(reg, imm8, rot, cond) \
169 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, rot, cond)
170 #define _MVNS_REG_IMM(reg, imm8, rot) \
171 _MVNS_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL)
176 #define ARM_MVN_REG_IMM8_COND(p, reg, imm8, cond) \
177 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, 0, cond)
178 #define ARM_MVN_REG_IMM8(p, reg, imm8) \
179 ARM_MVN_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
181 #define ARM_MVNS_REG_IMM8_COND(p, reg, imm8, cond) \
182 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_MVN, reg, 0, imm8, 0, cond)
183 #define ARM_MVNS_REG_IMM8(p, reg, imm8) \
184 ARM_MVNS_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL)
187 #define _MVN_REG_IMM8_COND(reg, imm8, cond) \
188 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, 0, cond)
189 #define _MVN_REG_IMM8(reg, imm8) \
190 _MVN_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
192 #define _MVNS_REG_IMM8_COND(reg, imm8, cond) \
193 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_MVN, reg, 0, imm8, 0, cond)
194 #define _MVNS_REG_IMM8(reg, imm8) \
195 _MVNS_REG_IMM8_COND(reg, imm8, ARMCOND_AL)
200 #define ARM_MVN_REG_REG_COND(p, rd, rm, cond) \
201 ARM_DPIOP_REG_REG_COND(p, ARMOP_MVN, rd, 0, rm, cond)
202 #define ARM_MVN_REG_REG(p, rd, rm) \
203 ARM_MVN_REG_REG_COND(p, rd, rm, ARMCOND_AL)
205 #define ARM_MVNS_REG_REG_COND(p, rd, rm, cond) \
206 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_MVN, rd, 0, rm, cond)
207 #define ARM_MVNS_REG_REG(p, rd, rm) \
208 ARM_MVNS_REG_REG_COND(p, rd, rm, ARMCOND_AL)
211 #define _MVN_REG_REG_COND(rd, rm, cond) \
212 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_MVN, rd, 0, rm, cond)
213 #define _MVN_REG_REG(rd, rm) \
214 _MVN_REG_REG_COND(rd, rm, ARMCOND_AL)
216 #define _MVNS_REG_REG_COND(rd, rm, cond) \
217 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_MVN, rd, 0, rm, cond)
218 #define _MVNS_REG_REG(rd, rm) \
219 _MVNS_REG_REG_COND(rd, rm, ARMCOND_AL)
223 /* Rd := Rm <shift_type> imm_shift */
224 #define ARM_MVN_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
225 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
226 #define ARM_MVN_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
227 ARM_MVN_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
229 #define ARM_MVNS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \
230 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
231 #define ARM_MVNS_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \
232 ARM_MVNS_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL)
235 #define _MVN_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
236 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
237 #define _MVN_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
238 _MVN_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
240 #define _MVNS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \
241 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, imm_shift, cond)
242 #define _MVNS_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \
243 _MVNS_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL)
248 /* Rd := (Rm <shift_type> Rs) */
249 #define ARM_MVN_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
250 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
251 #define ARM_MVN_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
252 ARM_MVN_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
254 #define ARM_MVNS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \
255 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
256 #define ARM_MVNS_REG_REGSHIFT(p, rd, rm, shift_type, rs) \
257 ARM_MVNS_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL)
260 #define _MVN_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
261 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
262 #define _MVN_REG_REGSHIFT(rd, rm, shift_type, rs) \
263 _MVN_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
265 #define _MVNS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \
266 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_MVN, rd, 0, rm, shift_type, rs, cond)
267 #define _MVNS_REG_REGSHIFT(rd, rm, shift_type, rs) \
268 _MVNS_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL)
273 /* DPIs, arithmetic and logical */
277 /* Rd := Rn AND (imm8 ROR rot) ; rot is power of 2 */
278 #define ARM_AND_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
279 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_AND, rd, rn, imm8, rot, cond)
280 #define ARM_AND_REG_IMM(p, rd, rn, imm8, rot) \
281 ARM_AND_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
282 #define ARM_ANDS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
283 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_AND, rd, rn, imm8, rot, cond)
284 #define ARM_ANDS_REG_IMM(p, rd, rn, imm8, rot) \
285 ARM_ANDS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
288 #define _AND_REG_IMM_COND(rd, rn, imm8, rot, cond) \
289 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_AND, rd, rn, imm8, rot, cond)
290 #define _AND_REG_IMM(rd, rn, imm8, rot) \
291 _AND_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
292 #define _ANDS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
293 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_AND, rd, rn, imm8, rot, cond)
294 #define _ANDS_REG_IMM(rd, rn, imm8, rot) \
295 _ANDS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
299 /* Rd := Rn AND imm8 */
300 #define ARM_AND_REG_IMM8_COND(p, rd, rn, imm8, cond) \
301 ARM_AND_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
302 #define ARM_AND_REG_IMM8(p, rd, rn, imm8) \
303 ARM_AND_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
304 #define ARM_ANDS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
305 ARM_ANDS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
306 #define ARM_ANDS_REG_IMM8(p, rd, rn, imm8) \
307 ARM_ANDS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
310 #define _AND_REG_IMM8_COND(rd, rn, imm8, cond) \
311 _AND_REG_IMM_COND(rd, rn, imm8, 0, cond)
312 #define _AND_REG_IMM8(rd, rn, imm8) \
313 _AND_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
314 #define _ANDS_REG_IMM8_COND(rd, rn, imm8, cond) \
315 _ANDS_REG_IMM_COND(rd, rn, imm8, 0, cond)
316 #define _ANDS_REG_IMM8(rd, rn, imm8) \
317 _ANDS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
321 /* Rd := Rn AND Rm */
322 #define ARM_AND_REG_REG_COND(p, rd, rn, rm, cond) \
323 ARM_DPIOP_REG_REG_COND(p, ARMOP_AND, rd, rn, rm, cond)
324 #define ARM_AND_REG_REG(p, rd, rn, rm) \
325 ARM_AND_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
326 #define ARM_ANDS_REG_REG_COND(p, rd, rn, rm, cond) \
327 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_AND, rd, rn, rm, cond)
328 #define ARM_ANDS_REG_REG(p, rd, rn, rm) \
329 ARM_ANDS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
332 #define _AND_REG_REG_COND(rd, rn, rm, cond) \
333 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_AND, rd, rn, rm, cond)
334 #define _AND_REG_REG(rd, rn, rm) \
335 _AND_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
336 #define _ANDS_REG_REG_COND(rd, rn, rm, cond) \
337 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_AND, rd, rn, rm, cond)
338 #define _ANDS_REG_REG(rd, rn, rm) \
339 _ANDS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
343 /* Rd := Rn AND (Rm <shift_type> imm_shift) */
344 #define ARM_AND_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
345 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
346 #define ARM_AND_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
347 ARM_AND_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
348 #define ARM_ANDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
349 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
350 #define ARM_ANDS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
351 ARM_ANDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
354 #define _AND_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
355 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
356 #define _AND_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
357 _AND_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
358 #define _ANDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
359 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_type, imm_shift, cond)
360 #define _ANDS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
361 _ANDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
365 /* Rd := Rn AND (Rm <shift_type> Rs) */
366 #define ARM_AND_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
367 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_type, rs, cond)
368 #define ARM_AND_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
369 ARM_AND_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
370 #define ARM_ANDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
371 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_AND, rd, rn, rm, shift_type, rs, cond)
372 #define ARM_ANDS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
373 ARM_ANDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
376 #define _AND_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
377 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_type, rs, cond)
378 #define _AND_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
379 _AND_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
380 #define _ANDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
381 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_AND, rd, rn, rm, shift_type, rs, cond)
382 #define _ANDS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
383 _ANDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
389 /* Rd := Rn EOR (imm8 ROR rot) ; rot is power of 2 */
390 #define ARM_EOR_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
391 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_EOR, rd, rn, imm8, rot, cond)
392 #define ARM_EOR_REG_IMM(p, rd, rn, imm8, rot) \
393 ARM_EOR_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
394 #define ARM_EORS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
395 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_EOR, rd, rn, imm8, rot, cond)
396 #define ARM_EORS_REG_IMM(p, rd, rn, imm8, rot) \
397 ARM_EORS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
400 #define _EOR_REG_IMM_COND(rd, rn, imm8, rot, cond) \
401 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_EOR, rd, rn, imm8, rot, cond)
402 #define _EOR_REG_IMM(rd, rn, imm8, rot) \
403 _EOR_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
404 #define _EORS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
405 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_EOR, rd, rn, imm8, rot, cond)
406 #define _EORS_REG_IMM(rd, rn, imm8, rot) \
407 _EORS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
411 /* Rd := Rn EOR imm8 */
412 #define ARM_EOR_REG_IMM8_COND(p, rd, rn, imm8, cond) \
413 ARM_EOR_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
414 #define ARM_EOR_REG_IMM8(p, rd, rn, imm8) \
415 ARM_EOR_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
416 #define ARM_EORS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
417 ARM_EORS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
418 #define ARM_EORS_REG_IMM8(p, rd, rn, imm8) \
419 ARM_EORS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
422 #define _EOR_REG_IMM8_COND(rd, rn, imm8, cond) \
423 _EOR_REG_IMM_COND(rd, rn, imm8, 0, cond)
424 #define _EOR_REG_IMM8(rd, rn, imm8) \
425 _EOR_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
426 #define _EORS_REG_IMM8_COND(rd, rn, imm8, cond) \
427 _EORS_REG_IMM_COND(rd, rn, imm8, 0, cond)
428 #define _EORS_REG_IMM8(rd, rn, imm8) \
429 _EORS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
433 /* Rd := Rn EOR Rm */
434 #define ARM_EOR_REG_REG_COND(p, rd, rn, rm, cond) \
435 ARM_DPIOP_REG_REG_COND(p, ARMOP_EOR, rd, rn, rm, cond)
436 #define ARM_EOR_REG_REG(p, rd, rn, rm) \
437 ARM_EOR_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
438 #define ARM_EORS_REG_REG_COND(p, rd, rn, rm, cond) \
439 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_EOR, rd, rn, rm, cond)
440 #define ARM_EORS_REG_REG(p, rd, rn, rm) \
441 ARM_EORS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
444 #define _EOR_REG_REG_COND(rd, rn, rm, cond) \
445 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_EOR, rd, rn, rm, cond)
446 #define _EOR_REG_REG(rd, rn, rm) \
447 _EOR_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
448 #define _EORS_REG_REG_COND(rd, rn, rm, cond) \
449 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_EOR, rd, rn, rm, cond)
450 #define _EORS_REG_REG(rd, rn, rm) \
451 _EORS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
455 /* Rd := Rn EOR (Rm <shift_type> imm_shift) */
456 #define ARM_EOR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
457 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
458 #define ARM_EOR_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
459 ARM_EOR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
460 #define ARM_EORS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
461 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
462 #define ARM_EORS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
463 ARM_EORS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
466 #define _EOR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
467 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
468 #define _EOR_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
469 _EOR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
470 #define _EORS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
471 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_type, imm_shift, cond)
472 #define _EORS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
473 _EORS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
477 /* Rd := Rn EOR (Rm <shift_type> Rs) */
478 #define ARM_EOR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
479 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_type, rs, cond)
480 #define ARM_EOR_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
481 ARM_EOR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
482 #define ARM_EORS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
483 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_EOR, rd, rn, rm, shift_type, rs, cond)
484 #define ARM_EORS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
485 ARM_EORS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
488 #define _EOR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
489 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_type, rs, cond)
490 #define _EOR_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
491 _EOR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
492 #define _EORS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
493 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_EOR, rd, rn, rm, shift_type, rs, cond)
494 #define _EORS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
495 _EORS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
501 /* Rd := Rn SUB (imm8 ROR rot) ; rot is power of 2 */
502 #define ARM_SUB_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
503 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_SUB, rd, rn, imm8, rot, cond)
504 #define ARM_SUB_REG_IMM(p, rd, rn, imm8, rot) \
505 ARM_SUB_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
506 #define ARM_SUBS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
507 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_SUB, rd, rn, imm8, rot, cond)
508 #define ARM_SUBS_REG_IMM(p, rd, rn, imm8, rot) \
509 ARM_SUBS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
512 #define _SUB_REG_IMM_COND(rd, rn, imm8, rot, cond) \
513 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_SUB, rd, rn, imm8, rot, cond)
514 #define _SUB_REG_IMM(rd, rn, imm8, rot) \
515 _SUB_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
516 #define _SUBS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
517 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_SUB, rd, rn, imm8, rot, cond)
518 #define _SUBS_REG_IMM(rd, rn, imm8, rot) \
519 _SUBS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
523 /* Rd := Rn SUB imm8 */
524 #define ARM_SUB_REG_IMM8_COND(p, rd, rn, imm8, cond) \
525 ARM_SUB_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
526 #define ARM_SUB_REG_IMM8(p, rd, rn, imm8) \
527 ARM_SUB_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
528 #define ARM_SUBS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
529 ARM_SUBS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
530 #define ARM_SUBS_REG_IMM8(p, rd, rn, imm8) \
531 ARM_SUBS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
534 #define _SUB_REG_IMM8_COND(rd, rn, imm8, cond) \
535 _SUB_REG_IMM_COND(rd, rn, imm8, 0, cond)
536 #define _SUB_REG_IMM8(rd, rn, imm8) \
537 _SUB_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
538 #define _SUBS_REG_IMM8_COND(rd, rn, imm8, cond) \
539 _SUBS_REG_IMM_COND(rd, rn, imm8, 0, cond)
540 #define _SUBS_REG_IMM8(rd, rn, imm8) \
541 _SUBS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
545 /* Rd := Rn SUB Rm */
546 #define ARM_SUB_REG_REG_COND(p, rd, rn, rm, cond) \
547 ARM_DPIOP_REG_REG_COND(p, ARMOP_SUB, rd, rn, rm, cond)
548 #define ARM_SUB_REG_REG(p, rd, rn, rm) \
549 ARM_SUB_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
550 #define ARM_SUBS_REG_REG_COND(p, rd, rn, rm, cond) \
551 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_SUB, rd, rn, rm, cond)
552 #define ARM_SUBS_REG_REG(p, rd, rn, rm) \
553 ARM_SUBS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
556 #define _SUB_REG_REG_COND(rd, rn, rm, cond) \
557 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_SUB, rd, rn, rm, cond)
558 #define _SUB_REG_REG(rd, rn, rm) \
559 _SUB_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
560 #define _SUBS_REG_REG_COND(rd, rn, rm, cond) \
561 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_SUB, rd, rn, rm, cond)
562 #define _SUBS_REG_REG(rd, rn, rm) \
563 _SUBS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
567 /* Rd := Rn SUB (Rm <shift_type> imm_shift) */
568 #define ARM_SUB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
569 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
570 #define ARM_SUB_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
571 ARM_SUB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
572 #define ARM_SUBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
573 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
574 #define ARM_SUBS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
575 ARM_SUBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
578 #define _SUB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
579 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
580 #define _SUB_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
581 _SUB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
582 #define _SUBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
583 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_type, imm_shift, cond)
584 #define _SUBS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
585 _SUBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
589 /* Rd := Rn SUB (Rm <shift_type> Rs) */
590 #define ARM_SUB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
591 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_type, rs, cond)
592 #define ARM_SUB_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
593 ARM_SUB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
594 #define ARM_SUBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
595 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_SUB, rd, rn, rm, shift_type, rs, cond)
596 #define ARM_SUBS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
597 ARM_SUBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
600 #define _SUB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
601 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_type, rs, cond)
602 #define _SUB_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
603 _SUB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
604 #define _SUBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
605 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_SUB, rd, rn, rm, shift_type, rs, cond)
606 #define _SUBS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
607 _SUBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
613 /* Rd := Rn RSB (imm8 ROR rot) ; rot is power of 2 */
614 #define ARM_RSB_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
615 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_RSB, rd, rn, imm8, rot, cond)
616 #define ARM_RSB_REG_IMM(p, rd, rn, imm8, rot) \
617 ARM_RSB_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
618 #define ARM_RSBS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
619 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_RSB, rd, rn, imm8, rot, cond)
620 #define ARM_RSBS_REG_IMM(p, rd, rn, imm8, rot) \
621 ARM_RSBS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
624 #define _RSB_REG_IMM_COND(rd, rn, imm8, rot, cond) \
625 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_RSB, rd, rn, imm8, rot, cond)
626 #define _RSB_REG_IMM(rd, rn, imm8, rot) \
627 _RSB_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
628 #define _RSBS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
629 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_RSB, rd, rn, imm8, rot, cond)
630 #define _RSBS_REG_IMM(rd, rn, imm8, rot) \
631 _RSBS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
635 /* Rd := Rn RSB imm8 */
636 #define ARM_RSB_REG_IMM8_COND(p, rd, rn, imm8, cond) \
637 ARM_RSB_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
638 #define ARM_RSB_REG_IMM8(p, rd, rn, imm8) \
639 ARM_RSB_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
640 #define ARM_RSBS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
641 ARM_RSBS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
642 #define ARM_RSBS_REG_IMM8(p, rd, rn, imm8) \
643 ARM_RSBS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
646 #define _RSB_REG_IMM8_COND(rd, rn, imm8, cond) \
647 _RSB_REG_IMM_COND(rd, rn, imm8, 0, cond)
648 #define _RSB_REG_IMM8(rd, rn, imm8) \
649 _RSB_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
650 #define _RSBS_REG_IMM8_COND(rd, rn, imm8, cond) \
651 _RSBS_REG_IMM_COND(rd, rn, imm8, 0, cond)
652 #define _RSBS_REG_IMM8(rd, rn, imm8) \
653 _RSBS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
657 /* Rd := Rn RSB Rm */
658 #define ARM_RSB_REG_REG_COND(p, rd, rn, rm, cond) \
659 ARM_DPIOP_REG_REG_COND(p, ARMOP_RSB, rd, rn, rm, cond)
660 #define ARM_RSB_REG_REG(p, rd, rn, rm) \
661 ARM_RSB_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
662 #define ARM_RSBS_REG_REG_COND(p, rd, rn, rm, cond) \
663 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_RSB, rd, rn, rm, cond)
664 #define ARM_RSBS_REG_REG(p, rd, rn, rm) \
665 ARM_RSBS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
668 #define _RSB_REG_REG_COND(rd, rn, rm, cond) \
669 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_RSB, rd, rn, rm, cond)
670 #define _RSB_REG_REG(rd, rn, rm) \
671 _RSB_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
672 #define _RSBS_REG_REG_COND(rd, rn, rm, cond) \
673 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_RSB, rd, rn, rm, cond)
674 #define _RSBS_REG_REG(rd, rn, rm) \
675 _RSBS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
679 /* Rd := Rn RSB (Rm <shift_type> imm_shift) */
680 #define ARM_RSB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
681 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
682 #define ARM_RSB_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
683 ARM_RSB_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
684 #define ARM_RSBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
685 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
686 #define ARM_RSBS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
687 ARM_RSBS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
690 #define _RSB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
691 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
692 #define _RSB_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
693 _RSB_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
694 #define _RSBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
695 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_type, imm_shift, cond)
696 #define _RSBS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
697 _RSBS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
701 /* Rd := Rn RSB (Rm <shift_type> Rs) */
702 #define ARM_RSB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
703 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_type, rs, cond)
704 #define ARM_RSB_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
705 ARM_RSB_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
706 #define ARM_RSBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
707 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_RSB, rd, rn, rm, shift_type, rs, cond)
708 #define ARM_RSBS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
709 ARM_RSBS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
712 #define _RSB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
713 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_type, rs, cond)
714 #define _RSB_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
715 _RSB_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
716 #define _RSBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
717 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_RSB, rd, rn, rm, shift_type, rs, cond)
718 #define _RSBS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
719 _RSBS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
725 /* Rd := Rn ADD (imm8 ROR rot) ; rot is power of 2 */
726 #define ARM_ADD_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
727 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_ADD, rd, rn, imm8, rot, cond)
728 #define ARM_ADD_REG_IMM(p, rd, rn, imm8, rot) \
729 ARM_ADD_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
730 #define ARM_ADDS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
731 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_ADD, rd, rn, imm8, rot, cond)
732 #define ARM_ADDS_REG_IMM(p, rd, rn, imm8, rot) \
733 ARM_ADDS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
736 #define _ADD_REG_IMM_COND(rd, rn, imm8, rot, cond) \
737 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_ADD, rd, rn, imm8, rot, cond)
738 #define _ADD_REG_IMM(rd, rn, imm8, rot) \
739 _ADD_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
740 #define _ADDS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
741 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_ADD, rd, rn, imm8, rot, cond)
742 #define _ADDS_REG_IMM(rd, rn, imm8, rot) \
743 _ADDS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
747 /* Rd := Rn ADD imm8 */
748 #define ARM_ADD_REG_IMM8_COND(p, rd, rn, imm8, cond) \
749 ARM_ADD_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
750 #define ARM_ADD_REG_IMM8(p, rd, rn, imm8) \
751 ARM_ADD_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
752 #define ARM_ADDS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
753 ARM_ADDS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
754 #define ARM_ADDS_REG_IMM8(p, rd, rn, imm8) \
755 ARM_ADDS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
758 #define _ADD_REG_IMM8_COND(rd, rn, imm8, cond) \
759 _ADD_REG_IMM_COND(rd, rn, imm8, 0, cond)
760 #define _ADD_REG_IMM8(rd, rn, imm8) \
761 _ADD_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
762 #define _ADDS_REG_IMM8_COND(rd, rn, imm8, cond) \
763 _ADDS_REG_IMM_COND(rd, rn, imm8, 0, cond)
764 #define _ADDS_REG_IMM8(rd, rn, imm8) \
765 _ADDS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
769 /* Rd := Rn ADD Rm */
770 #define ARM_ADD_REG_REG_COND(p, rd, rn, rm, cond) \
771 ARM_DPIOP_REG_REG_COND(p, ARMOP_ADD, rd, rn, rm, cond)
772 #define ARM_ADD_REG_REG(p, rd, rn, rm) \
773 ARM_ADD_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
774 #define ARM_ADDS_REG_REG_COND(p, rd, rn, rm, cond) \
775 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ADD, rd, rn, rm, cond)
776 #define ARM_ADDS_REG_REG(p, rd, rn, rm) \
777 ARM_ADDS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
780 #define _ADD_REG_REG_COND(rd, rn, rm, cond) \
781 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ADD, rd, rn, rm, cond)
782 #define _ADD_REG_REG(rd, rn, rm) \
783 _ADD_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
784 #define _ADDS_REG_REG_COND(rd, rn, rm, cond) \
785 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ADD, rd, rn, rm, cond)
786 #define _ADDS_REG_REG(rd, rn, rm) \
787 _ADDS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
791 /* Rd := Rn ADD (Rm <shift_type> imm_shift) */
792 #define ARM_ADD_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
793 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
794 #define ARM_ADD_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
795 ARM_ADD_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
796 #define ARM_ADDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
797 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
798 #define ARM_ADDS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
799 ARM_ADDS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
802 #define _ADD_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
803 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
804 #define _ADD_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
805 _ADD_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
806 #define _ADDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
807 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_type, imm_shift, cond)
808 #define _ADDS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
809 _ADDS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
813 /* Rd := Rn ADD (Rm <shift_type> Rs) */
814 #define ARM_ADD_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
815 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_type, rs, cond)
816 #define ARM_ADD_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
817 ARM_ADD_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
818 #define ARM_ADDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
819 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ADD, rd, rn, rm, shift_type, rs, cond)
820 #define ARM_ADDS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
821 ARM_ADDS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
824 #define _ADD_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
825 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_type, rs, cond)
826 #define _ADD_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
827 _ADD_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
828 #define _ADDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
829 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ADD, rd, rn, rm, shift_type, rs, cond)
830 #define _ADDS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
831 _ADDS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
837 /* Rd := Rn ADC (imm8 ROR rot) ; rot is power of 2 */
838 #define ARM_ADC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
839 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_ADC, rd, rn, imm8, rot, cond)
840 #define ARM_ADC_REG_IMM(p, rd, rn, imm8, rot) \
841 ARM_ADC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
842 #define ARM_ADCS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
843 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_ADC, rd, rn, imm8, rot, cond)
844 #define ARM_ADCS_REG_IMM(p, rd, rn, imm8, rot) \
845 ARM_ADCS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
848 #define _ADC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
849 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_ADC, rd, rn, imm8, rot, cond)
850 #define _ADC_REG_IMM(rd, rn, imm8, rot) \
851 _ADC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
852 #define _ADCS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
853 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_ADC, rd, rn, imm8, rot, cond)
854 #define _ADCS_REG_IMM(rd, rn, imm8, rot) \
855 _ADCS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
859 /* Rd := Rn ADC imm8 */
860 #define ARM_ADC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
861 ARM_ADC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
862 #define ARM_ADC_REG_IMM8(p, rd, rn, imm8) \
863 ARM_ADC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
864 #define ARM_ADCS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
865 ARM_ADCS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
866 #define ARM_ADCS_REG_IMM8(p, rd, rn, imm8) \
867 ARM_ADCS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
870 #define _ADC_REG_IMM8_COND(rd, rn, imm8, cond) \
871 _ADC_REG_IMM_COND(rd, rn, imm8, 0, cond)
872 #define _ADC_REG_IMM8(rd, rn, imm8) \
873 _ADC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
874 #define _ADCS_REG_IMM8_COND(rd, rn, imm8, cond) \
875 _ADCS_REG_IMM_COND(rd, rn, imm8, 0, cond)
876 #define _ADCS_REG_IMM8(rd, rn, imm8) \
877 _ADCS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
881 /* Rd := Rn ADC Rm */
882 #define ARM_ADC_REG_REG_COND(p, rd, rn, rm, cond) \
883 ARM_DPIOP_REG_REG_COND(p, ARMOP_ADC, rd, rn, rm, cond)
884 #define ARM_ADC_REG_REG(p, rd, rn, rm) \
885 ARM_ADC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
886 #define ARM_ADCS_REG_REG_COND(p, rd, rn, rm, cond) \
887 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ADC, rd, rn, rm, cond)
888 #define ARM_ADCS_REG_REG(p, rd, rn, rm) \
889 ARM_ADCS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
892 #define _ADC_REG_REG_COND(rd, rn, rm, cond) \
893 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ADC, rd, rn, rm, cond)
894 #define _ADC_REG_REG(rd, rn, rm) \
895 _ADC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
896 #define _ADCS_REG_REG_COND(rd, rn, rm, cond) \
897 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ADC, rd, rn, rm, cond)
898 #define _ADCS_REG_REG(rd, rn, rm) \
899 _ADCS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
903 /* Rd := Rn ADC (Rm <shift_type> imm_shift) */
904 #define ARM_ADC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
905 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
906 #define ARM_ADC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
907 ARM_ADC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
908 #define ARM_ADCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
909 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
910 #define ARM_ADCS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
911 ARM_ADCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
914 #define _ADC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
915 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
916 #define _ADC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
917 _ADC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
918 #define _ADCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
919 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_type, imm_shift, cond)
920 #define _ADCS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
921 _ADCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
925 /* Rd := Rn ADC (Rm <shift_type> Rs) */
926 #define ARM_ADC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
927 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_type, rs, cond)
928 #define ARM_ADC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
929 ARM_ADC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
930 #define ARM_ADCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
931 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ADC, rd, rn, rm, shift_type, rs, cond)
932 #define ARM_ADCS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
933 ARM_ADCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
936 #define _ADC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
937 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_type, rs, cond)
938 #define _ADC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
939 _ADC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
940 #define _ADCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
941 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ADC, rd, rn, rm, shift_type, rs, cond)
942 #define _ADCS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
943 _ADCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
949 /* Rd := Rn SBC (imm8 ROR rot) ; rot is power of 2 */
950 #define ARM_SBC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
951 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_SBC, rd, rn, imm8, rot, cond)
952 #define ARM_SBC_REG_IMM(p, rd, rn, imm8, rot) \
953 ARM_SBC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
954 #define ARM_SBCS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
955 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_SBC, rd, rn, imm8, rot, cond)
956 #define ARM_SBCS_REG_IMM(p, rd, rn, imm8, rot) \
957 ARM_SBCS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
960 #define _SBC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
961 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_SBC, rd, rn, imm8, rot, cond)
962 #define _SBC_REG_IMM(rd, rn, imm8, rot) \
963 _SBC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
964 #define _SBCS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
965 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_SBC, rd, rn, imm8, rot, cond)
966 #define _SBCS_REG_IMM(rd, rn, imm8, rot) \
967 _SBCS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
971 /* Rd := Rn SBC imm8 */
972 #define ARM_SBC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
973 ARM_SBC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
974 #define ARM_SBC_REG_IMM8(p, rd, rn, imm8) \
975 ARM_SBC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
976 #define ARM_SBCS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
977 ARM_SBCS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
978 #define ARM_SBCS_REG_IMM8(p, rd, rn, imm8) \
979 ARM_SBCS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
982 #define _SBC_REG_IMM8_COND(rd, rn, imm8, cond) \
983 _SBC_REG_IMM_COND(rd, rn, imm8, 0, cond)
984 #define _SBC_REG_IMM8(rd, rn, imm8) \
985 _SBC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
986 #define _SBCS_REG_IMM8_COND(rd, rn, imm8, cond) \
987 _SBCS_REG_IMM_COND(rd, rn, imm8, 0, cond)
988 #define _SBCS_REG_IMM8(rd, rn, imm8) \
989 _SBCS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
993 /* Rd := Rn SBC Rm */
994 #define ARM_SBC_REG_REG_COND(p, rd, rn, rm, cond) \
995 ARM_DPIOP_REG_REG_COND(p, ARMOP_SBC, rd, rn, rm, cond)
996 #define ARM_SBC_REG_REG(p, rd, rn, rm) \
997 ARM_SBC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
998 #define ARM_SBCS_REG_REG_COND(p, rd, rn, rm, cond) \
999 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_SBC, rd, rn, rm, cond)
1000 #define ARM_SBCS_REG_REG(p, rd, rn, rm) \
1001 ARM_SBCS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1004 #define _SBC_REG_REG_COND(rd, rn, rm, cond) \
1005 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_SBC, rd, rn, rm, cond)
1006 #define _SBC_REG_REG(rd, rn, rm) \
1007 _SBC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1008 #define _SBCS_REG_REG_COND(rd, rn, rm, cond) \
1009 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_SBC, rd, rn, rm, cond)
1010 #define _SBCS_REG_REG(rd, rn, rm) \
1011 _SBCS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1015 /* Rd := Rn SBC (Rm <shift_type> imm_shift) */
1016 #define ARM_SBC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1017 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
1018 #define ARM_SBC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1019 ARM_SBC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1020 #define ARM_SBCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1021 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
1022 #define ARM_SBCS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1023 ARM_SBCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1026 #define _SBC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1027 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
1028 #define _SBC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1029 _SBC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1030 #define _SBCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1031 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_type, imm_shift, cond)
1032 #define _SBCS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1033 _SBCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1037 /* Rd := Rn SBC (Rm <shift_type> Rs) */
1038 #define ARM_SBC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1039 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_type, rs, cond)
1040 #define ARM_SBC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1041 ARM_SBC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1042 #define ARM_SBCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1043 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_SBC, rd, rn, rm, shift_type, rs, cond)
1044 #define ARM_SBCS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1045 ARM_SBCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1048 #define _SBC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1049 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_type, rs, cond)
1050 #define _SBC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1051 _SBC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1052 #define _SBCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1053 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_SBC, rd, rn, rm, shift_type, rs, cond)
1054 #define _SBCS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1055 _SBCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1061 /* Rd := Rn RSC (imm8 ROR rot) ; rot is power of 2 */
1062 #define ARM_RSC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1063 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_RSC, rd, rn, imm8, rot, cond)
1064 #define ARM_RSC_REG_IMM(p, rd, rn, imm8, rot) \
1065 ARM_RSC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1066 #define ARM_RSCS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1067 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_RSC, rd, rn, imm8, rot, cond)
1068 #define ARM_RSCS_REG_IMM(p, rd, rn, imm8, rot) \
1069 ARM_RSCS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1072 #define _RSC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1073 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_RSC, rd, rn, imm8, rot, cond)
1074 #define _RSC_REG_IMM(rd, rn, imm8, rot) \
1075 _RSC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1076 #define _RSCS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1077 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_RSC, rd, rn, imm8, rot, cond)
1078 #define _RSCS_REG_IMM(rd, rn, imm8, rot) \
1079 _RSCS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1083 /* Rd := Rn RSC imm8 */
1084 #define ARM_RSC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1085 ARM_RSC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1086 #define ARM_RSC_REG_IMM8(p, rd, rn, imm8) \
1087 ARM_RSC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1088 #define ARM_RSCS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1089 ARM_RSCS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1090 #define ARM_RSCS_REG_IMM8(p, rd, rn, imm8) \
1091 ARM_RSCS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1094 #define _RSC_REG_IMM8_COND(rd, rn, imm8, cond) \
1095 _RSC_REG_IMM_COND(rd, rn, imm8, 0, cond)
1096 #define _RSC_REG_IMM8(rd, rn, imm8) \
1097 _RSC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1098 #define _RSCS_REG_IMM8_COND(rd, rn, imm8, cond) \
1099 _RSCS_REG_IMM_COND(rd, rn, imm8, 0, cond)
1100 #define _RSCS_REG_IMM8(rd, rn, imm8) \
1101 _RSCS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1105 /* Rd := Rn RSC Rm */
1106 #define ARM_RSC_REG_REG_COND(p, rd, rn, rm, cond) \
1107 ARM_DPIOP_REG_REG_COND(p, ARMOP_RSC, rd, rn, rm, cond)
1108 #define ARM_RSC_REG_REG(p, rd, rn, rm) \
1109 ARM_RSC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1110 #define ARM_RSCS_REG_REG_COND(p, rd, rn, rm, cond) \
1111 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_RSC, rd, rn, rm, cond)
1112 #define ARM_RSCS_REG_REG(p, rd, rn, rm) \
1113 ARM_RSCS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1116 #define _RSC_REG_REG_COND(rd, rn, rm, cond) \
1117 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_RSC, rd, rn, rm, cond)
1118 #define _RSC_REG_REG(rd, rn, rm) \
1119 _RSC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1120 #define _RSCS_REG_REG_COND(rd, rn, rm, cond) \
1121 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_RSC, rd, rn, rm, cond)
1122 #define _RSCS_REG_REG(rd, rn, rm) \
1123 _RSCS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1127 /* Rd := Rn RSC (Rm <shift_type> imm_shift) */
1128 #define ARM_RSC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1129 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1130 #define ARM_RSC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1131 ARM_RSC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1132 #define ARM_RSCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1133 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1134 #define ARM_RSCS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1135 ARM_RSCS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1138 #define _RSC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1139 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1140 #define _RSC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1141 _RSC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1142 #define _RSCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1143 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_type, imm_shift, cond)
1144 #define _RSCS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1145 _RSCS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1149 /* Rd := Rn RSC (Rm <shift_type> Rs) */
1150 #define ARM_RSC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1151 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_type, rs, cond)
1152 #define ARM_RSC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1153 ARM_RSC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1154 #define ARM_RSCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1155 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_RSC, rd, rn, rm, shift_type, rs, cond)
1156 #define ARM_RSCS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1157 ARM_RSCS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1160 #define _RSC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1161 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_type, rs, cond)
1162 #define _RSC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1163 _RSC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1164 #define _RSCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1165 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_RSC, rd, rn, rm, shift_type, rs, cond)
1166 #define _RSCS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1167 _RSCS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1173 /* Rd := Rn ORR (imm8 ROR rot) ; rot is power of 2 */
1174 #define ARM_ORR_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1175 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_ORR, rd, rn, imm8, rot, cond)
1176 #define ARM_ORR_REG_IMM(p, rd, rn, imm8, rot) \
1177 ARM_ORR_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1178 #define ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1179 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_ORR, rd, rn, imm8, rot, cond)
1180 #define ARM_ORRS_REG_IMM(p, rd, rn, imm8, rot) \
1181 ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1184 #define _ORR_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1185 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_ORR, rd, rn, imm8, rot, cond)
1186 #define _ORR_REG_IMM(rd, rn, imm8, rot) \
1187 _ORR_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1188 #define _ORRS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1189 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_ORR, rd, rn, imm8, rot, cond)
1190 #define _ORRS_REG_IMM(rd, rn, imm8, rot) \
1191 _ORRS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1195 /* Rd := Rn ORR imm8 */
1196 #define ARM_ORR_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1197 ARM_ORR_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1198 #define ARM_ORR_REG_IMM8(p, rd, rn, imm8) \
1199 ARM_ORR_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1200 #define ARM_ORRS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1201 ARM_ORRS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1202 #define ARM_ORRS_REG_IMM8(p, rd, rn, imm8) \
1203 ARM_ORRS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1206 #define _ORR_REG_IMM8_COND(rd, rn, imm8, cond) \
1207 _ORR_REG_IMM_COND(rd, rn, imm8, 0, cond)
1208 #define _ORR_REG_IMM8(rd, rn, imm8) \
1209 _ORR_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1210 #define _ORRS_REG_IMM8_COND(rd, rn, imm8, cond) \
1211 _ORRS_REG_IMM_COND(rd, rn, imm8, 0, cond)
1212 #define _ORRS_REG_IMM8(rd, rn, imm8) \
1213 _ORRS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1217 /* Rd := Rn ORR Rm */
1218 #define ARM_ORR_REG_REG_COND(p, rd, rn, rm, cond) \
1219 ARM_DPIOP_REG_REG_COND(p, ARMOP_ORR, rd, rn, rm, cond)
1220 #define ARM_ORR_REG_REG(p, rd, rn, rm) \
1221 ARM_ORR_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1222 #define ARM_ORRS_REG_REG_COND(p, rd, rn, rm, cond) \
1223 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_ORR, rd, rn, rm, cond)
1224 #define ARM_ORRS_REG_REG(p, rd, rn, rm) \
1225 ARM_ORRS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1228 #define _ORR_REG_REG_COND(rd, rn, rm, cond) \
1229 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_ORR, rd, rn, rm, cond)
1230 #define _ORR_REG_REG(rd, rn, rm) \
1231 _ORR_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1232 #define _ORRS_REG_REG_COND(rd, rn, rm, cond) \
1233 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_ORR, rd, rn, rm, cond)
1234 #define _ORRS_REG_REG(rd, rn, rm) \
1235 _ORRS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1239 /* Rd := Rn ORR (Rm <shift_type> imm_shift) */
1240 #define ARM_ORR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1241 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1242 #define ARM_ORR_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1243 ARM_ORR_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1244 #define ARM_ORRS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1245 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1246 #define ARM_ORRS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1247 ARM_ORRS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1250 #define _ORR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1251 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1252 #define _ORR_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1253 _ORR_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1254 #define _ORRS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1255 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, imm_shift, cond)
1256 #define _ORRS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1257 _ORRS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1261 /* Rd := Rn ORR (Rm <shift_type> Rs) */
1262 #define ARM_ORR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1263 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, rs, cond)
1264 #define ARM_ORR_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1265 ARM_ORR_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1266 #define ARM_ORRS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1267 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_ORR, rd, rn, rm, shift_type, rs, cond)
1268 #define ARM_ORRS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1269 ARM_ORRS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1272 #define _ORR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1273 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, rs, cond)
1274 #define _ORR_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1275 _ORR_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1276 #define _ORRS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1277 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_ORR, rd, rn, rm, shift_type, rs, cond)
1278 #define _ORRS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1279 _ORRS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1285 /* Rd := Rn BIC (imm8 ROR rot) ; rot is power of 2 */
1286 #define ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1287 ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_BIC, rd, rn, imm8, rot, cond)
1288 #define ARM_BIC_REG_IMM(p, rd, rn, imm8, rot) \
1289 ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1290 #define ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \
1291 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_BIC, rd, rn, imm8, rot, cond)
1292 #define ARM_BICS_REG_IMM(p, rd, rn, imm8, rot) \
1293 ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL)
1296 #define _BIC_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1297 ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_BIC, rd, rn, imm8, rot, cond)
1298 #define _BIC_REG_IMM(rd, rn, imm8, rot) \
1299 _BIC_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1300 #define _BICS_REG_IMM_COND(rd, rn, imm8, rot, cond) \
1301 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_BIC, rd, rn, imm8, rot, cond)
1302 #define _BICS_REG_IMM(rd, rn, imm8, rot) \
1303 _BICS_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL)
1307 /* Rd := Rn BIC imm8 */
1308 #define ARM_BIC_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1309 ARM_BIC_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1310 #define ARM_BIC_REG_IMM8(p, rd, rn, imm8) \
1311 ARM_BIC_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1312 #define ARM_BICS_REG_IMM8_COND(p, rd, rn, imm8, cond) \
1313 ARM_BICS_REG_IMM_COND(p, rd, rn, imm8, 0, cond)
1314 #define ARM_BICS_REG_IMM8(p, rd, rn, imm8) \
1315 ARM_BICS_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL)
1318 #define _BIC_REG_IMM8_COND(rd, rn, imm8, cond) \
1319 _BIC_REG_IMM_COND(rd, rn, imm8, 0, cond)
1320 #define _BIC_REG_IMM8(rd, rn, imm8) \
1321 _BIC_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1322 #define _BICS_REG_IMM8_COND(rd, rn, imm8, cond) \
1323 _BICS_REG_IMM_COND(rd, rn, imm8, 0, cond)
1324 #define _BICS_REG_IMM8(rd, rn, imm8) \
1325 _BICS_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL)
1329 /* Rd := Rn BIC Rm */
1330 #define ARM_BIC_REG_REG_COND(p, rd, rn, rm, cond) \
1331 ARM_DPIOP_REG_REG_COND(p, ARMOP_BIC, rd, rn, rm, cond)
1332 #define ARM_BIC_REG_REG(p, rd, rn, rm) \
1333 ARM_BIC_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1334 #define ARM_BICS_REG_REG_COND(p, rd, rn, rm, cond) \
1335 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_BIC, rd, rn, rm, cond)
1336 #define ARM_BICS_REG_REG(p, rd, rn, rm) \
1337 ARM_BICS_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL)
1340 #define _BIC_REG_REG_COND(rd, rn, rm, cond) \
1341 ARM_IASM_DPIOP_REG_REG_COND(ARMOP_BIC, rd, rn, rm, cond)
1342 #define _BIC_REG_REG(rd, rn, rm) \
1343 _BIC_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1344 #define _BICS_REG_REG_COND(rd, rn, rm, cond) \
1345 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_BIC, rd, rn, rm, cond)
1346 #define _BICS_REG_REG(rd, rn, rm) \
1347 _BICS_REG_REG_COND(rd, rn, rm, ARMCOND_AL)
1351 /* Rd := Rn BIC (Rm <shift_type> imm_shift) */
1352 #define ARM_BIC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1353 ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1354 #define ARM_BIC_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1355 ARM_BIC_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1356 #define ARM_BICS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \
1357 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1358 #define ARM_BICS_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \
1359 ARM_BICS_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1362 #define _BIC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1363 ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1364 #define _BIC_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1365 _BIC_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1366 #define _BICS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \
1367 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, imm_shift, cond)
1368 #define _BICS_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \
1369 _BICS_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1373 /* Rd := Rn BIC (Rm <shift_type> Rs) */
1374 #define ARM_BIC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1375 ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, rs, cond)
1376 #define ARM_BIC_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1377 ARM_BIC_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1378 #define ARM_BICS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \
1379 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_BIC, rd, rn, rm, shift_type, rs, cond)
1380 #define ARM_BICS_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \
1381 ARM_BICS_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL)
1384 #define _BIC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1385 ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, rs, cond)
1386 #define _BIC_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1387 _BIC_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1388 #define _BICS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1389 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_BIC, rd, rn, rm, shift_type, rs, cond)
1390 #define _BICS_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1391 _BICS_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1399 /* DPIs, comparison */
1401 /* PSR := TST Rn, (imm8 ROR 2*rot) */
1402 #define ARM_TST_REG_IMM_COND(p, rn, imm8, rot, cond) \
1403 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_TST, 0, rn, imm8, rot, cond)
1404 #define ARM_TST_REG_IMM(p, rn, imm8, rot) \
1405 ARM_TST_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1408 #define _TST_REG_IMM_COND(rn, imm8, rot, cond) \
1409 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_TST, 0, rn, imm8, rot, cond)
1410 #define _TST_REG_IMM(rn, imm8, rot) \
1411 _TST_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1415 /* PSR := TST Rn, imm8 */
1416 #define ARM_TST_REG_IMM8_COND(p, rn, imm8, cond) \
1417 ARM_TST_REG_IMM_COND(p, rn, imm8, 0, cond)
1418 #define ARM_TST_REG_IMM8(p, rn, imm8) \
1419 ARM_TST_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1422 #define _TST_REG_IMM8_COND(rn, imm8, cond) \
1423 _TST_REG_IMM_COND(rn, imm8, 0, cond)
1424 #define _TST_REG_IMM8(rn, imm8) \
1425 _TST_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1429 /* PSR := TST Rn, Rm */
1430 #define ARM_TST_REG_REG_COND(p, rn, rm, cond) \
1431 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_TST, 0, rn, rm, cond)
1432 #define ARM_TST_REG_REG(p, rn, rm) \
1433 ARM_TST_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1436 #define _TST_REG_REG_COND(rn, rm, cond) \
1437 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_TST, 0, rn, rm, cond)
1438 #define _TST_REG_REG(rn, rm) \
1439 _TST_REG_REG_COND(rn, rm, ARMCOND_AL)
1443 /* PSR := TST Rn, (Rm <shift_type> imm8) */
1444 #define ARM_TST_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1445 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_TST, 0, rn, rm, shift_type, imm_shift, cond)
1446 #define ARM_TST_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1447 ARM_TST_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1450 #define _TST_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1451 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_TST, 0, rn, rm, shift_type, imm_shift, cond)
1452 #define _TST_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1453 _TST_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
1457 /* PSR := TEQ Rn, (imm8 ROR 2*rot) */
1458 #define ARM_TEQ_REG_IMM_COND(p, rn, imm8, rot, cond) \
1459 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_TEQ, 0, rn, imm8, rot, cond)
1460 #define ARM_TEQ_REG_IMM(p, rn, imm8, rot) \
1461 ARM_TEQ_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1464 #define _TEQ_REG_IMM_COND(rn, imm8, rot, cond) \
1465 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_TEQ, 0, rn, imm8, rot, cond)
1466 #define _TEQ_REG_IMM(rn, imm8, rot) \
1467 _TEQ_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1471 /* PSR := TEQ Rn, imm8 */
1472 #define ARM_TEQ_REG_IMM8_COND(p, rn, imm8, cond) \
1473 ARM_TEQ_REG_IMM_COND(p, rn, imm8, 0, cond)
1474 #define ARM_TEQ_REG_IMM8(p, rn, imm8) \
1475 ARM_TEQ_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1478 #define _TEQ_REG_IMM8_COND(rn, imm8, cond) \
1479 _TEQ_REG_IMM_COND(rn, imm8, 0, cond)
1480 #define _TEQ_REG_IMM8(rn, imm8) \
1481 _TEQ_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1485 /* PSR := TEQ Rn, Rm */
1486 #define ARM_TEQ_REG_REG_COND(p, rn, rm, cond) \
1487 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_TEQ, 0, rn, rm, cond)
1488 #define ARM_TEQ_REG_REG(p, rn, rm) \
1489 ARM_TEQ_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1492 #define _TEQ_REG_REG_COND(rn, rm, cond) \
1493 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_TEQ, 0, rn, rm, cond)
1494 #define _TEQ_REG_REG(rn, rm) \
1495 _TEQ_REG_REG_COND(rn, rm, ARMCOND_AL)
1499 /* PSR := TEQ Rn, (Rm <shift_type> imm8) */
1500 #define ARM_TEQ_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1501 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_TEQ, 0, rn, rm, shift_type, imm_shift, cond)
1502 #define ARM_TEQ_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1503 ARM_TEQ_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1506 #define _TEQ_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1507 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_TEQ, 0, rn, rm, shift_type, imm_shift, cond)
1508 #define _TEQ_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1509 _TEQ_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
1513 /* PSR := CMP Rn, (imm8 ROR 2*rot) */
1514 #define ARM_CMP_REG_IMM_COND(p, rn, imm8, rot, cond) \
1515 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_CMP, 0, rn, imm8, rot, cond)
1516 #define ARM_CMP_REG_IMM(p, rn, imm8, rot) \
1517 ARM_CMP_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1520 #define _CMP_REG_IMM_COND(rn, imm8, rot, cond) \
1521 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_CMP, 0, rn, imm8, rot, cond)
1522 #define _CMP_REG_IMM(rn, imm8, rot) \
1523 _CMP_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1527 /* PSR := CMP Rn, imm8 */
1528 #define ARM_CMP_REG_IMM8_COND(p, rn, imm8, cond) \
1529 ARM_CMP_REG_IMM_COND(p, rn, imm8, 0, cond)
1530 #define ARM_CMP_REG_IMM8(p, rn, imm8) \
1531 ARM_CMP_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1534 #define _CMP_REG_IMM8_COND(rn, imm8, cond) \
1535 _CMP_REG_IMM_COND(rn, imm8, 0, cond)
1536 #define _CMP_REG_IMM8(rn, imm8) \
1537 _CMP_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1541 /* PSR := CMP Rn, Rm */
1542 #define ARM_CMP_REG_REG_COND(p, rn, rm, cond) \
1543 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_CMP, 0, rn, rm, cond)
1544 #define ARM_CMP_REG_REG(p, rn, rm) \
1545 ARM_CMP_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1548 #define _CMP_REG_REG_COND(rn, rm, cond) \
1549 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_CMP, 0, rn, rm, cond)
1550 #define _CMP_REG_REG(rn, rm) \
1551 _CMP_REG_REG_COND(rn, rm, ARMCOND_AL)
1555 /* PSR := CMP Rn, (Rm <shift_type> imm8) */
1556 #define ARM_CMP_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1557 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_CMP, 0, rn, rm, shift_type, imm_shift, cond)
1558 #define ARM_CMP_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1559 ARM_CMP_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1562 #define _CMP_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1563 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_CMP, 0, rn, rm, shift_type, imm_shift, cond)
1564 #define _CMP_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1565 _CMP_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)
1569 /* PSR := CMP Rn, (Rm <shift_type> Rs) */
1570 #define ARM_CMP_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, cond) \
1571 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_CMP, 0, rn, rm, shift_type, rs, cond)
1572 #define ARM_CMP_REG_REGSHIFT(p, rn, rm, shift_type, rs) \
1573 ARM_CMP_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
1575 /* PSR := CMN Rn, (Rm <shift_type> Rs) */
1576 #define ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, cond) \
1577 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_CMN, 0, rn, rm, shift_type, rs, cond)
1578 #define ARM_CMN_REG_REGSHIFT(p, rn, rm, shift_type, rs) \
1579 ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
1581 /* PSR := TST Rn, (Rm <shift_type> Rs) */
1582 #define ARM_TST_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, cond) \
1583 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_TST, 0, rn, rm, shift_type, rs, cond)
1584 #define ARM_TST_REG_REGSHIFT(p, rn, rm, shift_type, rs) \
1585 ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
1587 /* PSR := TEQ Rn, (Rm <shift_type> Rs) */
1588 #define ARM_TEQ_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, cond) \
1589 ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_TEQ, 0, rn, rm, shift_type, rs, cond)
1590 #define ARM_TEQ_REG_REGSHIFT(p, rn, rm, shift_type, rs) \
1591 ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
1596 #define _CMP_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \
1597 ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_CMP, rd, rn, rm, shift_type, rs, cond)
1598 #define _CMP_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \
1599 _CMP_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL)
1603 /* PSR := CMN Rn, (imm8 ROR 2*rot) */
1604 #define ARM_CMN_REG_IMM_COND(p, rn, imm8, rot, cond) \
1605 ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_CMN, 0, rn, imm8, rot, cond)
1606 #define ARM_CMN_REG_IMM(p, rn, imm8, rot) \
1607 ARM_CMN_REG_IMM_COND(p, rn, imm8, rot, ARMCOND_AL)
1610 #define _CMN_REG_IMM_COND(rn, imm8, rot, cond) \
1611 ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_CMN, 0, rn, imm8, rot, cond)
1612 #define _CMN_REG_IMM(rn, imm8, rot) \
1613 _CMN_REG_IMM_COND(rn, imm8, rot, ARMCOND_AL)
1617 /* PSR := CMN Rn, imm8 */
1618 #define ARM_CMN_REG_IMM8_COND(p, rn, imm8, cond) \
1619 ARM_CMN_REG_IMM_COND(p, rn, imm8, 0, cond)
1620 #define ARM_CMN_REG_IMM8(p, rn, imm8) \
1621 ARM_CMN_REG_IMM8_COND(p, rn, imm8, ARMCOND_AL)
1624 #define _CMN_REG_IMM8_COND(rn, imm8, cond) \
1625 _CMN_REG_IMM_COND(rn, imm8, 0, cond)
1626 #define _CMN_REG_IMM8(rn, imm8) \
1627 _CMN_REG_IMM8_COND(rn, imm8, ARMCOND_AL)
1631 /* PSR := CMN Rn, Rm */
1632 #define ARM_CMN_REG_REG_COND(p, rn, rm, cond) \
1633 ARM_DPIOP_S_REG_REG_COND(p, ARMOP_CMN, 0, rn, rm, cond)
1634 #define ARM_CMN_REG_REG(p, rn, rm) \
1635 ARM_CMN_REG_REG_COND(p, rn, rm, ARMCOND_AL)
1638 #define _CMN_REG_REG_COND(rn, rm, cond) \
1639 ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_CMN, 0, rn, rm, cond)
1640 #define _CMN_REG_REG(rn, rm) \
1641 _CMN_REG_REG_COND(rn, rm, ARMCOND_AL)
1645 /* PSR := CMN Rn, (Rm <shift_type> imm8) */
1646 #define ARM_CMN_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, cond) \
1647 ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_CMN, 0, rn, rm, shift_type, imm_shift, cond)
1648 #define ARM_CMN_REG_IMMSHIFT(p, rn, rm, shift_type, imm_shift) \
1649 ARM_CMN_REG_IMMSHIFT_COND(p, rn, rm, shift_type, imm_shift, ARMCOND_AL)
1652 #define _CMN_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, cond) \
1653 ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_CMN, 0, rn, rm, shift_type, imm_shift, cond)
1654 #define _CMN_REG_IMMSHIFT(rn, rm, shift_type, imm_shift) \
1655 _CMN_REG_IMMSHIFT_COND(rn, rm, shift_type, imm_shift, ARMCOND_AL)