1 // Memory I/O handlers for Sega/Mega CD.
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2 // Loosely based on Gens code.
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3 // (c) Copyright 2007, Grazvydas "notaz" Ignotas
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5 // A68K no longer supported here
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9 #include "../PicoInt.h"
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11 #include "../sound/ym2612.h"
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12 #include "../sound/sn76496.h"
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17 #ifndef UTYPES_DEFINED
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18 typedef unsigned char u8;
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19 typedef unsigned short u16;
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20 typedef unsigned int u32;
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21 #define UTYPES_DEFINED
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24 //#define __debug_io
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25 //#define __debug_io2
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27 #define rdprintf dprintf
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28 //#define rdprintf(...)
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29 //#define wrdprintf dprintf
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30 #define wrdprintf(...)
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31 #define plprintf dprintf
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32 //#define plprintf(...)
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34 // -----------------------------------------------------------------
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37 //#undef USE_POLL_DETECT
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38 #define POLL_LIMIT 16
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39 #define POLL_CYCLES 124
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40 // int m68k_poll_addr, m68k_poll_cnt;
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41 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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43 #ifndef _ASM_CD_MEMORY_C
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44 static u32 m68k_reg_read16(u32 a)
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48 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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52 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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55 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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56 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)
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57 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }
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58 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);
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61 d = Pico_mcd->s68k_regs[4]<<8;
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64 d = *(u16 *)(Pico_mcd->bios + 0x72);
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67 d = Read_CDC_Host(0);
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70 dprintf("m68k FIXME: reserved read");
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73 d = Pico_mcd->m.timer_stopwatch >> 16;
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74 dprintf("m68k stopwatch timer read (%04x)", d);
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79 // comm flag/cmd/status (0xE-0x2F)
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80 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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84 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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88 // dprintf("ret = %04x", d);
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93 #ifndef _ASM_CD_MEMORY_C
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96 void m68k_reg_write8(u32 a, u32 d)
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99 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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104 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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108 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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109 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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110 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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111 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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112 SekResetS68k(); // S68k comes out of RESET or BRQ state
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113 Pico_mcd->m.state_flags&=~1;
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114 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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116 Pico_mcd->m.busreq = d;
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119 dprintf("m68k: prg wp=%02x", d);
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120 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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123 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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124 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);
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126 if ((dold>>6) != ((d>>6)&3))
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127 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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128 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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129 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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130 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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132 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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134 //dold &= ~2; // ??
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136 if ((d & 2) && !(dold & 2)) {
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137 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
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141 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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144 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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145 #ifdef USE_POLL_DETECT
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146 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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147 SekSetStopS68k(0); s68k_poll_adclk = 0;
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148 plprintf("s68k poll release, a=%02x\n", a);
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154 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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157 Pico_mcd->bios[0x72] = d;
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158 dprintf("hint vector set to %08x", PicoRead32(0x70));
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161 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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163 //dprintf("m68k: comm flag: %02x", d);
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164 Pico_mcd->s68k_regs[0xe] = d;
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165 #ifdef USE_POLL_DETECT
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166 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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167 SekSetStopS68k(0); s68k_poll_adclk = 0;
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168 plprintf("s68k poll release, a=%02x\n", a);
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174 if ((a&0xf0) == 0x10) {
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175 Pico_mcd->s68k_regs[a] = d;
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176 #ifdef USE_POLL_DETECT
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177 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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178 SekSetStopS68k(0); s68k_poll_adclk = 0;
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179 plprintf("s68k poll release, a=%02x\n", a);
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185 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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188 #ifndef _ASM_CD_MEMORY_C
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191 u32 s68k_poll_detect(u32 a, u32 d)
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193 #ifdef USE_POLL_DETECT
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194 // polling detection
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195 if (a == (s68k_poll_adclk&0xff)) {
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196 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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197 if (clkdiff <= POLL_CYCLES) {
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199 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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200 if (s68k_poll_cnt > POLL_LIMIT) {
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202 plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);
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204 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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214 #define READ_FONT_DATA(basemask) \
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216 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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217 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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218 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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219 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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220 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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221 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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225 #ifndef _ASM_CD_MEMORY_C
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228 u32 s68k_reg_read16(u32 a)
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232 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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236 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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238 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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239 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);
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240 return s68k_poll_detect(a, d);
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242 return CDC_Read_Reg();
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244 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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246 d = Pico_mcd->m.timer_stopwatch >> 16;
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247 dprintf("s68k stopwatch timer read (%04x)", d);
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250 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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251 return Pico_mcd->s68k_regs[31];
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252 case 0x34: // fader
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253 return 0; // no busy bit
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254 case 0x50: // font data (check: Lunar 2, Silpheed)
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255 READ_FONT_DATA(0x00100000);
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258 READ_FONT_DATA(0x00010000);
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261 READ_FONT_DATA(0x10000000);
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264 READ_FONT_DATA(0x01000000);
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268 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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270 if (a >= 0x0e && a < 0x30)
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271 return s68k_poll_detect(a, d);
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276 #ifndef _ASM_CD_MEMORY_C
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279 void s68k_reg_write8(u32 a, u32 d)
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281 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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283 // TODO: review against Gens
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284 // Warning: d might have upper bits set
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287 return; // only m68k can change WP
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289 int dold = Pico_mcd->s68k_regs[3];
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290 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);
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294 if ((d ^ dold) & 5) {
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295 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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296 #ifdef _ASM_CD_MEMORY_C
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300 #ifdef _ASM_CD_MEMORY_C
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301 if ((d ^ dold) & 0x1d)
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302 PicoMemResetCDdecode(d);
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305 dprintf("wram mode 2M->1M");
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306 wram_2M_to_1M(Pico_mcd->word_ram2M);
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310 dprintf("wram mode 1M->2M");
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311 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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313 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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315 wram_1M_to_2M(Pico_mcd->word_ram2M);
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316 #ifdef _ASM_CD_MEMORY_C
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322 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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327 dprintf("s68k CDC dest: %x", d&7);
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328 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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331 //dprintf("s68k CDC reg addr: %x", d&0xf);
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337 dprintf("s68k set CDC dma addr");
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341 dprintf("s68k set stopwatch timer");
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342 Pico_mcd->m.timer_stopwatch = 0;
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345 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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348 dprintf("s68k set int3 timer: %02x", d);
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349 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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351 case 0x33: // IRQ mask
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352 dprintf("s68k irq mask: %02x", d);
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353 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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354 CDD_Export_Status();
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357 case 0x34: // fader
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358 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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361 return; // d/m bit is unsetable
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363 u32 d_old = Pico_mcd->s68k_regs[0x37];
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364 Pico_mcd->s68k_regs[0x37] = d&7;
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365 if ((d&4) && !(d_old&4)) {
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366 CDD_Export_Status();
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371 Pico_mcd->s68k_regs[a] = (u8) d;
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372 CDD_Import_Command();
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376 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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378 dprintf("s68k FIXME: invalid write @ %02x?", a);
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382 Pico_mcd->s68k_regs[a] = (u8) d;
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386 #ifndef _ASM_CD_MEMORY_C
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387 static u32 OtherRead16End(u32 a, int realsize)
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391 if ((a&0xffffc0)==0xa12000) {
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392 d=m68k_reg_read16(a);
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396 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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403 static void OtherWrite8End(u32 a, u32 d, int realsize)
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405 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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407 dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
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410 #define _CD_MEMORY_C
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411 #undef _ASM_MEMORY_C
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412 #include "../MemoryCmn.c"
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413 #include "cell_map.c"
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414 #endif // !def _ASM_CD_MEMORY_C
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417 // -----------------------------------------------------------------
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418 // Read Rom and read Ram
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420 //u8 PicoReadM68k8_(u32 a);
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421 #ifdef _ASM_CD_MEMORY_C
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422 u32 PicoReadM68k8(u32 a);
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424 static u32 PicoReadM68k8(u32 a)
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428 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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432 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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435 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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436 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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437 d = *(prg_bank+((a^1)&0x1ffff));
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442 if ((a&0xfc0000)==0x200000) {
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443 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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444 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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445 int bank = Pico_mcd->s68k_regs[3]&1;
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447 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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449 d = Pico_mcd->word_ram1M[bank][a^1];
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451 // allow access in any mode, like Gens does
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452 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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454 wrdprintf("ret = %02x", (u8)d);
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458 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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460 if ((a&0xffffc0)==0xa12000)
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461 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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463 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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465 if ((a&0xffffc0)==0xa12000)
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466 rdprintf("ret = %02x", (u8)d);
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471 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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478 #ifdef _ASM_CD_MEMORY_C
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479 u32 PicoReadM68k16(u32 a);
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481 static u32 PicoReadM68k16(u32 a)
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485 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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489 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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492 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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493 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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494 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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495 d = *(u16 *)(prg_bank+(a&0x1fffe));
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496 wrdprintf("ret = %04x", d);
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501 if ((a&0xfc0000)==0x200000) {
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502 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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503 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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504 int bank = Pico_mcd->s68k_regs[3]&1;
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506 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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508 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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510 // allow access in any mode, like Gens does
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511 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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513 wrdprintf("ret = %04x", d);
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517 if ((a&0xffffc0)==0xa12000)
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518 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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520 d = OtherRead16(a, 16);
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522 if ((a&0xffffc0)==0xa12000)
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523 rdprintf("ret = %04x", d);
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528 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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535 #ifdef _ASM_CD_MEMORY_C
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536 u32 PicoReadM68k32(u32 a);
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538 static u32 PicoReadM68k32(u32 a)
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542 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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546 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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549 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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550 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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551 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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552 d = (pm[0]<<16)|pm[1];
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557 if ((a&0xfc0000)==0x200000) {
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558 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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559 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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560 int bank = Pico_mcd->s68k_regs[3]&1;
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561 if (a >= 0x220000) { // cell arranged
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563 a1 = (a&2) | (cell_map(a >> 2) << 2);
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564 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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566 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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567 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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569 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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572 // allow access in any mode, like Gens does
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573 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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575 wrdprintf("ret = %08x", d);
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579 if ((a&0xffffc0)==0xa12000)
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580 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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582 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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584 if ((a&0xffffc0)==0xa12000)
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585 rdprintf("ret = %08x", d);
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589 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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596 // -----------------------------------------------------------------
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598 #ifdef _ASM_CD_MEMORY_C
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599 void PicoWriteM68k8(u32 a,u8 d);
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601 static void PicoWriteM68k8(u32 a,u8 d)
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604 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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606 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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607 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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610 if ((a&0xe00000)==0xe00000) { // Ram
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611 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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618 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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619 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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620 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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625 if ((a&0xfc0000)==0x200000) {
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626 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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627 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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628 int bank = Pico_mcd->s68k_regs[3]&1;
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630 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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632 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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634 // allow access in any mode, like Gens does
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635 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
640 if ((a&0xffffc0)==0xa12000) {
\r
641 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
642 m68k_reg_write8(a, d);
\r
651 #ifdef _ASM_CD_MEMORY_C
\r
652 void PicoWriteM68k16(u32 a,u16 d);
\r
654 static void PicoWriteM68k16(u32 a,u16 d)
\r
657 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
659 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
661 if ((a&0xe00000)==0xe00000) { // Ram
\r
662 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
669 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
670 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
671 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
672 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
677 if ((a&0xfc0000)==0x200000) {
\r
678 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
679 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
680 int bank = Pico_mcd->s68k_regs[3]&1;
\r
682 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
684 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
686 // allow access in any mode, like Gens does
\r
687 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
693 if ((a&0xffffc0)==0xa12000) {
\r
694 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
695 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
696 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
697 #ifdef USE_POLL_DETECT
\r
698 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
699 SekSetStopS68k(0); s68k_poll_adclk = 0;
\r
700 plprintf("s68k poll release, a=%02x\n", a);
\r
705 m68k_reg_write8(a, d>>8);
\r
706 m68k_reg_write8(a+1,d&0xff);
\r
715 #ifdef _ASM_CD_MEMORY_C
\r
716 void PicoWriteM68k32(u32 a,u32 d);
\r
718 static void PicoWriteM68k32(u32 a,u32 d)
\r
721 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
724 if ((a&0xe00000)==0xe00000)
\r
727 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
728 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
735 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
736 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
737 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
738 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
743 if ((a&0xfc0000)==0x200000) {
\r
744 if (d != 0) // don't log clears
\r
745 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
746 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
747 int bank = Pico_mcd->s68k_regs[3]&1;
\r
748 if (a >= 0x220000) { // cell arranged
\r
750 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
751 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
753 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
754 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
756 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
757 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
760 // allow access in any mode, like Gens does
\r
761 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
762 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
767 if ((a&0xffffc0)==0xa12000) {
\r
768 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
769 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);
\r
772 OtherWrite16(a, (u16)(d>>16));
\r
773 OtherWrite16(a+2,(u16)d);
\r
778 // -----------------------------------------------------------------
\r
780 // -----------------------------------------------------------------
\r
782 #ifdef _ASM_CD_MEMORY_C
\r
783 u32 PicoReadS68k8(u32 a);
\r
785 static u32 PicoReadS68k8(u32 a)
\r
793 d = *(Pico_mcd->prg_ram+(a^1));
\r
798 if ((a&0xfffe00) == 0xff8000) {
\r
800 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
801 if (a >= 0x0e && a < 0x30) {
\r
802 d = Pico_mcd->s68k_regs[a];
\r
803 s68k_poll_detect(a, d);
\r
804 rdprintf("ret = %02x", (u8)d);
\r
807 else if (a >= 0x58 && a < 0x68)
\r
808 d = gfx_cd_read(a&~1);
\r
809 else d = s68k_reg_read16(a&~1);
\r
810 if ((a&1)==0) d>>=8;
\r
811 rdprintf("ret = %02x", (u8)d);
\r
815 // word RAM (2M area)
\r
816 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
817 // test: batman returns
\r
818 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
819 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
820 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
821 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
822 if (a&1) d &= 0x0f;
\r
824 dprintf("FIXME: decode");
\r
826 // allow access in any mode, like Gens does
\r
827 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
829 wrdprintf("ret = %02x", (u8)d);
\r
833 // word RAM (1M area)
\r
834 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
836 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
837 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
838 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
839 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
840 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
841 wrdprintf("ret = %02x", (u8)d);
\r
846 if ((a&0xff8000)==0xff0000) {
\r
847 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
850 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
851 else if (a >= 0x20) {
\r
853 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
854 if (a & 2) d >>= 8;
\r
856 dprintf("ret = %02x", (u8)d);
\r
861 if ((a&0xff0000)==0xfe0000) {
\r
862 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
866 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
871 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
878 #ifdef _ASM_CD_MEMORY_C
\r
879 u32 PicoReadS68k16(u32 a);
\r
881 static u32 PicoReadS68k16(u32 a)
\r
889 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
890 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
891 wrdprintf("ret = %04x", d);
\r
896 if ((a&0xfffe00) == 0xff8000) {
\r
898 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
899 if (a >= 0x58 && a < 0x68)
\r
900 d = gfx_cd_read(a);
\r
901 else d = s68k_reg_read16(a);
\r
902 rdprintf("ret = %04x", d);
\r
906 // word RAM (2M area)
\r
907 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
908 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
909 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
910 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
911 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
912 d |= d << 4; d &= ~0xf0;
\r
913 dprintf("FIXME: decode");
\r
915 // allow access in any mode, like Gens does
\r
916 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
918 wrdprintf("ret = %04x", d);
\r
922 // word RAM (1M area)
\r
923 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
925 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
926 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
927 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
928 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
929 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
930 wrdprintf("ret = %04x", d);
\r
935 if ((a&0xff0000)==0xfe0000) {
\r
936 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
938 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
939 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
940 dprintf("ret = %04x", d);
\r
945 if ((a&0xff8000)==0xff0000) {
\r
946 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
949 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
950 else if (a >= 0x20) {
\r
952 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
953 if (a & 2) d >>= 8;
\r
955 dprintf("ret = %04x", d);
\r
959 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
964 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
971 #ifdef _ASM_CD_MEMORY_C
\r
972 u32 PicoReadS68k32(u32 a);
\r
974 static u32 PicoReadS68k32(u32 a)
\r
982 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
983 d = (pm[0]<<16)|pm[1];
\r
988 if ((a&0xfffe00) == 0xff8000) {
\r
990 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
991 if (a >= 0x58 && a < 0x68)
\r
992 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
993 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
994 rdprintf("ret = %08x", d);
\r
998 // word RAM (2M area)
\r
999 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1000 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
1001 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1002 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1004 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
1005 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
1006 d |= d << 4; d &= 0x0f0f0f0f;
\r
1008 // allow access in any mode, like Gens does
\r
1009 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
1011 wrdprintf("ret = %08x", d);
\r
1015 // word RAM (1M area)
\r
1016 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1018 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1019 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1020 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1021 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1022 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1023 wrdprintf("ret = %08x", d);
\r
1028 if ((a&0xff8000)==0xff0000) {
\r
1029 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1031 if (a >= 0x2000) {
\r
1033 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1034 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1035 } else if (a >= 0x20) {
\r
1039 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1040 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1042 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1043 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1046 dprintf("ret = %08x", d);
\r
1051 if ((a&0xff0000)==0xfe0000) {
\r
1052 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1053 a = (a>>1)&0x1fff;
\r
1054 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1055 d|= Pico_mcd->bram[a++] << 24;
\r
1056 d|= Pico_mcd->bram[a++];
\r
1057 d|= Pico_mcd->bram[a++] << 8;
\r
1058 dprintf("ret = %08x", d);
\r
1062 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1066 #ifdef __debug_io2
\r
1067 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1074 #ifndef _ASM_CD_MEMORY_C
\r
1075 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1076 static void decode_write8(u32 a, u8 d, int r3)
\r
1078 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1079 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1083 if (!(a&1)) d <<= 4;
\r
1086 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1087 } else if (r3 > 8) {
\r
1088 if (d) goto do_it;
\r
1095 *pd = d | (*pd & oldmask);
\r
1099 static void decode_write16(u32 a, u16 d, int r3)
\r
1101 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1103 //if ((a & 0x3ffff) < 0x28000) return;
\r
1111 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1112 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1114 } else if (r3 > 8) {
\r
1116 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1117 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1125 // -----------------------------------------------------------------
\r
1127 #ifdef _ASM_CD_MEMORY_C
\r
1128 void PicoWriteS68k8(u32 a,u8 d);
\r
1130 static void PicoWriteS68k8(u32 a,u8 d)
\r
1132 #ifdef __debug_io2
\r
1133 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1139 if (a < 0x80000) {
\r
1140 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1141 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;
\r
1146 if ((a&0xfffe00) == 0xff8000) {
\r
1148 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1149 if (a >= 0x58 && a < 0x68)
\r
1150 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1151 else s68k_reg_write8(a,d);
\r
1155 // word RAM (2M area)
\r
1156 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1157 int r3 = Pico_mcd->s68k_regs[3];
\r
1158 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1159 if (r3 & 4) { // 1M decode mode?
\r
1160 decode_write8(a, d, r3);
\r
1162 // allow access in any mode, like Gens does
\r
1163 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1168 // word RAM (1M area)
\r
1169 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1170 // Wing Commander tries to write here in wrong mode
\r
1173 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1174 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1175 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1176 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1177 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1182 if ((a&0xff8000)==0xff0000) {
\r
1185 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1186 else if (a < 0x12)
\r
1187 pcm_write(a>>1, d);
\r
1192 if ((a&0xff0000)==0xfe0000) {
\r
1193 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1198 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1203 #ifdef _ASM_CD_MEMORY_C
\r
1204 void PicoWriteS68k16(u32 a,u16 d);
\r
1206 static void PicoWriteS68k16(u32 a,u16 d)
\r
1208 #ifdef __debug_io2
\r
1209 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1215 if (a < 0x80000) {
\r
1216 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1217 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer
\r
1218 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1223 if ((a&0xfffe00) == 0xff8000) {
\r
1225 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1226 if (a >= 0x58 && a < 0x68)
\r
1227 gfx_cd_write16(a, d);
\r
1229 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1230 Pico_mcd->s68k_regs[0xf] = d;
\r
1233 s68k_reg_write8(a, d>>8);
\r
1234 s68k_reg_write8(a+1,d&0xff);
\r
1239 // word RAM (2M area)
\r
1240 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1241 int r3 = Pico_mcd->s68k_regs[3];
\r
1242 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1243 if (r3 & 4) { // 1M decode mode?
\r
1244 decode_write16(a, d, r3);
\r
1246 // allow access in any mode, like Gens does
\r
1247 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1252 // word RAM (1M area)
\r
1253 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1256 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1257 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1258 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1259 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1260 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1265 if ((a&0xff8000)==0xff0000) {
\r
1268 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1269 else if (a < 0x12)
\r
1270 pcm_write(a>>1, d & 0xff);
\r
1275 if ((a&0xff0000)==0xfe0000) {
\r
1276 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1277 a = (a>>1)&0x1fff;
\r
1278 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1279 Pico_mcd->bram[a++] = d >> 8;
\r
1284 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1289 #ifdef _ASM_CD_MEMORY_C
\r
1290 void PicoWriteS68k32(u32 a,u32 d);
\r
1292 static void PicoWriteS68k32(u32 a,u32 d)
\r
1294 #ifdef __debug_io2
\r
1295 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1301 if (a < 0x80000) {
\r
1302 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {
\r
1303 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1304 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1310 if ((a&0xfffe00) == 0xff8000) {
\r
1312 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1313 if (a >= 0x58 && a < 0x68) {
\r
1314 gfx_cd_write16(a, d>>16);
\r
1315 gfx_cd_write16(a+2, d&0xffff);
\r
1317 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);
\r
1318 s68k_reg_write8(a, d>>24);
\r
1319 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1320 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1321 s68k_reg_write8(a+3, d &0xff);
\r
1326 // word RAM (2M area)
\r
1327 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1328 int r3 = Pico_mcd->s68k_regs[3];
\r
1329 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1330 if (r3 & 4) { // 1M decode mode?
\r
1331 decode_write16(a , d >> 16, r3);
\r
1332 decode_write16(a+2, d , r3);
\r
1334 // allow access in any mode, like Gens does
\r
1335 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1336 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1341 // word RAM (1M area)
\r
1342 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1346 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1347 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1348 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1349 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1350 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1351 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1356 if ((a&0xff8000)==0xff0000) {
\r
1358 if (a >= 0x2000) {
\r
1360 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1361 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1362 } else if (a < 0x12) {
\r
1364 pcm_write(a, (d>>16) & 0xff);
\r
1365 pcm_write(a+1, d & 0xff);
\r
1371 if ((a&0xff0000)==0xfe0000) {
\r
1372 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1373 a = (a>>1)&0x1fff;
\r
1374 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1375 Pico_mcd->bram[a++] = d >> 24;
\r
1376 Pico_mcd->bram[a++] = d;
\r
1377 Pico_mcd->bram[a++] = d >> 8;
\r
1382 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1387 // -----------------------------------------------------------------
\r
1390 #if defined(EMU_C68K)
\r
1391 static __inline int PicoMemBaseM68k(u32 pc)
\r
1393 if ((pc&0xe00000)==0xe00000)
\r
1394 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1397 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1399 if ((pc&0xfc0000)==0x200000)
\r
1401 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1402 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1403 if (pc < 0x220000) {
\r
1404 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1405 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1409 // Error - Program Counter is invalid
\r
1410 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1412 return (int)Pico_mcd->bios;
\r
1416 static u32 PicoCheckPcM68k(u32 pc)
\r
1418 pc-=PicoCpu.membase; // Get real pc
\r
1421 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1423 return PicoCpu.membase+pc;
\r
1427 static __inline int PicoMemBaseS68k(u32 pc)
\r
1429 if (pc < 0x80000) // PRG RAM
\r
1430 return (int)Pico_mcd->prg_ram;
\r
1432 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1433 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1435 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1436 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1437 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1440 // Error - Program Counter is invalid
\r
1441 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1443 return (int)Pico_mcd->prg_ram;
\r
1447 static u32 PicoCheckPcS68k(u32 pc)
\r
1449 pc-=PicoCpuS68k.membase; // Get real pc
\r
1452 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1454 return PicoCpuS68k.membase+pc;
\r
1459 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1461 dprintf("PicoMemSetupCD()");
\r
1463 // Setup m68k memory callbacks:
\r
1464 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1465 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1466 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1467 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1468 PicoCpu.write8 =PicoWriteM68k8;
\r
1469 PicoCpu.write16=PicoWriteM68k16;
\r
1470 PicoCpu.write32=PicoWriteM68k32;
\r
1472 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1473 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1474 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1475 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1476 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1477 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1478 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1480 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1481 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1486 unsigned char PicoReadCD8w (unsigned int a) {
\r
1487 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1489 unsigned short PicoReadCD16w(unsigned int a) {
\r
1490 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1492 unsigned int PicoReadCD32w(unsigned int a) {
\r
1493 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1495 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1496 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1498 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1499 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1501 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1502 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1505 // these are allowed to access RAM
\r
1506 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1508 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1509 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1510 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1511 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1512 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1513 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1514 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1516 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1518 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1519 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1520 if((a&0xfc0000)==0x200000) { // word RAM
\r
1521 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1522 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1523 else if (a < 0x220000) {
\r
1524 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1525 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1528 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1530 return 0;//(u8) lastread_d;
\r
1532 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1534 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1535 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1536 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1537 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1538 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1539 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1540 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1542 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1544 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1545 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1546 if((a&0xfc0000)==0x200000) { // word RAM
\r
1547 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1548 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1549 else if (a < 0x220000) {
\r
1550 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1551 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1554 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1558 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1561 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1562 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1563 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1564 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1565 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1566 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1567 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1568 return (pm[0]<<16)|pm[1];
\r
1570 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1572 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1573 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1574 if((a&0xfc0000)==0x200000) { // word RAM
\r
1575 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1576 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1577 else if (a < 0x220000) {
\r
1578 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1579 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1580 return (pm[0]<<16)|pm[1];
\r
1583 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1587 #endif // EMU_M68K
\r