4 static FILE *AsmFile=NULL;
\r
6 static int CycloneVer=0x0087; // Version number of library
\r
7 int *CyJump=NULL; // Jump table
\r
8 int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format
\r
9 char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2
\r
10 char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2
\r
11 int Cycles; // Current cycles for opcode
\r
12 int pc_dirty; // something changed PC during processing
\r
13 static int arm_op_count;
\r
16 void ot(const char *format, ...)
\r
18 va_list valist=NULL;
\r
21 // notaz: stop me from leaving newlines in the middle of format string
\r
22 // and generating bad code
\r
23 for(i=0, len=strlen(format); i < len && format[i] != '\n'; i++);
\r
24 if(i < len-1 && format[len-1] != '\n') printf("\nWARNING: possible improper newline placement:\n%s\n", format);
\r
26 if (format[0] == ' ' && format[1] == ' ' && format[2] != ' ' && format[2] != '.')
\r
29 va_start(valist,format);
\r
30 if (AsmFile) vfprintf(AsmFile,format,valist);
\r
36 if (ms) ot(" LTORG\n");
\r
37 else ot(" .ltorg\n");
\r
40 #if (CYCLONE_FOR_GENESIS == 2)
\r
41 // r12=ptr to tas in table, trashes r0,r1
\r
42 static void ChangeTAS(int norm)
\r
44 ot(" ldr r0,=Op4ad0%s\n",norm?"_":"");
\r
46 ot("setrtas_loop%i0%s ;@ 4ad0-4ad7\n",norm,ms?"":":");
\r
47 ot(" subs r1,r1,#1\n");
\r
48 ot(" str r0,[r12],#4\n");
\r
49 ot(" bne setrtas_loop%i0\n",norm);
\r
50 ot(" ldr r0,=Op4ad8%s\n",norm?"_":"");
\r
52 ot("setrtas_loop%i1%s ;@ 4ad8-4ade\n",norm,ms?"":":");
\r
53 ot(" subs r1,r1,#1\n");
\r
54 ot(" str r0,[r12],#4\n");
\r
55 ot(" bne setrtas_loop%i1\n",norm);
\r
56 ot(" ldr r0,=Op4adf%s\n",norm?"_":"");
\r
57 ot(" str r0,[r12],#4\n");
\r
58 ot(" ldr r0,=Op4ae0%s\n",norm?"_":"");
\r
60 ot("setrtas_loop%i2%s ;@ 4ae0-4ae6\n",norm,ms?"":":");
\r
61 ot(" subs r1,r1,#1\n");
\r
62 ot(" str r0,[r12],#4\n");
\r
63 ot(" bne setrtas_loop%i2\n",norm);
\r
64 ot(" ldr r0,=Op4ae7%s\n",norm?"_":"");
\r
65 ot(" str r0,[r12],#4\n");
\r
66 ot(" ldr r0,=Op4ae8%s\n",norm?"_":"");
\r
68 ot("setrtas_loop%i3%s ;@ 4ae8-4aef\n",norm,ms?"":":");
\r
69 ot(" subs r1,r1,#1\n");
\r
70 ot(" str r0,[r12],#4\n");
\r
71 ot(" bne setrtas_loop%i3\n",norm);
\r
72 ot(" ldr r0,=Op4af0%s\n",norm?"_":"");
\r
74 ot("setrtas_loop%i4%s ;@ 4af0-4af7\n",norm,ms?"":":");
\r
75 ot(" subs r1,r1,#1\n");
\r
76 ot(" str r0,[r12],#4\n");
\r
77 ot(" bne setrtas_loop%i4\n",norm);
\r
78 ot(" ldr r0,=Op4af8%s\n",norm?"_":"");
\r
79 ot(" str r0,[r12],#4\n");
\r
80 ot(" ldr r0,=Op4af9%s\n",norm?"_":"");
\r
81 ot(" str r0,[r12],#4\n");
\r
85 // trashes all temp regs
\r
86 static void PrintException(int ints)
\r
89 ot(" ;@ Cause an Exception - Vector address in r0\n");
\r
90 ot(" mov r11,r0\n");
\r
93 ot(";@ swap OSP <-> A7?\n");
\r
94 ot(" ldr r0,[r7,#0x44] ;@ Get SR high\n");
\r
95 ot(" tst r0,#0x20\n");
\r
96 ot(" bne no_sp_swap%i\n",ints);
\r
97 ot(";@ swap OSP and A7:\n");
\r
98 ot(" ldr r0,[r7,#0x3C] ;@ Get A7\n");
\r
99 ot(" ldr r1,[r7,#0x48] ;@ Get OSP\n");
\r
100 ot(" str r0,[r7,#0x48]\n");
\r
101 ot(" str r1,[r7,#0x3C]\n");
\r
102 ot("no_sp_swap%i%s\n",ints,ms?"":":");
\r
104 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
105 // ot(" mov r1,r4,lsl #8\n");
\r
106 // ot(" sub r1,r1,r10,lsl #8 ;@ r1 = Old PC\n");
\r
107 // ot(" mov r1,r1,asr #8 ;@ push sign extended\n");
\r
108 ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");
\r
111 ot(" mov r0,r11\n");
\r
112 ot(";@ Read IRQ Vector:\n");
\r
115 ot(" tst r0,r0 ;@ uninitialized int vector?\n");
\r
116 ot(" moveq r0,#0x3c\n");
\r
117 ot(" moveq lr,pc\n");
\r
118 ot(" ldreq pc,[r7,#0x70] ;@ Call read32(r0) handler\n");
\r
120 #if USE_CHECKPC_CALLBACK
\r
121 ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");
\r
122 ot(" mov lr,pc\n");
\r
123 ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");
\r
124 ot(" mov r4,r0\n");
\r
129 ot(" ldr r0,[r7,#0x44] ;@ Get SR high\n");
\r
130 ot(" bic r0,r0,#0xd8 ;@ clear trace and unused flags\n");
\r
131 ot(" orr r0,r0,#0x20 ;@ set supervisor mode\n");
\r
132 ot(" strb r0,[r7,#0x44]\n");
\r
137 void CheckInterrupt(int op)
\r
139 ot(";@ CheckInterrupt:\n");
\r
140 ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");
\r
141 ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]
\r
142 ot(" beq NoInts%x\n",op);
\r
143 ot(" cmp r0,#6 ;@ irq>6 ?\n");
\r
144 ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");
\r
145 ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");
\r
146 ot(" blgt CycloneDoInterrupt\n");
\r
147 ot("NoInts%x%s\n", op,ms?"":":");
\r
153 #if MEMHANDLERS_NEED_PC
\r
155 ot(" str r4,[r7,#0x40] ;@ Save PC\n");
\r
160 static void PrintFramework()
\r
162 ot(";@ --------------------------- Framework --------------------------\n");
\r
163 if (ms) ot("CycloneRun\n");
\r
164 else ot("CycloneRun:\n");
\r
166 ot(" stmdb sp!,{r4-r11,lr}\n");
\r
168 ot(" mov r7,r0 ;@ r7 = Pointer to Cpu Context\n");
\r
169 ot(" ;@ r0-3 = Temporary registers\n");
\r
170 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");
\r
171 ot(" ldr r6,=CycloneJumpTab ;@ r6 = Opcode Jump table\n");
\r
172 ot(" ldr r5,[r7,#0x5c] ;@ r5 = Cycles\n");
\r
173 ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");
\r
174 ot(" ;@ r8 = Current Opcode\n");
\r
175 ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");
\r
176 ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");
\r
177 ot(" ;@ r10 = Source value / Memory Base\n");
\r
179 ot(";@ CheckInterrupt:\n");
\r
180 ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]
\r
181 ot(" beq NoInts0\n");
\r
182 ot(" cmp r0,#6 ;@ irq>6 ?\n");
\r
183 ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");
\r
184 ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");
\r
185 ot(" blgt CycloneDoInterrupt\n");
\r
186 ot(";@ Check if interrupt used up all the cycles:\n");
\r
187 ot(" subs r5,r5,#0\n");
\r
188 ot(" blt CycloneEndNoBack\n");
\r
189 ot("NoInts0%s\n", ms?"":":");
\r
191 ot(";@ Check if our processor is in stopped state and jump to opcode handler if not\n");
\r
192 ot(" ldr r0,[r7,#0x58]\n");
\r
193 ot(" ldrh r8,[r4],#2 ;@ Fetch first opcode\n");
\r
194 ot(" tst r0,r0 ;@ stopped?\n");
\r
195 ot(" bne CycloneStopped\n");
\r
196 ot(" ldr pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");
\r
200 ot(";@ We come back here after execution\n");
\r
201 ot("CycloneEnd%s\n", ms?"":":");
\r
202 ot(" sub r4,r4,#2\n");
\r
203 ot("CycloneEndNoBack%s\n", ms?"":":");
\r
204 #if (CYCLONE_FOR_GENESIS == 2)
\r
205 ot(" ldr r1,[r7,#0x54]\n");
\r
206 ot(" mov r9,r9,lsr #28\n");
\r
207 ot(" tst r1,r1\n");
\r
208 ot(" bxne r1 ;@ jump to alternative CycloneEnd\n");
\r
210 ot(" mov r9,r9,lsr #28\n");
\r
212 ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");
\r
213 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
\r
214 ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");
\r
215 ot(" ldmia sp!,{r4-r11,pc}\n");
\r
217 ot("CycloneStopped%s\n", ms?"":":");
\r
218 ot(" mov r5,#0\n");
\r
219 ot(" str r5,[r7,#0x5C] ;@ eat all cycles\n");
\r
220 ot(" ldmia sp!,{r4-r11,pc} ;@ we are stopped, do nothing!\n");
\r
225 #if COMPRESS_JUMPTABLE
\r
226 ot(";@ uncompress jump table\n");
\r
227 if (ms) ot("CycloneInit\n");
\r
228 else ot("CycloneInit:\n");
\r
229 ot(" ldr r12,=CycloneJumpTab\n");
\r
230 ot(" add r0,r12,#0xe000*4 ;@ ctrl code pointer\n");
\r
231 ot(" ldr r1,[r0,#-4]\n");
\r
232 ot(" tst r1,r1\n");
\r
233 ot(" movne pc,lr ;@ already uncompressed\n");
\r
234 ot(" add r3,r12,#0xa000*4 ;@ handler table pointer, r12=dest\n");
\r
235 ot("unc_loop%s\n", ms?"":":");
\r
236 ot(" ldrh r1,[r0],#2\n");
\r
237 ot(" and r2,r1,#0xf\n");
\r
238 ot(" bic r1,r1,#0xf\n");
\r
239 ot(" ldr r1,[r3,r1,lsr #2] ;@ r1=handler\n");
\r
240 ot(" cmp r2,#0xf\n");
\r
241 ot(" addeq r2,r2,#1 ;@ 0xf is really 0x10\n");
\r
242 ot(" tst r2,r2\n");
\r
243 ot(" ldreqh r2,[r0],#2 ;@ counter is in next word\n");
\r
244 ot(" tst r2,r2\n");
\r
245 ot(" beq unc_finish ;@ done decompressing\n");
\r
246 ot(" tst r1,r1\n");
\r
247 ot(" addeq r12,r12,r2,lsl #2 ;@ 0 handler means we should skip those bytes\n");
\r
248 ot(" beq unc_loop\n");
\r
249 ot("unc_loop_in%s\n", ms?"":":");
\r
250 ot(" subs r2,r2,#1\n");
\r
251 ot(" str r1,[r12],#4\n");
\r
252 ot(" bgt unc_loop_in\n");
\r
253 ot(" b unc_loop\n");
\r
254 ot("unc_finish%s\n", ms?"":":");
\r
255 ot(" ldr r12,=CycloneJumpTab\n");
\r
256 ot(" ;@ set a-line and f-line handlers\n");
\r
257 ot(" add r0,r12,#0xa000*4\n");
\r
258 ot(" ldr r1,[r0,#4] ;@ a-line handler\n");
\r
259 ot(" ldr r3,[r0,#8] ;@ f-line handler\n");
\r
260 ot(" mov r2,#0x1000\n");
\r
261 ot("unc_fill3%s\n", ms?"":":");
\r
262 ot(" subs r2,r2,#1\n");
\r
263 ot(" str r1,[r0],#4\n");
\r
264 ot(" bgt unc_fill3\n");
\r
265 ot(" add r0,r12,#0xf000*4\n");
\r
266 ot(" mov r2,#0x1000\n");
\r
267 ot("unc_fill4%s\n", ms?"":":");
\r
268 ot(" subs r2,r2,#1\n");
\r
269 ot(" str r3,[r0],#4\n");
\r
270 ot(" bgt unc_fill4\n");
\r
275 ot(";@ do nothing\n");
\r
276 if (ms) ot("CycloneInit\n");
\r
277 else ot("CycloneInit:\n");
\r
281 // 68k: XNZVC, ARM: NZCV
\r
282 if (ms) ot("CycloneSetSr\n");
\r
283 else ot("CycloneSetSr:\n");
\r
284 ot(" mov r2,r1,lsr #8\n");
\r
285 ot(" ldrb r3,[r0,#0x44] ;@ get SR high\n");
\r
286 ot(" eor r3,r3,r2\n");
\r
287 ot(" tst r3,#0x20\n");
\r
288 ot(" and r2,r2,#0xa7 ;@ only nonzero bits\n");
\r
289 ot(" strb r2,[r0,#0x44] ;@ set SR high\n");
\r
290 ot(" bne setsr_noswap\n");
\r
291 ot(" ldr r2,[r0,#0x3C] ;@ Get A7\n");
\r
292 ot(" ldr r3,[r0,#0x48] ;@ Get OSP\n");
\r
293 ot(" str r3,[r0,#0x3C]\n");
\r
294 ot(" str r2,[r0,#0x48]\n");
\r
295 ot("setsr_noswap%s\n",ms?"":":");
\r
296 ot(" mov r2,r1,lsl #25\n");
\r
297 ot(" str r2,[r0,#0x4c] ;@ the X flag\n");
\r
298 ot(" bic r2,r1,#0xf3\n");
\r
299 ot(" tst r1,#1\n");
\r
300 ot(" orrne r2,r2,#2\n");
\r
301 ot(" tst r1,#2\n");
\r
302 ot(" orrne r2,r2,#1\n");
\r
303 ot(" strb r2,[r0,#0x46] ;@ flags\n");
\r
307 if (ms) ot("CycloneGetSr\n");
\r
308 else ot("CycloneGetSr:\n");
\r
309 ot(" ldrb r1,[r0,#0x46] ;@ flags\n");
\r
310 ot(" bic r2,r1,#0xf3\n");
\r
311 ot(" tst r1,#1\n");
\r
312 ot(" orrne r2,r2,#2\n");
\r
313 ot(" tst r1,#2\n");
\r
314 ot(" orrne r2,r2,#1\n");
\r
315 ot(" ldr r1,[r0,#0x4c] ;@ the X flag\n");
\r
316 ot(" tst r1,#0x20000000\n");
\r
317 ot(" orrne r2,r2,#0x10\n");
\r
318 ot(" ldrb r1,[r0,#0x44] ;@ the SR high\n");
\r
319 ot(" orr r0,r2,r1,lsl #8\n");
\r
323 if (ms) ot("CycloneSetRealTAS\n");
\r
324 else ot("CycloneSetRealTAS:\n");
\r
325 #if (CYCLONE_FOR_GENESIS == 2)
\r
326 ot(" ldr r12,=CycloneJumpTab\n");
\r
327 ot(" tst r0,r0\n");
\r
328 ot(" add r12,r12,#0x4a00*4\n");
\r
329 ot(" add r12,r12,#0x00d0*4\n");
\r
330 ot(" beq setrtas_off\n");
\r
333 ot("setrtas_off%s\n",ms?"":":");
\r
343 ot(";@ DoInterrupt - r0=IRQ number\n");
\r
344 ot("CycloneDoInterrupt%s\n", ms?"":":");
\r
345 ot(" stmdb sp!,{lr} ;@ Push ARM return address\n");
\r
347 ot(";@ Get IRQ Vector address:\n");
\r
348 ot(" mov r0,r0,asl #2\n");
\r
349 ot(" add r11,r0,#0x60\n");
\r
352 ot(" ldrb r0,[r7,#0x47] ;@ IRQ\n");
\r
353 ot(" mov r2,#0\n");
\r
354 ot(" orr r1,r0,#0x20 ;@ Supervisor mode + IRQ number\n");
\r
355 ot(" strb r1,[r7,#0x44] ;@ Put SR high\n");
\r
357 ot(";@ Clear stopped states:\n");
\r
358 ot(" str r2,[r7,#0x58]\n");
\r
359 ot(" sub r5,r5,#%d ;@ Subtract cycles\n",44);
\r
361 #if USE_INT_ACK_CALLBACK
\r
362 #if INT_ACK_NEEDS_STUFF
\r
363 ot(" str r4,[r7,#0x40] ;@ Save PC\n");
\r
364 ot(" mov r1,r9,lsr #28\n");
\r
365 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
\r
366 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
\r
368 ot(" ldr r11,[r7,#0x8c] ;@ IrqCallback\n");
\r
369 ot(" tst r11,r11\n");
\r
370 ot(" movne lr,pc\n");
\r
371 ot(" movne pc,r11 ;@ call IrqCallback if it is defined\n");
\r
372 #if INT_ACK_CHANGES_STUFF
\r
373 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
\r
374 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
\r
375 ot(" mov r9,r9,lsl #28\n");
\r
376 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
\r
378 #else // not USE_INT_ACK_CALLBACK
\r
379 ot(";@ Clear irq:\n");
\r
380 ot(" strb r1,[r7,#0x47]\n");
\r
382 ot(" ldmia sp!,{pc} ;@ Return\n");
\r
385 ot("Exception%s\n", ms?"":":");
\r
386 ot(" stmdb sp!,{lr} ;@ Preserve ARM return address\n");
\r
388 ot(" ldmia sp!,{pc} ;@ Return\n");
\r
392 // ---------------------------------------------------------------------------
\r
393 // Call Read(r0), Write(r0,r1) or Fetch(r0)
\r
394 // Trashes r0-r3,r12,lr
\r
395 int MemHandler(int type,int size,int addrreg)
\r
398 func=0x68+type*0xc+(size<<2); // Find correct offset
\r
400 #if MEMHANDLERS_NEED_FLAGS
\r
401 ot(" mov r3,r9,lsr #28\n");
\r
402 ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");
\r
406 #if (MEMHANDLERS_ADDR_MASK & 0xff000000)
\r
407 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0xff000000);
\r
410 #if (MEMHANDLERS_ADDR_MASK & 0x00ff0000)
\r
411 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x00ff0000);
\r
414 #if (MEMHANDLERS_ADDR_MASK & 0x0000ff00)
\r
415 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x0000ff00);
\r
418 #if (MEMHANDLERS_ADDR_MASK & 0x000000ff)
\r
419 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x000000ff);
\r
424 ot(" add lr,pc,#4\n"); // helps to prevent interlocks
\r
425 ot(" mov r0,r%i\n", addrreg);
\r
428 ot(" mov lr,pc\n");
\r
429 ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);
\r
431 // Document what we are calling:
\r
432 if (type==0) ot("read");
\r
433 if (type==1) ot("write");
\r
434 if (type==2) ot("fetch");
\r
436 if (type==1) ot("%d(r0,r1)",8<<size);
\r
437 else ot("%d(r0)", 8<<size);
\r
440 #if MEMHANDLERS_CHANGE_FLAGS
\r
441 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
\r
442 ot(" mov r9,r9,lsl #28\n");
\r
444 #if MEMHANDLERS_CHANGE_PC
\r
445 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
\r
451 static void PrintOpcodes()
\r
455 printf("Creating Opcodes: [");
\r
457 ot(";@ ---------------------------- Opcodes ---------------------------\n");
\r
459 // Emit null opcode:
\r
460 ot("Op____%s ;@ Called if an opcode is not recognised\n", ms?"":":");
\r
461 ot(" sub r4,r4,#2\n");
\r
462 #if USE_UNRECOGNIZED_CALLBACK
\r
463 ot(" str r4,[r7,#0x40] ;@ Save PC\n");
\r
464 ot(" mov r1,r9,lsr #28\n");
\r
465 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
\r
466 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
\r
467 ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
\r
468 ot(" tst r11,r11\n");
\r
469 ot(" movne lr,pc\n");
\r
470 ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
\r
471 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
\r
472 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
\r
473 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
\r
474 ot(" mov r9,r9,lsl #28\n");
\r
475 ot(" tst r0,r0\n");
\r
476 ot(" moveq r0,#0x10\n");
\r
477 ot(" bleq Exception\n");
\r
479 ot(" mov r0,#0x10\n");
\r
480 ot(" bl Exception\n");
\r
486 // Unrecognised a-line and f-line opcodes throw an exception:
\r
487 ot("Op__al%s ;@ Unrecognised a-line opcode\n", ms?"":":");
\r
488 ot(" sub r4,r4,#2\n");
\r
489 #if USE_AFLINE_CALLBACK
\r
490 ot(" str r4,[r7,#0x40] ;@ Save PC\n");
\r
491 ot(" mov r1,r9,lsr #28\n");
\r
492 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
\r
493 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
\r
494 ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
\r
495 ot(" tst r11,r11\n");
\r
496 ot(" movne lr,pc\n");
\r
497 ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
\r
498 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
\r
499 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
\r
500 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
\r
501 ot(" mov r9,r9,lsl #28\n");
\r
502 ot(" tst r0,r0\n");
\r
503 ot(" moveq r0,#0x28\n");
\r
504 ot(" bleq Exception\n");
\r
506 ot(" mov r0,#0x28\n");
\r
507 ot(" bl Exception\n");
\r
513 ot("Op__fl%s ;@ Unrecognised f-line opcode\n", ms?"":":");
\r
514 ot(" sub r4,r4,#2\n");
\r
515 #if USE_AFLINE_CALLBACK
\r
516 ot(" str r4,[r7,#0x40] ;@ Save PC\n");
\r
517 ot(" mov r1,r9,lsr #28\n");
\r
518 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
\r
519 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
\r
520 ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
\r
521 ot(" tst r11,r11\n");
\r
522 ot(" movne lr,pc\n");
\r
523 ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
\r
524 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
\r
525 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
\r
526 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
\r
527 ot(" mov r9,r9,lsl #28\n");
\r
528 ot(" tst r0,r0\n");
\r
529 ot(" moveq r0,#0x2c\n");
\r
530 ot(" bleq Exception\n");
\r
532 ot(" mov r0,#0x2c\n");
\r
533 ot(" bl Exception\n");
\r
540 for (op=0;op<0x10000;op++)
\r
542 if ((op&0xfff)==0) { printf("%x",op>>12); fflush(stdout); } // Update progress
\r
553 static void ott(const char *str, int par, const char *nl, int nlp, int counter, int size)
\r
556 case 0: if((counter&7)==0) ot(ms?" dcb ":" .byte "); break;
\r
557 case 1: if((counter&7)==0) ot(ms?" dcw ":" .hword "); break;
\r
558 case 2: if((counter&7)==0) ot(ms?" dcd ":" .long "); break;
\r
561 if((counter&7)==7) ot(nl,nlp); else ot(",");
\r
564 static void PrintJumpTable()
\r
566 int i=0,op=0,len=0;
\r
568 ot(";@ -------------------------- Jump Table --------------------------\n");
\r
570 // space for decompressed table
\r
571 ot(ms?" area |.data|, data\n":" .data\n .align 4\n\n");
\r
573 #if COMPRESS_JUMPTABLE
\r
574 int handlers=0,reps=0,*indexes,ip,u,out;
\r
575 // use some weird compression on the jump table
\r
576 indexes=(int *)malloc(0x10000*4);
\r
577 if(!indexes) { printf("ERROR: out of memory\n"); exit(1); }
\r
580 ot("CycloneJumpTab%s\n", ms?"":":");
\r
582 for(i = 0; i < 0xa000/8; i++)
\r
583 ot(" dcd 0,0,0,0,0,0,0,0\n");
\r
585 ot(" .rept 0x%x\n .long 0,0,0,0,0,0,0,0\n .endr\n", 0xa000/8);
\r
587 // hanlers live in "a-line" part of the table
\r
588 // first output nop,a-line,f-line handlers
\r
589 ot(ms?" dcd Op____,Op__al,Op__fl,":" .long Op____,Op__al,Op__fl,");
\r
596 for(u=i-1; u>=0; u--) if(op == CyJump[u]) break; // already done with this op?
\r
597 if(u==-1 && op >= 0) {
\r
598 ott("Op%.4x",op," ;@ %.4x\n",i,handlers,2);
\r
599 indexes[op] = handlers;
\r
604 fseek(AsmFile, -1, SEEK_CUR); // remove last comma
\r
605 for(i = 8-(handlers&7); i > 0; i--)
\r
610 for(i = (0x4000-handlers)/8; i > 0; i--)
\r
611 ot(" dcd 0,0,0,0,0,0,0,0\n");
\r
613 ot(ms?"":" .rept 0x%x\n .long 0,0,0,0,0,0,0,0\n .endr\n", (0x4000-handlers)/8);
\r
615 printf("total distinct hanlers: %i\n",handlers);
\r
617 for(i=0,ip=0; i < 0xf000; i++, ip++) {
\r
620 // it must skip a-line area, because we keep our data there
\r
621 ott("0x%.4x", handlers<<4, "\n",0,ip++,1);
\r
622 ott("0x%.4x", 0x1000, "\n",0,ip,1);
\r
626 for(reps=1; i < 0xf000; i++, reps++) if(op != CyJump[i+1]) break;
\r
627 if(op>=0) out=indexes[op]<<4; else out=0; // unrecognised
\r
628 if(reps <= 0xe || reps==0x10) {
\r
629 if(reps!=0x10) out|=reps; else out|=0xf; // 0xf means 0x10 (0xf appeared to be unused anyway)
\r
630 ott("0x%.4x", out, "\n",0,ip,1);
\r
632 ott("0x%.4x", out, "\n",0,ip++,1);
\r
633 ott("0x%.4x", reps,"\n",0,ip,1);
\r
636 if(ip&1) ott("0x%.4x", 0, "\n",0,ip++,1);
\r
637 if(ip&7) fseek(AsmFile, -1, SEEK_CUR); // remove last comma
\r
639 for(i = 8-(ip&7); i > 0; i--)
\r
644 for(i = (0x2000-ip/2)/8+1; i > 0; i--)
\r
645 ot(" dcd 0,0,0,0,0,0,0,0\n");
\r
647 ot(" .rept 0x%x\n .long 0,0,0,0,0,0,0,0\n .endr\n", (0x2000-ip/2)/8+1);
\r
652 ot("CycloneJumpTab%s\n", ms?"":":");
\r
653 len=0xfffe; // Hmmm, armasm 2.50.8684 messes up with a 0x10000 long jump table
\r
654 // notaz: same thing with GNU as 2.9-psion-98r2 (reloc overflow)
\r
655 // this is due to COFF objects using only 2 bytes for reloc count
\r
657 for (i=0;i<len;i++)
\r
661 if(op>=0) ott("Op%.4x",op," ;@ %.4x\n",i-7,i,2);
\r
662 else if(op==-2) ott("Op__al",0, " ;@ %.4x\n",i-7,i,2);
\r
663 else if(op==-3) ott("Op__fl",0, " ;@ %.4x\n",i-7,i,2);
\r
664 else ott("Op____",0, " ;@ %.4x\n",i-7,i,2);
\r
666 if(i&7) fseek(AsmFile, -1, SEEK_CUR); // remove last comma
\r
669 ot(";@ notaz: we don't want to crash if we run into those 2 missing opcodes\n");
\r
670 ot(";@ so we leave this pattern to patch it later\n");
\r
671 ot("%s 0x78563412\n", ms?" dcd":" .long");
\r
672 ot("%s 0x56341290\n", ms?" dcd":" .long");
\r
676 static int CycloneMake()
\r
679 char *name="Cyclone.s";
\r
681 // Open the assembly file
\r
682 if (ms) name="Cyclone.asm";
\r
683 AsmFile=fopen(name,"wt"); if (AsmFile==NULL) return 1;
\r
685 printf("Making %s...\n",name);
\r
687 ot("\n;@ Dave's Cyclone 68000 Emulator v%x.%.3x - Assembler Output\n\n",CycloneVer>>12,CycloneVer&0xfff);
\r
689 ot(";@ (c) Copyright 2003 Dave, All rights reserved.\n");
\r
690 ot(";@ some code (c) Copyright 2005-2007 notaz, All rights reserved.\n");
\r
691 ot(";@ Cyclone 68000 is free for non-commercial use.\n\n");
\r
692 ot(";@ For commercial use, separate licencing terms must be obtained.\n\n");
\r
694 CyJump=(int *)malloc(0x40000); if (CyJump==NULL) return 1;
\r
695 memset(CyJump,0xff,0x40000); // Init to -1
\r
696 for(i=0xa000; i<0xb000; i++) CyJump[i] = -2; // a-line emulation
\r
697 for(i=0xf000; i<0x10000; i++) CyJump[i] = -3; // f-line emulation
\r
701 ot(" area |.text|, code\n");
\r
702 ot(" export CycloneInit\n");
\r
703 ot(" export CycloneRun\n");
\r
704 ot(" export CycloneSetSr\n");
\r
705 ot(" export CycloneGetSr\n");
\r
706 ot(" export CycloneSetRealTAS\n");
\r
707 ot(" export CycloneVer\n");
\r
709 ot("CycloneVer dcd 0x%.4x\n",CycloneVer);
\r
713 ot(" .global CycloneInit\n");
\r
714 ot(" .global CycloneRun\n");
\r
715 ot(" .global CycloneSetSr\n");
\r
716 ot(" .global CycloneGetSr\n");
\r
717 ot(" .global CycloneVer\n");
\r
718 #if (CYCLONE_FOR_GENESIS == 2)
\r
719 ot(" .global CycloneSetRealTAS\n");
\r
720 ot(" .global CycloneDoInterrupt\n");
\r
721 ot(" .global CycloneJumpTab\n");
\r
723 ot("CycloneVer: .long 0x%.4x\n",CycloneVer);
\r
730 printf("~%i ARM instructions used for opcode handlers\n", arm_op_count);
\r
733 if (ms) ot(" END\n");
\r
735 ot("\n\n;@ vim:filetype=armasm\n");
\r
737 fclose(AsmFile); AsmFile=NULL;
\r
740 printf("Assembling...\n");
\r
741 // Assemble the file
\r
742 if (ms) system("armasm Cyclone.asm");
\r
743 else system("as -o Cyclone.o Cyclone.s");
\r
744 printf("Done!\n\n");
\r
753 printf("\n Dave's Cyclone 68000 Emulator v%x.%.3x - Core Creator\n\n",CycloneVer>>12,CycloneVer&0xfff);
\r
755 // Make GAS or ARMASM version
\r