1 /* ======================================================================== */
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2 /* ========================= LICENSING & COPYRIGHT ======================== */
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3 /* ======================================================================== */
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8 * A portable Motorola M680x0 processor emulation engine.
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9 * Copyright 1998-2001 Karl Stenerud. All rights reserved.
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11 * This code may be freely used for non-commercial purposes as long as this
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12 * copyright notice remains unaltered in the source code and any binary files
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13 * containing this code in compiled form.
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15 * All other lisencing terms must be negotiated with the author
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18 * The latest version of this code can be obtained at:
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19 * http://kstenerud.cjb.net
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24 /* ======================================================================== */
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25 /* ================================ INCLUDES ============================== */
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26 /* ======================================================================== */
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37 /* ======================================================================== */
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38 /* ============================ GENERAL DEFINES =========================== */
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39 /* ======================================================================== */
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41 /* unsigned int and int must be at least 32 bits wide */
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43 #define uint unsigned int
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45 /* Bit Isolation Functions */
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46 #define BIT_0(A) ((A) & 0x00000001)
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47 #define BIT_1(A) ((A) & 0x00000002)
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48 #define BIT_2(A) ((A) & 0x00000004)
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49 #define BIT_3(A) ((A) & 0x00000008)
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50 #define BIT_4(A) ((A) & 0x00000010)
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51 #define BIT_5(A) ((A) & 0x00000020)
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52 #define BIT_6(A) ((A) & 0x00000040)
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53 #define BIT_7(A) ((A) & 0x00000080)
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54 #define BIT_8(A) ((A) & 0x00000100)
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55 #define BIT_9(A) ((A) & 0x00000200)
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56 #define BIT_A(A) ((A) & 0x00000400)
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57 #define BIT_B(A) ((A) & 0x00000800)
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58 #define BIT_C(A) ((A) & 0x00001000)
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59 #define BIT_D(A) ((A) & 0x00002000)
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60 #define BIT_E(A) ((A) & 0x00004000)
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61 #define BIT_F(A) ((A) & 0x00008000)
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62 #define BIT_10(A) ((A) & 0x00010000)
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63 #define BIT_11(A) ((A) & 0x00020000)
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64 #define BIT_12(A) ((A) & 0x00040000)
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65 #define BIT_13(A) ((A) & 0x00080000)
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66 #define BIT_14(A) ((A) & 0x00100000)
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67 #define BIT_15(A) ((A) & 0x00200000)
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68 #define BIT_16(A) ((A) & 0x00400000)
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69 #define BIT_17(A) ((A) & 0x00800000)
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70 #define BIT_18(A) ((A) & 0x01000000)
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71 #define BIT_19(A) ((A) & 0x02000000)
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72 #define BIT_1A(A) ((A) & 0x04000000)
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73 #define BIT_1B(A) ((A) & 0x08000000)
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74 #define BIT_1C(A) ((A) & 0x10000000)
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75 #define BIT_1D(A) ((A) & 0x20000000)
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76 #define BIT_1E(A) ((A) & 0x40000000)
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77 #define BIT_1F(A) ((A) & 0x80000000)
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79 /* These are the CPU types understood by this disassembler */
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80 #define TYPE_68000 1
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81 #define TYPE_68008 2
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82 #define TYPE_68010 4
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83 #define TYPE_68020 8
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84 #define TYPE_68030 16
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85 #define TYPE_68040 32
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87 #define M68000_ONLY (TYPE_68000 | TYPE_68008)
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89 #define M68010_ONLY TYPE_68010
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90 #define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010)
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91 #define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)
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93 #define M68020_ONLY TYPE_68020
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94 #define M68020_LESS (TYPE_68010 | TYPE_68020)
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95 #define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040)
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97 #define M68030_ONLY TYPE_68030
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98 #define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030)
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99 #define M68030_PLUS (TYPE_68030 | TYPE_68040)
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101 #define M68040_PLUS TYPE_68040
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104 /* Extension word formats */
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105 #define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)
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106 #define EXT_FULL(A) BIT_8(A)
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107 #define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)
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108 #define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))
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109 #define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))
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110 #define EXT_INDEX_REGISTER(A) (((A)>>12)&7)
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111 #define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)
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112 #define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
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113 #define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
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114 #define EXT_INDEX_SCALE(A) (((A)>>9)&3)
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115 #define EXT_INDEX_LONG(A) BIT_B(A)
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116 #define EXT_INDEX_AR(A) BIT_F(A)
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117 #define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)
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118 #define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)
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119 #define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)
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120 #define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
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121 #define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)
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122 #define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)
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126 #if M68K_COMPILE_FOR_MAME == OPT_ON
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127 #define SET_OPCODE_FLAGS(x) g_opcode_type = x;
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128 #define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED)
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130 #define SET_OPCODE_FLAGS(x)
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131 #define COMBINE_OPCODE_FLAGS(x) (x)
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135 /* ======================================================================== */
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136 /* =============================== PROTOTYPES ============================= */
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137 /* ======================================================================== */
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139 /* Read data at the PC and increment PC */
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140 uint read_imm_8(void);
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141 uint read_imm_16(void);
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142 uint read_imm_32(void);
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144 /* Read data at the PC but don't imcrement the PC */
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145 uint peek_imm_8(void);
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146 uint peek_imm_16(void);
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147 uint peek_imm_32(void);
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149 /* make signed integers 100% portably */
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150 static int make_int_8(int value);
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151 static int make_int_16(int value);
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153 /* make a string of a hex value */
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154 static char* make_signed_hex_str_8(uint val);
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155 static char* make_signed_hex_str_16(uint val);
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156 static char* make_signed_hex_str_32(uint val);
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158 /* make string of ea mode */
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159 static char* get_ea_mode_str(uint instruction, uint size);
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161 char* get_ea_mode_str_8(uint instruction);
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162 char* get_ea_mode_str_16(uint instruction);
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163 char* get_ea_mode_str_32(uint instruction);
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165 /* make string of immediate value */
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166 static char* get_imm_str_s(uint size);
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167 static char* get_imm_str_u(uint size);
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169 char* get_imm_str_s8(void);
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170 char* get_imm_str_s16(void);
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171 char* get_imm_str_s32(void);
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173 /* Stuff to build the opcode handler jump table */
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174 static void build_opcode_table(void);
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175 static int valid_ea(uint opcode, uint mask);
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176 static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
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178 /* used to build opcode handler jump table */
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181 void (*opcode_handler)(void); /* handler function */
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182 uint mask; /* mask on opcode */
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183 uint match; /* what to match after masking */
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184 uint ea_mask; /* what ea modes are allowed */
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189 /* ======================================================================== */
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190 /* ================================= DATA ================================= */
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191 /* ======================================================================== */
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193 /* Opcode handler jump table */
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194 static void (*g_instruction_table[0x10000])(void);
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195 /* Flag if disassembler initialized */
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196 static int g_initialized = 0;
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198 /* Address mask to simulate address lines */
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199 static unsigned int g_address_mask = 0xffffffff;
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201 static char g_dasm_str[100]; /* string to hold disassembly */
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202 static char g_helper_str[100]; /* string to hold helpful info */
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203 static uint g_cpu_pc; /* program counter */
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204 static uint g_cpu_ir; /* instruction register */
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205 static uint g_cpu_type;
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206 static uint g_opcode_type;
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207 static unsigned char* g_rawop;
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208 static uint g_rawbasepc;
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209 static uint g_rawlength;
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211 /* used by ops like asr, ror, addq, etc */
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212 static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
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214 static uint g_5bit_data_table[32] =
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216 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
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217 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
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220 static const char* g_cc[16] =
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221 {"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};
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223 static const char* g_cpcc[64] =
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224 {/* 000 001 010 011 100 101 110 111 */
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225 "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
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226 "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
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227 "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
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228 "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
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229 "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
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230 "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
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231 "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
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232 "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
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236 /* ======================================================================== */
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237 /* =========================== UTILITY FUNCTIONS ========================== */
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238 /* ======================================================================== */
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240 #define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
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241 if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
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243 if((g_cpu_ir & 0xf000) == 0xf000) \
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245 else d68000_illegal(); \
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249 static uint dasm_read_imm_8(uint advance)
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253 result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];
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255 result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
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256 g_cpu_pc += advance;
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260 static uint dasm_read_imm_16(uint advance)
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264 result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |
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265 g_rawop[g_cpu_pc + 1 - g_rawbasepc];
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267 result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // & 0xff; ??
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268 g_cpu_pc += advance;
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272 static uint dasm_read_imm_32(uint advance)
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276 result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |
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277 (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |
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278 (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
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279 g_rawop[g_cpu_pc + 3 - g_rawbasepc];
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281 result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask); // & 0xff; ??
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282 g_cpu_pc += advance;
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286 #define read_imm_8() dasm_read_imm_8(2)
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287 #define read_imm_16() dasm_read_imm_16(2)
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288 #define read_imm_32() dasm_read_imm_32(4)
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290 #define peek_imm_8() dasm_read_imm_8(0)
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291 #define peek_imm_16() dasm_read_imm_16(0)
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292 #define peek_imm_32() dasm_read_imm_32(0)
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294 /* Fake a split interface */
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295 #define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
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296 #define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
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297 #define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
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299 #define get_imm_str_s8() get_imm_str_s(0)
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300 #define get_imm_str_s16() get_imm_str_s(1)
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301 #define get_imm_str_s32() get_imm_str_s(2)
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303 #define get_imm_str_u8() get_imm_str_u(0)
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304 #define get_imm_str_u16() get_imm_str_u(1)
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305 #define get_imm_str_u32() get_imm_str_u(2)
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308 /* 100% portable signed int generators */
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309 static int make_int_8(int value)
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311 return (value & 0x80) ? value | ~0xff : value & 0xff;
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314 static int make_int_16(int value)
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316 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
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320 /* Get string representation of hex values */
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321 static char* make_signed_hex_str_8(uint val)
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323 static char str[20];
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328 sprintf(str, "-$80");
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329 else if(val & 0x80)
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330 sprintf(str, "-$%x", (0-val) & 0x7f);
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332 sprintf(str, "$%x", val & 0x7f);
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337 static char* make_signed_hex_str_16(uint val)
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339 static char str[20];
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344 sprintf(str, "-$8000");
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345 else if(val & 0x8000)
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346 sprintf(str, "-$%x", (0-val) & 0x7fff);
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348 sprintf(str, "$%x", val & 0x7fff);
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353 static char* make_signed_hex_str_32(uint val)
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355 static char str[20];
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359 if(val == 0x80000000)
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360 sprintf(str, "-$80000000");
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361 else if(val & 0x80000000)
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362 sprintf(str, "-$%x", (0-val) & 0x7fffffff);
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364 sprintf(str, "$%x", val & 0x7fffffff);
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370 /* make string of immediate value */
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371 static char* get_imm_str_s(uint size)
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373 static char str[15];
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375 sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
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377 sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));
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379 sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));
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383 static char* get_imm_str_u(uint size)
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385 static char str[15];
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387 sprintf(str, "#$%x", read_imm_8() & 0xff);
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389 sprintf(str, "#$%x", read_imm_16() & 0xffff);
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391 sprintf(str, "#$%x", read_imm_32() & 0xffffffff);
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395 /* Make string of effective address mode */
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396 static char* get_ea_mode_str(uint instruction, uint size)
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398 static char b1[64];
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399 static char b2[64];
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400 static char* mode = b2;
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410 char invalid_mode = 0;
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412 /* Switch buffers so we don't clobber on a double-call to this function */
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413 mode = mode == b1 ? b2 : b1;
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415 switch(instruction & 0x3f)
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417 case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
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418 /* data register direct */
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419 sprintf(mode, "D%d", instruction&7);
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421 case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
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422 /* address register direct */
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423 sprintf(mode, "A%d", instruction&7);
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425 case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
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426 /* address register indirect */
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427 sprintf(mode, "(A%d)", instruction&7);
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429 case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
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430 /* address register indirect with postincrement */
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431 sprintf(mode, "(A%d)+", instruction&7);
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433 case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
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434 /* address register indirect with predecrement */
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435 sprintf(mode, "-(A%d)", instruction&7);
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437 case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
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438 /* address register indirect with displacement*/
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439 sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
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441 case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
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442 /* address register indirect with index */
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443 extension = read_imm_16();
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445 if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))
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451 if(EXT_FULL(extension))
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453 if(g_cpu_type & M68010_LESS)
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459 if(EXT_EFFECTIVE_ZERO(extension))
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465 base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
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466 outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
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467 if(EXT_BASE_REGISTER_PRESENT(extension))
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468 sprintf(base_reg, "A%d", instruction&7);
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471 if(EXT_INDEX_REGISTER_PRESENT(extension))
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473 sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
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474 if(EXT_INDEX_SCALE(extension))
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475 sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
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479 preindex = (extension&7) > 0 && (extension&7) < 4;
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480 postindex = (extension&7) > 4;
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483 if(preindex || postindex)
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487 strcat(mode, make_signed_hex_str_16(base));
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494 strcat(mode, base_reg);
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506 strcat(mode, index_reg);
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518 strcat(mode, make_signed_hex_str_16(outer));
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524 if(EXT_8BIT_DISPLACEMENT(extension) == 0)
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525 sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
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527 sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
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528 if(EXT_INDEX_SCALE(extension))
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529 sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
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533 /* absolute short address */
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534 sprintf(mode, "$%x.w", read_imm_16());
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537 /* absolute long address */
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538 sprintf(mode, "$%x.l", read_imm_32());
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541 /* program counter with displacement */
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542 temp_value = read_imm_16();
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543 sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));
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544 sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);
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547 /* program counter with index */
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548 extension = read_imm_16();
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550 if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))
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556 if(EXT_FULL(extension))
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558 if(g_cpu_type & M68010_LESS)
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564 if(EXT_EFFECTIVE_ZERO(extension))
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569 base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
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570 outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
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571 if(EXT_BASE_REGISTER_PRESENT(extension))
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572 strcpy(base_reg, "PC");
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575 if(EXT_INDEX_REGISTER_PRESENT(extension))
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577 sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
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578 if(EXT_INDEX_SCALE(extension))
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579 sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
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583 preindex = (extension&7) > 0 && (extension&7) < 4;
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584 postindex = (extension&7) > 4;
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587 if(preindex || postindex)
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591 strcat(mode, make_signed_hex_str_16(base));
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598 strcat(mode, base_reg);
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610 strcat(mode, index_reg);
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622 strcat(mode, make_signed_hex_str_16(outer));
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628 if(EXT_8BIT_DISPLACEMENT(extension) == 0)
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629 sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
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631 sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
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632 if(EXT_INDEX_SCALE(extension))
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633 sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
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638 sprintf(mode, "%s", get_imm_str_u(size));
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645 sprintf(mode, "INVALID %x", instruction & 0x3f);
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652 /* ======================================================================== */
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653 /* ========================= INSTRUCTION HANDLERS ========================= */
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654 /* ======================================================================== */
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655 /* Instruction handler function names follow this convention:
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657 * d68000_NAME_EXTENSIONS(void)
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658 * where NAME is the name of the opcode it handles and EXTENSIONS are any
\r
659 * extensions for special instances of that opcode.
\r
662 * d68000_add_er_8(): add opcode, from effective address to register,
\r
665 * d68000_asr_s_8(): arithmetic shift right, static count, size = byte
\r
668 * Common extensions:
\r
672 * rr : register to register
\r
673 * mm : memory to memory
\r
676 * er : effective address -> register
\r
677 * re : register -> effective address
\r
678 * ea : using effective address mode of operation
\r
679 * d : data register direct
\r
680 * a : address register direct
\r
681 * ai : address register indirect
\r
682 * pi : address register indirect with postincrement
\r
683 * pd : address register indirect with predecrement
\r
684 * di : address register indirect with displacement
\r
685 * ix : address register indirect with index
\r
686 * aw : absolute word
\r
687 * al : absolute long
\r
690 static void d68000_illegal(void)
\r
692 sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);
\r
695 static void d68000_1010(void)
\r
697 sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);
\r
701 static void d68000_1111(void)
\r
703 sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);
\r
707 static void d68000_abcd_rr(void)
\r
709 sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
713 static void d68000_abcd_mm(void)
\r
715 sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
718 static void d68000_add_er_8(void)
\r
720 sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
724 static void d68000_add_er_16(void)
\r
726 sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
729 static void d68000_add_er_32(void)
\r
731 sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
734 static void d68000_add_re_8(void)
\r
736 sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
739 static void d68000_add_re_16(void)
\r
741 sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
\r
744 static void d68000_add_re_32(void)
\r
746 sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
\r
749 static void d68000_adda_16(void)
\r
751 sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
754 static void d68000_adda_32(void)
\r
756 sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
759 static void d68000_addi_8(void)
\r
761 char* str = get_imm_str_s8();
\r
762 sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
765 static void d68000_addi_16(void)
\r
767 char* str = get_imm_str_s16();
\r
768 sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
\r
771 static void d68000_addi_32(void)
\r
773 char* str = get_imm_str_s32();
\r
774 sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
\r
777 static void d68000_addq_8(void)
\r
779 sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
\r
782 static void d68000_addq_16(void)
\r
784 sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
\r
787 static void d68000_addq_32(void)
\r
789 sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
\r
792 static void d68000_addx_rr_8(void)
\r
794 sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
797 static void d68000_addx_rr_16(void)
\r
799 sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
802 static void d68000_addx_rr_32(void)
\r
804 sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
807 static void d68000_addx_mm_8(void)
\r
809 sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
812 static void d68000_addx_mm_16(void)
\r
814 sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
817 static void d68000_addx_mm_32(void)
\r
819 sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
822 static void d68000_and_er_8(void)
\r
824 sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
827 static void d68000_and_er_16(void)
\r
829 sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
832 static void d68000_and_er_32(void)
\r
834 sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
837 static void d68000_and_re_8(void)
\r
839 sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
842 static void d68000_and_re_16(void)
\r
844 sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
\r
847 static void d68000_and_re_32(void)
\r
849 sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
\r
852 static void d68000_andi_8(void)
\r
854 char* str = get_imm_str_u8();
\r
855 sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
858 static void d68000_andi_16(void)
\r
860 char* str = get_imm_str_u16();
\r
861 sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
\r
864 static void d68000_andi_32(void)
\r
866 char* str = get_imm_str_u32();
\r
867 sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
\r
870 static void d68000_andi_to_ccr(void)
\r
872 sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());
\r
875 static void d68000_andi_to_sr(void)
\r
877 sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());
\r
880 static void d68000_asr_s_8(void)
\r
882 sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
885 static void d68000_asr_s_16(void)
\r
887 sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
890 static void d68000_asr_s_32(void)
\r
892 sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
895 static void d68000_asr_r_8(void)
\r
897 sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
900 static void d68000_asr_r_16(void)
\r
902 sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
905 static void d68000_asr_r_32(void)
\r
907 sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
910 static void d68000_asr_ea(void)
\r
912 sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
915 static void d68000_asl_s_8(void)
\r
917 sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
920 static void d68000_asl_s_16(void)
\r
922 sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
925 static void d68000_asl_s_32(void)
\r
927 sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
930 static void d68000_asl_r_8(void)
\r
932 sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
935 static void d68000_asl_r_16(void)
\r
937 sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
940 static void d68000_asl_r_32(void)
\r
942 sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
945 static void d68000_asl_ea(void)
\r
947 sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
950 static void d68000_bcc_8(void)
\r
952 uint temp_pc = g_cpu_pc;
\r
953 sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
\r
956 static void d68000_bcc_16(void)
\r
958 uint temp_pc = g_cpu_pc;
\r
959 sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
\r
962 static void d68020_bcc_32(void)
\r
964 uint temp_pc = g_cpu_pc;
\r
965 LIMIT_CPU_TYPES(M68020_PLUS);
\r
966 sprintf(g_dasm_str, "b%-2s $%x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
\r
969 static void d68000_bchg_r(void)
\r
971 sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
974 static void d68000_bchg_s(void)
\r
976 char* str = get_imm_str_u8();
\r
977 sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
980 static void d68000_bclr_r(void)
\r
982 sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
985 static void d68000_bclr_s(void)
\r
987 char* str = get_imm_str_u8();
\r
988 sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
991 static void d68010_bkpt(void)
\r
993 LIMIT_CPU_TYPES(M68010_PLUS);
\r
994 sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);
\r
997 static void d68020_bfchg(void)
\r
1003 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1005 extension = read_imm_16();
\r
1007 if(BIT_B(extension))
\r
1008 sprintf(offset, "D%d", (extension>>6)&7);
\r
1010 sprintf(offset, "%d", (extension>>6)&31);
\r
1011 if(BIT_5(extension))
\r
1012 sprintf(width, "D%d", extension&7);
\r
1014 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1015 sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1018 static void d68020_bfclr(void)
\r
1024 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1026 extension = read_imm_16();
\r
1028 if(BIT_B(extension))
\r
1029 sprintf(offset, "D%d", (extension>>6)&7);
\r
1031 sprintf(offset, "%d", (extension>>6)&31);
\r
1032 if(BIT_5(extension))
\r
1033 sprintf(width, "D%d", extension&7);
\r
1035 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1036 sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1039 static void d68020_bfexts(void)
\r
1045 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1047 extension = read_imm_16();
\r
1049 if(BIT_B(extension))
\r
1050 sprintf(offset, "D%d", (extension>>6)&7);
\r
1052 sprintf(offset, "%d", (extension>>6)&31);
\r
1053 if(BIT_5(extension))
\r
1054 sprintf(width, "D%d", extension&7);
\r
1056 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1057 sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1060 static void d68020_bfextu(void)
\r
1066 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1068 extension = read_imm_16();
\r
1070 if(BIT_B(extension))
\r
1071 sprintf(offset, "D%d", (extension>>6)&7);
\r
1073 sprintf(offset, "%d", (extension>>6)&31);
\r
1074 if(BIT_5(extension))
\r
1075 sprintf(width, "D%d", extension&7);
\r
1077 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1078 sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1081 static void d68020_bfffo(void)
\r
1087 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1089 extension = read_imm_16();
\r
1091 if(BIT_B(extension))
\r
1092 sprintf(offset, "D%d", (extension>>6)&7);
\r
1094 sprintf(offset, "%d", (extension>>6)&31);
\r
1095 if(BIT_5(extension))
\r
1096 sprintf(width, "D%d", extension&7);
\r
1098 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1099 sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1102 static void d68020_bfins(void)
\r
1108 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1110 extension = read_imm_16();
\r
1112 if(BIT_B(extension))
\r
1113 sprintf(offset, "D%d", (extension>>6)&7);
\r
1115 sprintf(offset, "%d", (extension>>6)&31);
\r
1116 if(BIT_5(extension))
\r
1117 sprintf(width, "D%d", extension&7);
\r
1119 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1120 sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1123 static void d68020_bfset(void)
\r
1129 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1131 extension = read_imm_16();
\r
1133 if(BIT_B(extension))
\r
1134 sprintf(offset, "D%d", (extension>>6)&7);
\r
1136 sprintf(offset, "%d", (extension>>6)&31);
\r
1137 if(BIT_5(extension))
\r
1138 sprintf(width, "D%d", extension&7);
\r
1140 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1141 sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1144 static void d68020_bftst(void)
\r
1150 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1152 extension = read_imm_16();
\r
1154 if(BIT_B(extension))
\r
1155 sprintf(offset, "D%d", (extension>>6)&7);
\r
1157 sprintf(offset, "%d", (extension>>6)&31);
\r
1158 if(BIT_5(extension))
\r
1159 sprintf(width, "D%d", extension&7);
\r
1161 sprintf(width, "%d", g_5bit_data_table[extension&31]);
\r
1162 sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
\r
1165 static void d68000_bra_8(void)
\r
1167 uint temp_pc = g_cpu_pc;
\r
1168 sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_8(g_cpu_ir));
\r
1171 static void d68000_bra_16(void)
\r
1173 uint temp_pc = g_cpu_pc;
\r
1174 sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_16(read_imm_16()));
\r
1177 static void d68020_bra_32(void)
\r
1179 uint temp_pc = g_cpu_pc;
\r
1180 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1181 sprintf(g_dasm_str, "bra $%x; (2+)", temp_pc + read_imm_32());
\r
1184 static void d68000_bset_r(void)
\r
1186 sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
1189 static void d68000_bset_s(void)
\r
1191 char* str = get_imm_str_u8();
\r
1192 sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
1195 static void d68000_bsr_8(void)
\r
1197 uint temp_pc = g_cpu_pc;
\r
1198 sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_8(g_cpu_ir));
\r
1199 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1202 static void d68000_bsr_16(void)
\r
1204 uint temp_pc = g_cpu_pc;
\r
1205 sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_16(read_imm_16()));
\r
1206 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1209 static void d68020_bsr_32(void)
\r
1211 uint temp_pc = g_cpu_pc;
\r
1212 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1213 sprintf(g_dasm_str, "bsr $%x; (2+)", temp_pc + read_imm_32());
\r
1214 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1217 static void d68000_btst_r(void)
\r
1219 sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
1222 static void d68000_btst_s(void)
\r
1224 char* str = get_imm_str_u8();
\r
1225 sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
1228 static void d68020_callm(void)
\r
1231 LIMIT_CPU_TYPES(M68020_ONLY);
\r
1232 str = get_imm_str_u8();
\r
1234 sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));
\r
1237 static void d68020_cas_8(void)
\r
1240 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1241 extension = read_imm_16();
\r
1242 sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));
\r
1245 static void d68020_cas_16(void)
\r
1248 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1249 extension = read_imm_16();
\r
1250 sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));
\r
1253 static void d68020_cas_32(void)
\r
1256 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1257 extension = read_imm_16();
\r
1258 sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));
\r
1261 static void d68020_cas2_16(void)
\r
1263 /* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)
\r
1264 f e d c b a 9 8 7 6 5 4 3 2 1 0
\r
1265 DARn1 0 0 0 Du1 0 0 0 Dc1
\r
1266 DARn2 0 0 0 Du2 0 0 0 Dc2
\r
1270 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1271 extension = read_imm_32();
\r
1272 sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
\r
1273 (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
\r
1274 BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
\r
1275 BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
1278 static void d68020_cas2_32(void)
\r
1281 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1282 extension = read_imm_32();
\r
1283 sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
\r
1284 (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
\r
1285 BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
\r
1286 BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
1289 static void d68000_chk_16(void)
\r
1291 sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1292 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1295 static void d68020_chk_32(void)
\r
1297 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1298 sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1299 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1302 static void d68020_chk2_cmp2_8(void)
\r
1305 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1306 extension = read_imm_16();
\r
1307 sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
1310 static void d68020_chk2_cmp2_16(void)
\r
1313 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1314 extension = read_imm_16();
\r
1315 sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
1318 static void d68020_chk2_cmp2_32(void)
\r
1321 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1322 extension = read_imm_16();
\r
1323 sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
1326 static void d68040_cinv(void)
\r
1328 LIMIT_CPU_TYPES(M68040_PLUS);
\r
1329 switch((g_cpu_ir>>3)&3)
\r
1332 sprintf(g_dasm_str, "cinv (illegal scope); (4)");
\r
1335 sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
\r
1338 sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
\r
1341 sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3);
\r
1346 static void d68000_clr_8(void)
\r
1348 sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir));
\r
1351 static void d68000_clr_16(void)
\r
1353 sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
1356 static void d68000_clr_32(void)
\r
1358 sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir));
\r
1361 static void d68000_cmp_8(void)
\r
1363 sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1366 static void d68000_cmp_16(void)
\r
1368 sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1371 static void d68000_cmp_32(void)
\r
1373 sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1376 static void d68000_cmpa_16(void)
\r
1378 sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1381 static void d68000_cmpa_32(void)
\r
1383 sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1386 static void d68000_cmpi_8(void)
\r
1388 char* str = get_imm_str_s8();
\r
1389 sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
1392 static void d68020_cmpi_pcdi_8(void)
\r
1395 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1396 str = get_imm_str_s8();
\r
1397 sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
\r
1400 static void d68020_cmpi_pcix_8(void)
\r
1403 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1404 str = get_imm_str_s8();
\r
1405 sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
\r
1408 static void d68000_cmpi_16(void)
\r
1411 str = get_imm_str_s16();
\r
1412 sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
\r
1415 static void d68020_cmpi_pcdi_16(void)
\r
1418 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1419 str = get_imm_str_s16();
\r
1420 sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
\r
1423 static void d68020_cmpi_pcix_16(void)
\r
1426 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1427 str = get_imm_str_s16();
\r
1428 sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
\r
1431 static void d68000_cmpi_32(void)
\r
1434 str = get_imm_str_s32();
\r
1435 sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
\r
1438 static void d68020_cmpi_pcdi_32(void)
\r
1441 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1442 str = get_imm_str_s32();
\r
1443 sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
\r
1446 static void d68020_cmpi_pcix_32(void)
\r
1449 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1450 str = get_imm_str_s32();
\r
1451 sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
\r
1454 static void d68000_cmpm_8(void)
\r
1456 sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
1459 static void d68000_cmpm_16(void)
\r
1461 sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
1464 static void d68000_cmpm_32(void)
\r
1466 sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
1469 static void d68020_cpbcc_16(void)
\r
1472 uint new_pc = g_cpu_pc;
\r
1473 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1474 extension = read_imm_16();
\r
1475 new_pc += make_int_16(read_imm_16());
\r
1476 sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
\r
1479 static void d68020_cpbcc_32(void)
\r
1482 uint new_pc = g_cpu_pc;
\r
1483 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1484 extension = read_imm_16();
\r
1485 new_pc += read_imm_32();
\r
1486 sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
\r
1489 static void d68020_cpdbcc(void)
\r
1493 uint new_pc = g_cpu_pc;
\r
1494 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1495 extension1 = read_imm_16();
\r
1496 extension2 = read_imm_16();
\r
1497 new_pc += make_int_16(read_imm_16());
\r
1498 sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);
\r
1501 static void d68020_cpgen(void)
\r
1503 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1504 sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());
\r
1507 static void d68020_cprestore(void)
\r
1509 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1510 sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
1513 static void d68020_cpsave(void)
\r
1515 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1516 sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
1519 static void d68020_cpscc(void)
\r
1523 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1524 extension1 = read_imm_16();
\r
1525 extension2 = read_imm_16();
\r
1526 sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);
\r
1529 static void d68020_cptrapcc_0(void)
\r
1533 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1534 extension1 = read_imm_16();
\r
1535 extension2 = read_imm_16();
\r
1536 sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);
\r
1539 static void d68020_cptrapcc_16(void)
\r
1543 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1544 extension1 = read_imm_16();
\r
1545 extension2 = read_imm_16();
\r
1546 sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);
\r
1549 static void d68020_cptrapcc_32(void)
\r
1553 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1554 extension1 = read_imm_16();
\r
1555 extension2 = read_imm_16();
\r
1556 sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);
\r
1559 static void d68040_cpush(void)
\r
1561 LIMIT_CPU_TYPES(M68040_PLUS);
\r
1562 switch((g_cpu_ir>>3)&3)
\r
1565 sprintf(g_dasm_str, "cpush (illegal scope); (4)");
\r
1568 sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
\r
1571 sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
\r
1574 sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3);
\r
1579 static void d68000_dbra(void)
\r
1581 uint temp_pc = g_cpu_pc;
\r
1582 sprintf(g_dasm_str, "dbra D%d, $%x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
\r
1583 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1586 static void d68000_dbcc(void)
\r
1588 uint temp_pc = g_cpu_pc;
\r
1589 sprintf(g_dasm_str, "db%-2s D%d, $%x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
\r
1590 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1593 static void d68000_divs(void)
\r
1595 sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1598 static void d68000_divu(void)
\r
1600 sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1603 static void d68020_divl(void)
\r
1606 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1607 extension = read_imm_16();
\r
1609 if(BIT_A(extension))
\r
1610 sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
\r
1611 else if((extension&7) == ((extension>>12)&7))
\r
1612 sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
\r
1614 sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
\r
1617 static void d68000_eor_8(void)
\r
1619 sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
1622 static void d68000_eor_16(void)
\r
1624 sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
\r
1627 static void d68000_eor_32(void)
\r
1629 sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
\r
1632 static void d68000_eori_8(void)
\r
1634 char* str = get_imm_str_u8();
\r
1635 sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
1638 static void d68000_eori_16(void)
\r
1640 char* str = get_imm_str_u16();
\r
1641 sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
\r
1644 static void d68000_eori_32(void)
\r
1646 char* str = get_imm_str_u32();
\r
1647 sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
\r
1650 static void d68000_eori_to_ccr(void)
\r
1652 sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8());
\r
1655 static void d68000_eori_to_sr(void)
\r
1657 sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16());
\r
1660 static void d68000_exg_dd(void)
\r
1662 sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1665 static void d68000_exg_aa(void)
\r
1667 sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1670 static void d68000_exg_da(void)
\r
1672 sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1675 static void d68000_ext_16(void)
\r
1677 sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7);
\r
1680 static void d68000_ext_32(void)
\r
1682 sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7);
\r
1685 static void d68020_extb_32(void)
\r
1687 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1688 sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);
\r
1691 static void d68000_jmp(void)
\r
1693 sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));
\r
1696 static void d68000_jsr(void)
\r
1698 sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir));
\r
1699 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
1702 static void d68000_lea(void)
\r
1704 sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1707 static void d68000_link_16(void)
\r
1709 sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16());
\r
1712 static void d68020_link_32(void)
\r
1714 LIMIT_CPU_TYPES(M68020_PLUS);
\r
1715 sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());
\r
1718 static void d68000_lsr_s_8(void)
\r
1720 sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
1723 static void d68000_lsr_s_16(void)
\r
1725 sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
1728 static void d68000_lsr_s_32(void)
\r
1730 sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
1733 static void d68000_lsr_r_8(void)
\r
1735 sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1738 static void d68000_lsr_r_16(void)
\r
1740 sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1743 static void d68000_lsr_r_32(void)
\r
1745 sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1748 static void d68000_lsr_ea(void)
\r
1750 sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir));
\r
1753 static void d68000_lsl_s_8(void)
\r
1755 sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
1758 static void d68000_lsl_s_16(void)
\r
1760 sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
1763 static void d68000_lsl_s_32(void)
\r
1765 sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
1768 static void d68000_lsl_r_8(void)
\r
1770 sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1773 static void d68000_lsl_r_16(void)
\r
1775 sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1778 static void d68000_lsl_r_32(void)
\r
1780 sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
1783 static void d68000_lsl_ea(void)
\r
1785 sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir));
\r
1788 static void d68000_move_8(void)
\r
1790 char* str = get_ea_mode_str_8(g_cpu_ir);
\r
1791 sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
\r
1794 static void d68000_move_16(void)
\r
1796 char* str = get_ea_mode_str_16(g_cpu_ir);
\r
1797 sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
\r
1800 static void d68000_move_32(void)
\r
1802 char* str = get_ea_mode_str_32(g_cpu_ir);
\r
1803 sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));
\r
1806 static void d68000_movea_16(void)
\r
1808 sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1811 static void d68000_movea_32(void)
\r
1813 sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
1816 static void d68000_move_to_ccr(void)
\r
1818 sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir));
\r
1821 static void d68010_move_fr_ccr(void)
\r
1823 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1824 sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));
\r
1827 static void d68000_move_fr_sr(void)
\r
1829 sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir));
\r
1832 static void d68000_move_to_sr(void)
\r
1834 sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir));
\r
1837 static void d68000_move_fr_usp(void)
\r
1839 sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7);
\r
1842 static void d68000_move_to_usp(void)
\r
1844 sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7);
\r
1847 static void d68010_movec(void)
\r
1850 const char* reg_name;
\r
1851 const char* processor;
\r
1852 LIMIT_CPU_TYPES(M68010_PLUS);
\r
1853 extension = read_imm_16();
\r
1855 switch(extension & 0xfff)
\r
1874 reg_name = "CACR";
\r
1878 reg_name = "CAAR";
\r
1879 processor = "2,3";
\r
1894 reg_name = "ITT0";
\r
1898 reg_name = "ITT1";
\r
1902 reg_name = "DTT0";
\r
1906 reg_name = "DTT1";
\r
1910 reg_name = "MMUSR";
\r
1922 reg_name = make_signed_hex_str_16(extension & 0xfff);
\r
1926 if(BIT_1(g_cpu_ir))
\r
1927 sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);
\r
1929 sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);
\r
1932 static void d68000_movem_pd_16(void)
\r
1934 uint data = read_imm_16();
\r
1943 if(data&(1<<(15-i)))
\r
1947 while(i<7 && (data&(1<<(15-(i+1)))))
\r
1952 if(buffer[0] != 0)
\r
1953 strcat(buffer, "/");
\r
1954 sprintf(buffer+strlen(buffer), "D%d", first);
\r
1955 if(run_length > 0)
\r
1956 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
\r
1961 if(data&(1<<(7-i)))
\r
1965 while(i<7 && (data&(1<<(7-(i+1)))))
\r
1970 if(buffer[0] != 0)
\r
1971 strcat(buffer, "/");
\r
1972 sprintf(buffer+strlen(buffer), "A%d", first);
\r
1973 if(run_length > 0)
\r
1974 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
\r
1977 sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
\r
1980 static void d68000_movem_pd_32(void)
\r
1982 uint data = read_imm_16();
\r
1991 if(data&(1<<(15-i)))
\r
1995 while(i<7 && (data&(1<<(15-(i+1)))))
\r
2000 if(buffer[0] != 0)
\r
2001 strcat(buffer, "/");
\r
2002 sprintf(buffer+strlen(buffer), "D%d", first);
\r
2003 if(run_length > 0)
\r
2004 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
\r
2009 if(data&(1<<(7-i)))
\r
2013 while(i<7 && (data&(1<<(7-(i+1)))))
\r
2018 if(buffer[0] != 0)
\r
2019 strcat(buffer, "/");
\r
2020 sprintf(buffer+strlen(buffer), "A%d", first);
\r
2021 if(run_length > 0)
\r
2022 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
\r
2025 sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
\r
2028 static void d68000_movem_er_16(void)
\r
2030 uint data = read_imm_16();
\r
2043 while(i<7 && (data&(1<<(i+1))))
\r
2048 if(buffer[0] != 0)
\r
2049 strcat(buffer, "/");
\r
2050 sprintf(buffer+strlen(buffer), "D%d", first);
\r
2051 if(run_length > 0)
\r
2052 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
\r
2057 if(data&(1<<(i+8)))
\r
2061 while(i<7 && (data&(1<<(i+8+1))))
\r
2066 if(buffer[0] != 0)
\r
2067 strcat(buffer, "/");
\r
2068 sprintf(buffer+strlen(buffer), "A%d", first);
\r
2069 if(run_length > 0)
\r
2070 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
\r
2073 sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);
\r
2076 static void d68000_movem_er_32(void)
\r
2078 uint data = read_imm_16();
\r
2091 while(i<7 && (data&(1<<(i+1))))
\r
2096 if(buffer[0] != 0)
\r
2097 strcat(buffer, "/");
\r
2098 sprintf(buffer+strlen(buffer), "D%d", first);
\r
2099 if(run_length > 0)
\r
2100 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
\r
2105 if(data&(1<<(i+8)))
\r
2109 while(i<7 && (data&(1<<(i+8+1))))
\r
2114 if(buffer[0] != 0)
\r
2115 strcat(buffer, "/");
\r
2116 sprintf(buffer+strlen(buffer), "A%d", first);
\r
2117 if(run_length > 0)
\r
2118 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
\r
2121 sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);
\r
2124 static void d68000_movem_re_16(void)
\r
2126 uint data = read_imm_16();
\r
2139 while(i<7 && (data&(1<<(i+1))))
\r
2144 if(buffer[0] != 0)
\r
2145 strcat(buffer, "/");
\r
2146 sprintf(buffer+strlen(buffer), "D%d", first);
\r
2147 if(run_length > 0)
\r
2148 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
\r
2153 if(data&(1<<(i+8)))
\r
2157 while(i<7 && (data&(1<<(i+8+1))))
\r
2162 if(buffer[0] != 0)
\r
2163 strcat(buffer, "/");
\r
2164 sprintf(buffer+strlen(buffer), "A%d", first);
\r
2165 if(run_length > 0)
\r
2166 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
\r
2169 sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
\r
2172 static void d68000_movem_re_32(void)
\r
2174 uint data = read_imm_16();
\r
2187 while(i<7 && (data&(1<<(i+1))))
\r
2192 if(buffer[0] != 0)
\r
2193 strcat(buffer, "/");
\r
2194 sprintf(buffer+strlen(buffer), "D%d", first);
\r
2195 if(run_length > 0)
\r
2196 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
\r
2201 if(data&(1<<(i+8)))
\r
2205 while(i<7 && (data&(1<<(i+8+1))))
\r
2210 if(buffer[0] != 0)
\r
2211 strcat(buffer, "/");
\r
2212 sprintf(buffer+strlen(buffer), "A%d", first);
\r
2213 if(run_length > 0)
\r
2214 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
\r
2217 sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
\r
2220 static void d68000_movep_re_16(void)
\r
2222 sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
\r
2225 static void d68000_movep_re_32(void)
\r
2227 sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
\r
2230 static void d68000_movep_er_16(void)
\r
2232 sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2235 static void d68000_movep_er_32(void)
\r
2237 sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2240 static void d68010_moves_8(void)
\r
2243 LIMIT_CPU_TYPES(M68010_PLUS);
\r
2244 extension = read_imm_16();
\r
2245 if(BIT_B(extension))
\r
2246 sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));
\r
2248 sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
2251 static void d68010_moves_16(void)
\r
2254 LIMIT_CPU_TYPES(M68010_PLUS);
\r
2255 extension = read_imm_16();
\r
2256 if(BIT_B(extension))
\r
2257 sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));
\r
2259 sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
2262 static void d68010_moves_32(void)
\r
2265 LIMIT_CPU_TYPES(M68010_PLUS);
\r
2266 extension = read_imm_16();
\r
2267 if(BIT_B(extension))
\r
2268 sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));
\r
2270 sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
\r
2273 static void d68000_moveq(void)
\r
2275 sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2278 static void d68040_move16_pi_pi(void)
\r
2280 LIMIT_CPU_TYPES(M68040_PLUS);
\r
2281 sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);
\r
2284 static void d68040_move16_pi_al(void)
\r
2286 LIMIT_CPU_TYPES(M68040_PLUS);
\r
2287 sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());
\r
2290 static void d68040_move16_al_pi(void)
\r
2292 LIMIT_CPU_TYPES(M68040_PLUS);
\r
2293 sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);
\r
2296 static void d68040_move16_ai_al(void)
\r
2298 LIMIT_CPU_TYPES(M68040_PLUS);
\r
2299 sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());
\r
2302 static void d68040_move16_al_ai(void)
\r
2304 LIMIT_CPU_TYPES(M68040_PLUS);
\r
2305 sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);
\r
2308 static void d68000_muls(void)
\r
2310 sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2313 static void d68000_mulu(void)
\r
2315 sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2318 static void d68020_mull(void)
\r
2321 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2322 extension = read_imm_16();
\r
2324 if(BIT_A(extension))
\r
2325 sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
\r
2327 sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
\r
2330 static void d68000_nbcd(void)
\r
2332 sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir));
\r
2335 static void d68000_neg_8(void)
\r
2337 sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir));
\r
2340 static void d68000_neg_16(void)
\r
2342 sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
2345 static void d68000_neg_32(void)
\r
2347 sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir));
\r
2350 static void d68000_negx_8(void)
\r
2352 sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir));
\r
2355 static void d68000_negx_16(void)
\r
2357 sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
2360 static void d68000_negx_32(void)
\r
2362 sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir));
\r
2365 static void d68000_nop(void)
\r
2367 sprintf(g_dasm_str, "nop");
\r
2370 static void d68000_not_8(void)
\r
2372 sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir));
\r
2375 static void d68000_not_16(void)
\r
2377 sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
2380 static void d68000_not_32(void)
\r
2382 sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir));
\r
2385 static void d68000_or_er_8(void)
\r
2387 sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2390 static void d68000_or_er_16(void)
\r
2392 sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2395 static void d68000_or_er_32(void)
\r
2397 sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2400 static void d68000_or_re_8(void)
\r
2402 sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
2405 static void d68000_or_re_16(void)
\r
2407 sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
\r
2410 static void d68000_or_re_32(void)
\r
2412 sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
\r
2415 static void d68000_ori_8(void)
\r
2417 char* str = get_imm_str_u8();
\r
2418 sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
2421 static void d68000_ori_16(void)
\r
2423 char* str = get_imm_str_u16();
\r
2424 sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
\r
2427 static void d68000_ori_32(void)
\r
2429 char* str = get_imm_str_u32();
\r
2430 sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
\r
2433 static void d68000_ori_to_ccr(void)
\r
2435 sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8());
\r
2438 static void d68000_ori_to_sr(void)
\r
2440 sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16());
\r
2443 static void d68020_pack_rr(void)
\r
2445 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2446 sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
\r
2449 static void d68020_pack_mm(void)
\r
2451 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2452 sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
\r
2455 static void d68000_pea(void)
\r
2457 sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir));
\r
2460 static void d68040_pflush(void)
\r
2462 LIMIT_CPU_TYPES(M68040_PLUS);
\r
2464 if (g_cpu_ir & 0x10)
\r
2466 sprintf(g_dasm_str, "pflusha%s", (g_cpu_ir & 8) ? "" : "n");
\r
2470 sprintf(g_dasm_str, "pflush%s(A%d)", (g_cpu_ir & 8) ? "" : "n", g_cpu_ir & 7);
\r
2474 static void d68000_reset(void)
\r
2476 sprintf(g_dasm_str, "reset");
\r
2479 static void d68000_ror_s_8(void)
\r
2481 sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2484 static void d68000_ror_s_16(void)
\r
2486 sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);
\r
2489 static void d68000_ror_s_32(void)
\r
2491 sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2494 static void d68000_ror_r_8(void)
\r
2496 sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2499 static void d68000_ror_r_16(void)
\r
2501 sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2504 static void d68000_ror_r_32(void)
\r
2506 sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2509 static void d68000_ror_ea(void)
\r
2511 sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir));
\r
2514 static void d68000_rol_s_8(void)
\r
2516 sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2519 static void d68000_rol_s_16(void)
\r
2521 sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2524 static void d68000_rol_s_32(void)
\r
2526 sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2529 static void d68000_rol_r_8(void)
\r
2531 sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2534 static void d68000_rol_r_16(void)
\r
2536 sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2539 static void d68000_rol_r_32(void)
\r
2541 sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2544 static void d68000_rol_ea(void)
\r
2546 sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir));
\r
2549 static void d68000_roxr_s_8(void)
\r
2551 sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2554 static void d68000_roxr_s_16(void)
\r
2556 sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2560 static void d68000_roxr_s_32(void)
\r
2562 sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2565 static void d68000_roxr_r_8(void)
\r
2567 sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2570 static void d68000_roxr_r_16(void)
\r
2572 sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2575 static void d68000_roxr_r_32(void)
\r
2577 sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2580 static void d68000_roxr_ea(void)
\r
2582 sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir));
\r
2585 static void d68000_roxl_s_8(void)
\r
2587 sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2590 static void d68000_roxl_s_16(void)
\r
2592 sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2595 static void d68000_roxl_s_32(void)
\r
2597 sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
\r
2600 static void d68000_roxl_r_8(void)
\r
2602 sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2605 static void d68000_roxl_r_16(void)
\r
2607 sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2610 static void d68000_roxl_r_32(void)
\r
2612 sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
\r
2615 static void d68000_roxl_ea(void)
\r
2617 sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir));
\r
2620 static void d68010_rtd(void)
\r
2622 LIMIT_CPU_TYPES(M68010_PLUS);
\r
2623 sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16());
\r
2624 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
\r
2627 static void d68000_rte(void)
\r
2629 sprintf(g_dasm_str, "rte");
\r
2630 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
\r
2633 static void d68020_rtm(void)
\r
2635 LIMIT_CPU_TYPES(M68020_ONLY);
\r
2636 sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);
\r
2637 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
\r
2640 static void d68000_rtr(void)
\r
2642 sprintf(g_dasm_str, "rtr");
\r
2643 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
\r
2646 static void d68000_rts(void)
\r
2648 sprintf(g_dasm_str, "rts");
\r
2649 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
\r
2652 static void d68000_sbcd_rr(void)
\r
2654 sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2657 static void d68000_sbcd_mm(void)
\r
2659 sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2662 static void d68000_scc(void)
\r
2664 sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));
\r
2667 static void d68000_stop(void)
\r
2669 sprintf(g_dasm_str, "stop %s", get_imm_str_s16());
\r
2672 static void d68000_sub_er_8(void)
\r
2674 sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2677 static void d68000_sub_er_16(void)
\r
2679 sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2682 static void d68000_sub_er_32(void)
\r
2684 sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2687 static void d68000_sub_re_8(void)
\r
2689 sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
\r
2692 static void d68000_sub_re_16(void)
\r
2694 sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
\r
2697 static void d68000_sub_re_32(void)
\r
2699 sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
\r
2702 static void d68000_suba_16(void)
\r
2704 sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2707 static void d68000_suba_32(void)
\r
2709 sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
\r
2712 static void d68000_subi_8(void)
\r
2714 char* str = get_imm_str_s8();
\r
2715 sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
\r
2718 static void d68000_subi_16(void)
\r
2720 char* str = get_imm_str_s16();
\r
2721 sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
\r
2724 static void d68000_subi_32(void)
\r
2726 char* str = get_imm_str_s32();
\r
2727 sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
\r
2730 static void d68000_subq_8(void)
\r
2732 sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
\r
2735 static void d68000_subq_16(void)
\r
2737 sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
\r
2740 static void d68000_subq_32(void)
\r
2742 sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
\r
2745 static void d68000_subx_rr_8(void)
\r
2747 sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2750 static void d68000_subx_rr_16(void)
\r
2752 sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2755 static void d68000_subx_rr_32(void)
\r
2757 sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2760 static void d68000_subx_mm_8(void)
\r
2762 sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2765 static void d68000_subx_mm_16(void)
\r
2767 sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2770 static void d68000_subx_mm_32(void)
\r
2772 sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
\r
2775 static void d68000_swap(void)
\r
2777 sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7);
\r
2780 static void d68000_tas(void)
\r
2782 sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir));
\r
2785 static void d68000_trap(void)
\r
2787 sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf);
\r
2790 static void d68020_trapcc_0(void)
\r
2792 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2793 sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);
\r
2794 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
2797 static void d68020_trapcc_16(void)
\r
2799 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2800 sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());
\r
2801 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
2804 static void d68020_trapcc_32(void)
\r
2806 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2807 sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());
\r
2808 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
2811 static void d68000_trapv(void)
\r
2813 sprintf(g_dasm_str, "trapv");
\r
2814 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
\r
2817 static void d68000_tst_8(void)
\r
2819 sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir));
\r
2822 static void d68020_tst_pcdi_8(void)
\r
2824 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2825 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
\r
2828 static void d68020_tst_pcix_8(void)
\r
2830 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2831 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
\r
2834 static void d68020_tst_i_8(void)
\r
2836 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2837 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
\r
2840 static void d68000_tst_16(void)
\r
2842 sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir));
\r
2845 static void d68020_tst_a_16(void)
\r
2847 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2848 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
\r
2851 static void d68020_tst_pcdi_16(void)
\r
2853 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2854 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
\r
2857 static void d68020_tst_pcix_16(void)
\r
2859 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2860 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
\r
2863 static void d68020_tst_i_16(void)
\r
2865 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2866 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
\r
2869 static void d68000_tst_32(void)
\r
2871 sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir));
\r
2874 static void d68020_tst_a_32(void)
\r
2876 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2877 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
\r
2880 static void d68020_tst_pcdi_32(void)
\r
2882 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2883 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
\r
2886 static void d68020_tst_pcix_32(void)
\r
2888 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2889 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
\r
2892 static void d68020_tst_i_32(void)
\r
2894 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2895 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
\r
2898 static void d68000_unlk(void)
\r
2900 sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7);
\r
2903 static void d68020_unpk_rr(void)
\r
2905 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2906 sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
\r
2909 static void d68020_unpk_mm(void)
\r
2911 LIMIT_CPU_TYPES(M68020_PLUS);
\r
2912 sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
\r
2917 /* ======================================================================== */
\r
2918 /* ======================= INSTRUCTION TABLE BUILDER ====================== */
\r
2919 /* ======================================================================== */
\r
2922 800 = data register direct
\r
2923 400 = address register direct
\r
2924 200 = address register indirect
\r
2925 100 = ARI postincrement
\r
2926 80 = ARI pre-decrement
\r
2927 40 = ARI displacement
\r
2929 10 = absolute short
\r
2931 4 = immediate / sr
\r
2932 2 = pc displacement
\r
2936 static opcode_struct g_opcode_info[] =
\r
2938 /* opcode handler mask match ea mask */
\r
2939 {d68000_1010 , 0xf000, 0xa000, 0x000},
\r
2940 {d68000_1111 , 0xf000, 0xf000, 0x000},
\r
2941 {d68000_abcd_rr , 0xf1f8, 0xc100, 0x000},
\r
2942 {d68000_abcd_mm , 0xf1f8, 0xc108, 0x000},
\r
2943 {d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff},
\r
2944 {d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff},
\r
2945 {d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff},
\r
2946 {d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8},
\r
2947 {d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8},
\r
2948 {d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8},
\r
2949 {d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff},
\r
2950 {d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff},
\r
2951 {d68000_addi_8 , 0xffc0, 0x0600, 0xbf8},
\r
2952 {d68000_addi_16 , 0xffc0, 0x0640, 0xbf8},
\r
2953 {d68000_addi_32 , 0xffc0, 0x0680, 0xbf8},
\r
2954 {d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8},
\r
2955 {d68000_addq_16 , 0xf1c0, 0x5040, 0xff8},
\r
2956 {d68000_addq_32 , 0xf1c0, 0x5080, 0xff8},
\r
2957 {d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000},
\r
2958 {d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000},
\r
2959 {d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000},
\r
2960 {d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000},
\r
2961 {d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000},
\r
2962 {d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000},
\r
2963 {d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff},
\r
2964 {d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff},
\r
2965 {d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff},
\r
2966 {d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8},
\r
2967 {d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8},
\r
2968 {d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8},
\r
2969 {d68000_andi_to_ccr , 0xffff, 0x023c, 0x000},
\r
2970 {d68000_andi_to_sr , 0xffff, 0x027c, 0x000},
\r
2971 {d68000_andi_8 , 0xffc0, 0x0200, 0xbf8},
\r
2972 {d68000_andi_16 , 0xffc0, 0x0240, 0xbf8},
\r
2973 {d68000_andi_32 , 0xffc0, 0x0280, 0xbf8},
\r
2974 {d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000},
\r
2975 {d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000},
\r
2976 {d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000},
\r
2977 {d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000},
\r
2978 {d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000},
\r
2979 {d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000},
\r
2980 {d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8},
\r
2981 {d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000},
\r
2982 {d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000},
\r
2983 {d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000},
\r
2984 {d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000},
\r
2985 {d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000},
\r
2986 {d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000},
\r
2987 {d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8},
\r
2988 {d68000_bcc_8 , 0xf000, 0x6000, 0x000},
\r
2989 {d68000_bcc_16 , 0xf0ff, 0x6000, 0x000},
\r
2990 {d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000},
\r
2991 {d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8},
\r
2992 {d68000_bchg_s , 0xffc0, 0x0840, 0xbf8},
\r
2993 {d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8},
\r
2994 {d68000_bclr_s , 0xffc0, 0x0880, 0xbf8},
\r
2995 {d68020_bfchg , 0xffc0, 0xeac0, 0xa78},
\r
2996 {d68020_bfclr , 0xffc0, 0xecc0, 0xa78},
\r
2997 {d68020_bfexts , 0xffc0, 0xebc0, 0xa7b},
\r
2998 {d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b},
\r
2999 {d68020_bfffo , 0xffc0, 0xedc0, 0xa7b},
\r
3000 {d68020_bfins , 0xffc0, 0xefc0, 0xa78},
\r
3001 {d68020_bfset , 0xffc0, 0xeec0, 0xa78},
\r
3002 {d68020_bftst , 0xffc0, 0xe8c0, 0xa7b},
\r
3003 {d68010_bkpt , 0xfff8, 0x4848, 0x000},
\r
3004 {d68000_bra_8 , 0xff00, 0x6000, 0x000},
\r
3005 {d68000_bra_16 , 0xffff, 0x6000, 0x000},
\r
3006 {d68020_bra_32 , 0xffff, 0x60ff, 0x000},
\r
3007 {d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8},
\r
3008 {d68000_bset_s , 0xffc0, 0x08c0, 0xbf8},
\r
3009 {d68000_bsr_8 , 0xff00, 0x6100, 0x000},
\r
3010 {d68000_bsr_16 , 0xffff, 0x6100, 0x000},
\r
3011 {d68020_bsr_32 , 0xffff, 0x61ff, 0x000},
\r
3012 {d68000_btst_r , 0xf1c0, 0x0100, 0xbff},
\r
3013 {d68000_btst_s , 0xffc0, 0x0800, 0xbfb},
\r
3014 {d68020_callm , 0xffc0, 0x06c0, 0x27b},
\r
3015 {d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8},
\r
3016 {d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8},
\r
3017 {d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8},
\r
3018 {d68020_cas2_16 , 0xffff, 0x0cfc, 0x000},
\r
3019 {d68020_cas2_32 , 0xffff, 0x0efc, 0x000},
\r
3020 {d68000_chk_16 , 0xf1c0, 0x4180, 0xbff},
\r
3021 {d68020_chk_32 , 0xf1c0, 0x4100, 0xbff},
\r
3022 {d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b},
\r
3023 {d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},
\r
3024 {d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},
\r
3025 {d68040_cinv , 0xff20, 0xf400, 0x000},
\r
3026 {d68000_clr_8 , 0xffc0, 0x4200, 0xbf8},
\r
3027 {d68000_clr_16 , 0xffc0, 0x4240, 0xbf8},
\r
3028 {d68000_clr_32 , 0xffc0, 0x4280, 0xbf8},
\r
3029 {d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff},
\r
3030 {d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff},
\r
3031 {d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff},
\r
3032 {d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff},
\r
3033 {d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff},
\r
3034 {d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8},
\r
3035 {d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000},
\r
3036 {d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000},
\r
3037 {d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8},
\r
3038 {d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},
\r
3039 {d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},
\r
3040 {d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8},
\r
3041 {d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},
\r
3042 {d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},
\r
3043 {d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000},
\r
3044 {d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000},
\r
3045 {d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000},
\r
3046 {d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000},
\r
3047 {d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000},
\r
3048 {d68020_cpdbcc , 0xf1f8, 0xf048, 0x000},
\r
3049 {d68020_cpgen , 0xf1c0, 0xf000, 0x000},
\r
3050 {d68020_cprestore , 0xf1c0, 0xf140, 0x37f},
\r
3051 {d68020_cpsave , 0xf1c0, 0xf100, 0x2f8},
\r
3052 {d68020_cpscc , 0xf1c0, 0xf040, 0xbf8},
\r
3053 {d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000},
\r
3054 {d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000},
\r
3055 {d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000},
\r
3056 {d68040_cpush , 0xff20, 0xf420, 0x000},
\r
3057 {d68000_dbcc , 0xf0f8, 0x50c8, 0x000},
\r
3058 {d68000_dbra , 0xfff8, 0x51c8, 0x000},
\r
3059 {d68000_divs , 0xf1c0, 0x81c0, 0xbff},
\r
3060 {d68000_divu , 0xf1c0, 0x80c0, 0xbff},
\r
3061 {d68020_divl , 0xffc0, 0x4c40, 0xbff},
\r
3062 {d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8},
\r
3063 {d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8},
\r
3064 {d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8},
\r
3065 {d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000},
\r
3066 {d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000},
\r
3067 {d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8},
\r
3068 {d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8},
\r
3069 {d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8},
\r
3070 {d68000_exg_dd , 0xf1f8, 0xc140, 0x000},
\r
3071 {d68000_exg_aa , 0xf1f8, 0xc148, 0x000},
\r
3072 {d68000_exg_da , 0xf1f8, 0xc188, 0x000},
\r
3073 {d68020_extb_32 , 0xfff8, 0x49c0, 0x000},
\r
3074 {d68000_ext_16 , 0xfff8, 0x4880, 0x000},
\r
3075 {d68000_ext_32 , 0xfff8, 0x48c0, 0x000},
\r
3076 {d68000_illegal , 0xffff, 0x4afc, 0x000},
\r
3077 {d68000_jmp , 0xffc0, 0x4ec0, 0x27b},
\r
3078 {d68000_jsr , 0xffc0, 0x4e80, 0x27b},
\r
3079 {d68000_lea , 0xf1c0, 0x41c0, 0x27b},
\r
3080 {d68000_link_16 , 0xfff8, 0x4e50, 0x000},
\r
3081 {d68020_link_32 , 0xfff8, 0x4808, 0x000},
\r
3082 {d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000},
\r
3083 {d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000},
\r
3084 {d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000},
\r
3085 {d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000},
\r
3086 {d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000},
\r
3087 {d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000},
\r
3088 {d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8},
\r
3089 {d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000},
\r
3090 {d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000},
\r
3091 {d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000},
\r
3092 {d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000},
\r
3093 {d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000},
\r
3094 {d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000},
\r
3095 {d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8},
\r
3096 {d68000_move_8 , 0xf000, 0x1000, 0xbff},
\r
3097 {d68000_move_16 , 0xf000, 0x3000, 0xfff},
\r
3098 {d68000_move_32 , 0xf000, 0x2000, 0xfff},
\r
3099 {d68000_movea_16 , 0xf1c0, 0x3040, 0xfff},
\r
3100 {d68000_movea_32 , 0xf1c0, 0x2040, 0xfff},
\r
3101 {d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff},
\r
3102 {d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8},
\r
3103 {d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff},
\r
3104 {d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8},
\r
3105 {d68000_move_to_usp , 0xfff8, 0x4e60, 0x000},
\r
3106 {d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000},
\r
3107 {d68010_movec , 0xfffe, 0x4e7a, 0x000},
\r
3108 {d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000},
\r
3109 {d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000},
\r
3110 {d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8},
\r
3111 {d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8},
\r
3112 {d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b},
\r
3113 {d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b},
\r
3114 {d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000},
\r
3115 {d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000},
\r
3116 {d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000},
\r
3117 {d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000},
\r
3118 {d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8},
\r
3119 {d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8},
\r
3120 {d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8},
\r
3121 {d68000_moveq , 0xf100, 0x7000, 0x000},
\r
3122 {d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},
\r
3123 {d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},
\r
3124 {d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},
\r
3125 {d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},
\r
3126 {d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},
\r
3127 {d68000_muls , 0xf1c0, 0xc1c0, 0xbff},
\r
3128 {d68000_mulu , 0xf1c0, 0xc0c0, 0xbff},
\r
3129 {d68020_mull , 0xffc0, 0x4c00, 0xbff},
\r
3130 {d68000_nbcd , 0xffc0, 0x4800, 0xbf8},
\r
3131 {d68000_neg_8 , 0xffc0, 0x4400, 0xbf8},
\r
3132 {d68000_neg_16 , 0xffc0, 0x4440, 0xbf8},
\r
3133 {d68000_neg_32 , 0xffc0, 0x4480, 0xbf8},
\r
3134 {d68000_negx_8 , 0xffc0, 0x4000, 0xbf8},
\r
3135 {d68000_negx_16 , 0xffc0, 0x4040, 0xbf8},
\r
3136 {d68000_negx_32 , 0xffc0, 0x4080, 0xbf8},
\r
3137 {d68000_nop , 0xffff, 0x4e71, 0x000},
\r
3138 {d68000_not_8 , 0xffc0, 0x4600, 0xbf8},
\r
3139 {d68000_not_16 , 0xffc0, 0x4640, 0xbf8},
\r
3140 {d68000_not_32 , 0xffc0, 0x4680, 0xbf8},
\r
3141 {d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff},
\r
3142 {d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff},
\r
3143 {d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff},
\r
3144 {d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8},
\r
3145 {d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8},
\r
3146 {d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8},
\r
3147 {d68000_ori_to_ccr , 0xffff, 0x003c, 0x000},
\r
3148 {d68000_ori_to_sr , 0xffff, 0x007c, 0x000},
\r
3149 {d68000_ori_8 , 0xffc0, 0x0000, 0xbf8},
\r
3150 {d68000_ori_16 , 0xffc0, 0x0040, 0xbf8},
\r
3151 {d68000_ori_32 , 0xffc0, 0x0080, 0xbf8},
\r
3152 {d68020_pack_rr , 0xf1f8, 0x8140, 0x000},
\r
3153 {d68020_pack_mm , 0xf1f8, 0x8148, 0x000},
\r
3154 {d68000_pea , 0xffc0, 0x4840, 0x27b},
\r
3155 {d68040_pflush , 0xffe0, 0xf500, 0x000},
\r
3156 {d68000_reset , 0xffff, 0x4e70, 0x000},
\r
3157 {d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},
\r
3158 {d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},
\r
3159 {d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000},
\r
3160 {d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000},
\r
3161 {d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000},
\r
3162 {d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000},
\r
3163 {d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8},
\r
3164 {d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000},
\r
3165 {d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000},
\r
3166 {d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000},
\r
3167 {d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000},
\r
3168 {d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000},
\r
3169 {d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000},
\r
3170 {d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8},
\r
3171 {d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000},
\r
3172 {d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000},
\r
3173 {d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000},
\r
3174 {d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000},
\r
3175 {d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000},
\r
3176 {d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000},
\r
3177 {d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8},
\r
3178 {d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000},
\r
3179 {d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000},
\r
3180 {d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000},
\r
3181 {d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000},
\r
3182 {d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000},
\r
3183 {d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000},
\r
3184 {d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8},
\r
3185 {d68010_rtd , 0xffff, 0x4e74, 0x000},
\r
3186 {d68000_rte , 0xffff, 0x4e73, 0x000},
\r
3187 {d68020_rtm , 0xfff0, 0x06c0, 0x000},
\r
3188 {d68000_rtr , 0xffff, 0x4e77, 0x000},
\r
3189 {d68000_rts , 0xffff, 0x4e75, 0x000},
\r
3190 {d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000},
\r
3191 {d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000},
\r
3192 {d68000_scc , 0xf0c0, 0x50c0, 0xbf8},
\r
3193 {d68000_stop , 0xffff, 0x4e72, 0x000},
\r
3194 {d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff},
\r
3195 {d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff},
\r
3196 {d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff},
\r
3197 {d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8},
\r
3198 {d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8},
\r
3199 {d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8},
\r
3200 {d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff},
\r
3201 {d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff},
\r
3202 {d68000_subi_8 , 0xffc0, 0x0400, 0xbf8},
\r
3203 {d68000_subi_16 , 0xffc0, 0x0440, 0xbf8},
\r
3204 {d68000_subi_32 , 0xffc0, 0x0480, 0xbf8},
\r
3205 {d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8},
\r
3206 {d68000_subq_16 , 0xf1c0, 0x5140, 0xff8},
\r
3207 {d68000_subq_32 , 0xf1c0, 0x5180, 0xff8},
\r
3208 {d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000},
\r
3209 {d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000},
\r
3210 {d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000},
\r
3211 {d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000},
\r
3212 {d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000},
\r
3213 {d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000},
\r
3214 {d68000_swap , 0xfff8, 0x4840, 0x000},
\r
3215 {d68000_tas , 0xffc0, 0x4ac0, 0xbf8},
\r
3216 {d68000_trap , 0xfff0, 0x4e40, 0x000},
\r
3217 {d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000},
\r
3218 {d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000},
\r
3219 {d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000},
\r
3220 {d68000_trapv , 0xffff, 0x4e76, 0x000},
\r
3221 {d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8},
\r
3222 {d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000},
\r
3223 {d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000},
\r
3224 {d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000},
\r
3225 {d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8},
\r
3226 {d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000},
\r
3227 {d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000},
\r
3228 {d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000},
\r
3229 {d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000},
\r
3230 {d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8},
\r
3231 {d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000},
\r
3232 {d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000},
\r
3233 {d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000},
\r
3234 {d68020_tst_i_32 , 0xffff, 0x4abc, 0x000},
\r
3235 {d68000_unlk , 0xfff8, 0x4e58, 0x000},
\r
3236 {d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},
\r
3237 {d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},
\r
3241 /* Check if opcode is using a valid ea mode */
\r
3242 static int valid_ea(uint opcode, uint mask)
\r
3247 switch(opcode & 0x3f)
\r
3249 case 0x00: case 0x01: case 0x02: case 0x03:
\r
3250 case 0x04: case 0x05: case 0x06: case 0x07:
\r
3251 return (mask & 0x800) != 0;
\r
3252 case 0x08: case 0x09: case 0x0a: case 0x0b:
\r
3253 case 0x0c: case 0x0d: case 0x0e: case 0x0f:
\r
3254 return (mask & 0x400) != 0;
\r
3255 case 0x10: case 0x11: case 0x12: case 0x13:
\r
3256 case 0x14: case 0x15: case 0x16: case 0x17:
\r
3257 return (mask & 0x200) != 0;
\r
3258 case 0x18: case 0x19: case 0x1a: case 0x1b:
\r
3259 case 0x1c: case 0x1d: case 0x1e: case 0x1f:
\r
3260 return (mask & 0x100) != 0;
\r
3261 case 0x20: case 0x21: case 0x22: case 0x23:
\r
3262 case 0x24: case 0x25: case 0x26: case 0x27:
\r
3263 return (mask & 0x080) != 0;
\r
3264 case 0x28: case 0x29: case 0x2a: case 0x2b:
\r
3265 case 0x2c: case 0x2d: case 0x2e: case 0x2f:
\r
3266 return (mask & 0x040) != 0;
\r
3267 case 0x30: case 0x31: case 0x32: case 0x33:
\r
3268 case 0x34: case 0x35: case 0x36: case 0x37:
\r
3269 return (mask & 0x020) != 0;
\r
3271 return (mask & 0x010) != 0;
\r
3273 return (mask & 0x008) != 0;
\r
3275 return (mask & 0x002) != 0;
\r
3277 return (mask & 0x001) != 0;
\r
3279 return (mask & 0x004) != 0;
\r
3285 /* Used by qsort */
\r
3286 static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)
\r
3288 uint a = ((const opcode_struct*)aptr)->mask;
\r
3289 uint b = ((const opcode_struct*)bptr)->mask;
\r
3291 a = ((a & 0xAAAA) >> 1) + (a & 0x5555);
\r
3292 a = ((a & 0xCCCC) >> 2) + (a & 0x3333);
\r
3293 a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);
\r
3294 a = ((a & 0xFF00) >> 8) + (a & 0x00FF);
\r
3296 b = ((b & 0xAAAA) >> 1) + (b & 0x5555);
\r
3297 b = ((b & 0xCCCC) >> 2) + (b & 0x3333);
\r
3298 b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);
\r
3299 b = ((b & 0xFF00) >> 8) + (b & 0x00FF);
\r
3301 return b - a; /* reversed to get greatest to least sorting */
\r
3304 /* build the opcode handler jump table */
\r
3305 static void build_opcode_table(void)
\r
3309 opcode_struct* ostruct;
\r
3310 uint opcode_info_length = 0;
\r
3312 for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
\r
3313 opcode_info_length++;
\r
3315 qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);
\r
3317 for(i=0;i<0x10000;i++)
\r
3319 g_instruction_table[i] = d68000_illegal; /* default to illegal */
\r
3321 /* search through opcode info for a match */
\r
3322 for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
\r
3324 /* match opcode mask and allowed ea modes */
\r
3325 if((opcode & ostruct->mask) == ostruct->match)
\r
3327 /* Handle destination ea for move instructions */
\r
3328 if((ostruct->opcode_handler == d68000_move_8 ||
\r
3329 ostruct->opcode_handler == d68000_move_16 ||
\r
3330 ostruct->opcode_handler == d68000_move_32) &&
\r
3331 !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))
\r
3333 if(valid_ea(opcode, ostruct->ea_mask))
\r
3335 g_instruction_table[i] = ostruct->opcode_handler;
\r
3345 /* ======================================================================== */
\r
3346 /* ================================= API ================================== */
\r
3347 /* ======================================================================== */
\r
3349 /* Disasemble one instruction at pc and store in str_buff */
\r
3350 unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)
\r
3352 if(!g_initialized)
\r
3354 build_opcode_table();
\r
3355 g_initialized = 1;
\r
3359 case M68K_CPU_TYPE_68000:
\r
3360 g_cpu_type = TYPE_68000;
\r
3361 g_address_mask = 0x00ffffff;
\r
3363 case M68K_CPU_TYPE_68008:
\r
3364 g_cpu_type = TYPE_68008;
\r
3365 g_address_mask = 0x003fffff;
\r
3367 case M68K_CPU_TYPE_68010:
\r
3368 g_cpu_type = TYPE_68010;
\r
3369 g_address_mask = 0x00ffffff;
\r
3371 case M68K_CPU_TYPE_68EC020:
\r
3372 g_cpu_type = TYPE_68020;
\r
3373 g_address_mask = 0x00ffffff;
\r
3375 case M68K_CPU_TYPE_68020:
\r
3376 g_cpu_type = TYPE_68020;
\r
3377 g_address_mask = 0xffffffff;
\r
3379 case M68K_CPU_TYPE_68030:
\r
3380 g_cpu_type = TYPE_68030;
\r
3381 g_address_mask = 0xffffffff;
\r
3383 case M68K_CPU_TYPE_68040:
\r
3384 g_cpu_type = TYPE_68040;
\r
3385 g_address_mask = 0xffffffff;
\r
3392 g_helper_str[0] = 0;
\r
3393 g_cpu_ir = read_imm_16();
\r
3394 g_opcode_type = 0;
\r
3395 g_instruction_table[g_cpu_ir]();
\r
3396 sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);
\r
3397 return COMBINE_OPCODE_FLAGS(g_cpu_pc - pc);
\r
3400 char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)
\r
3402 static char buff[100];
\r
3404 m68k_disassemble(buff, pc, cpu_type);
\r
3408 unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, unsigned char* opdata, unsigned char* argdata, int length, unsigned int cpu_type)
\r
3410 unsigned int result;
\r
3414 g_rawlength = length;
\r
3415 result = m68k_disassemble(str_buff, pc, cpu_type);
\r
3420 /* Check if the instruction is a valid one */
\r
3421 unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)
\r
3423 if(!g_initialized)
\r
3425 build_opcode_table();
\r
3426 g_initialized = 1;
\r
3429 instruction &= 0xffff;
\r
3430 if(g_instruction_table[instruction] == d68000_illegal)
\r
3435 case M68K_CPU_TYPE_68000:
\r
3436 case M68K_CPU_TYPE_68008:
\r
3437 if(g_instruction_table[instruction] == d68010_bkpt)
\r
3439 if(g_instruction_table[instruction] == d68010_move_fr_ccr)
\r
3441 if(g_instruction_table[instruction] == d68010_movec)
\r
3443 if(g_instruction_table[instruction] == d68010_moves_8)
\r
3445 if(g_instruction_table[instruction] == d68010_moves_16)
\r
3447 if(g_instruction_table[instruction] == d68010_moves_32)
\r
3449 if(g_instruction_table[instruction] == d68010_rtd)
\r
3451 case M68K_CPU_TYPE_68010:
\r
3452 if(g_instruction_table[instruction] == d68020_bcc_32)
\r
3454 if(g_instruction_table[instruction] == d68020_bfchg)
\r
3456 if(g_instruction_table[instruction] == d68020_bfclr)
\r
3458 if(g_instruction_table[instruction] == d68020_bfexts)
\r
3460 if(g_instruction_table[instruction] == d68020_bfextu)
\r
3462 if(g_instruction_table[instruction] == d68020_bfffo)
\r
3464 if(g_instruction_table[instruction] == d68020_bfins)
\r
3466 if(g_instruction_table[instruction] == d68020_bfset)
\r
3468 if(g_instruction_table[instruction] == d68020_bftst)
\r
3470 if(g_instruction_table[instruction] == d68020_bra_32)
\r
3472 if(g_instruction_table[instruction] == d68020_bsr_32)
\r
3474 if(g_instruction_table[instruction] == d68020_callm)
\r
3476 if(g_instruction_table[instruction] == d68020_cas_8)
\r
3478 if(g_instruction_table[instruction] == d68020_cas_16)
\r
3480 if(g_instruction_table[instruction] == d68020_cas_32)
\r
3482 if(g_instruction_table[instruction] == d68020_cas2_16)
\r
3484 if(g_instruction_table[instruction] == d68020_cas2_32)
\r
3486 if(g_instruction_table[instruction] == d68020_chk_32)
\r
3488 if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)
\r
3490 if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)
\r
3492 if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)
\r
3494 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)
\r
3496 if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)
\r
3498 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)
\r
3500 if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)
\r
3502 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)
\r
3504 if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)
\r
3506 if(g_instruction_table[instruction] == d68020_cpbcc_16)
\r
3508 if(g_instruction_table[instruction] == d68020_cpbcc_32)
\r
3510 if(g_instruction_table[instruction] == d68020_cpdbcc)
\r
3512 if(g_instruction_table[instruction] == d68020_cpgen)
\r
3514 if(g_instruction_table[instruction] == d68020_cprestore)
\r
3516 if(g_instruction_table[instruction] == d68020_cpsave)
\r
3518 if(g_instruction_table[instruction] == d68020_cpscc)
\r
3520 if(g_instruction_table[instruction] == d68020_cptrapcc_0)
\r
3522 if(g_instruction_table[instruction] == d68020_cptrapcc_16)
\r
3524 if(g_instruction_table[instruction] == d68020_cptrapcc_32)
\r
3526 if(g_instruction_table[instruction] == d68020_divl)
\r
3528 if(g_instruction_table[instruction] == d68020_extb_32)
\r
3530 if(g_instruction_table[instruction] == d68020_link_32)
\r
3532 if(g_instruction_table[instruction] == d68020_mull)
\r
3534 if(g_instruction_table[instruction] == d68020_pack_rr)
\r
3536 if(g_instruction_table[instruction] == d68020_pack_mm)
\r
3538 if(g_instruction_table[instruction] == d68020_rtm)
\r
3540 if(g_instruction_table[instruction] == d68020_trapcc_0)
\r
3542 if(g_instruction_table[instruction] == d68020_trapcc_16)
\r
3544 if(g_instruction_table[instruction] == d68020_trapcc_32)
\r
3546 if(g_instruction_table[instruction] == d68020_tst_pcdi_8)
\r
3548 if(g_instruction_table[instruction] == d68020_tst_pcix_8)
\r
3550 if(g_instruction_table[instruction] == d68020_tst_i_8)
\r
3552 if(g_instruction_table[instruction] == d68020_tst_a_16)
\r
3554 if(g_instruction_table[instruction] == d68020_tst_pcdi_16)
\r
3556 if(g_instruction_table[instruction] == d68020_tst_pcix_16)
\r
3558 if(g_instruction_table[instruction] == d68020_tst_i_16)
\r
3560 if(g_instruction_table[instruction] == d68020_tst_a_32)
\r
3562 if(g_instruction_table[instruction] == d68020_tst_pcdi_32)
\r
3564 if(g_instruction_table[instruction] == d68020_tst_pcix_32)
\r
3566 if(g_instruction_table[instruction] == d68020_tst_i_32)
\r
3568 if(g_instruction_table[instruction] == d68020_unpk_rr)
\r
3570 if(g_instruction_table[instruction] == d68020_unpk_mm)
\r
3572 case M68K_CPU_TYPE_68EC020:
\r
3573 case M68K_CPU_TYPE_68020:
\r
3574 case M68K_CPU_TYPE_68030:
\r
3575 if(g_instruction_table[instruction] == d68040_cinv)
\r
3577 if(g_instruction_table[instruction] == d68040_cpush)
\r
3579 if(g_instruction_table[instruction] == d68040_move16_pi_pi)
\r
3581 if(g_instruction_table[instruction] == d68040_move16_pi_al)
\r
3583 if(g_instruction_table[instruction] == d68040_move16_al_pi)
\r
3585 if(g_instruction_table[instruction] == d68040_move16_ai_al)
\r
3587 if(g_instruction_table[instruction] == d68040_move16_al_ai)
\r
3589 if(g_instruction_table[instruction] == d68040_pflush)
\r
3592 if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
\r
3593 (g_instruction_table[instruction] == d68020_callm ||
\r
3594 g_instruction_table[instruction] == d68020_rtm))
\r
3602 /* ======================================================================== */
\r
3603 /* ============================== END OF FILE ============================= */
\r
3604 /* ======================================================================== */
\r