4 typedef signed char INT8;
5 typedef signed short INT16;
6 typedef signed int INT32;
7 typedef unsigned int UINT32;
8 typedef unsigned short UINT16;
9 typedef unsigned char UINT8;
11 #define RB(a) p32x_sh2_read8(a,sh2)
12 #define RW(a) p32x_sh2_read16(a,sh2)
13 #define RL(a) p32x_sh2_read32(a,sh2)
14 #define WB(a,d) p32x_sh2_write8(a,d,sh2)
15 #define WW(a,d) p32x_sh2_write16(a,d,sh2)
16 #define WL(a,d) p32x_sh2_write32(a,d,sh2)
18 // some stuff from sh2comn.h
27 #define FLAGS (M|Q|I|S|T)
29 #define Rn ((opcode>>8)&15)
30 #define Rm ((opcode>>4)&15)
32 #define sh2_icount sh2->icount
36 static unsigned int op_refs[0x10000];
39 # define LRNM (LRN|LRM)
40 # define rlog(rnm) { \
52 # define rlog1(x) sh2_stats.r[x]++
53 # define rlog2(x1,x2) sh2_stats.r[x1]++; sh2_stats.r[x2]++
64 void sh2_execute(SH2 *sh2_, int cycles)
67 sh2->cycles_aim += cycles;
68 sh2->icount = cycles = sh2->cycles_aim - sh2->cycles_done;
77 /* FIXME: Darxide doesn't like this */
78 if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
80 if (sh2->pending_irl > sh2->pending_int_irq)
81 sh2_do_irq(sh2, sh2->pending_irl, 64 + sh2->pending_irl/2);
83 sh2_do_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
84 sh2->pending_int_irq = 0; // auto-clear
85 sh2->pending_level = sh2->pending_irl;
92 sh2->ppc = sh2->delay;
93 opcode = RW(sh2->delay);
105 switch (opcode & ( 15 << 12))
107 case 0<<12: op0000(opcode); break;
108 case 1<<12: op0001(opcode); break;
109 case 2<<12: op0010(opcode); break;
110 case 3<<12: op0011(opcode); break;
111 case 4<<12: op0100(opcode); break;
112 case 5<<12: op0101(opcode); break;
113 case 6<<12: op0110(opcode); break;
114 case 7<<12: op0111(opcode); break;
115 case 8<<12: op1000(opcode); break;
116 case 9<<12: op1001(opcode); break;
117 case 10<<12: op1010(opcode); break;
118 case 11<<12: op1011(opcode); break;
119 case 12<<12: op1100(opcode); break;
120 case 13<<12: op1101(opcode); break;
121 case 14<<12: op1110(opcode); break;
122 default: op1111(opcode); break;
127 while (sh2->icount > 0 || sh2->delay); /* can't interrupt before delay */
129 sh2->cycles_done += cycles - sh2->icount;
135 #define REGPARM(x) __attribute__((regparm(x)))
141 void REGPARM(2) sh2_do_op(SH2 *sh2_, int opcode)
146 switch (opcode & ( 15 << 12))
148 case 0<<12: op0000(opcode); break;
149 case 1<<12: op0001(opcode); break;
150 case 2<<12: op0010(opcode); break;
151 case 3<<12: op0011(opcode); break;
152 case 4<<12: op0100(opcode); break;
153 case 5<<12: op0101(opcode); break;
154 case 6<<12: op0110(opcode); break;
155 case 7<<12: op0111(opcode); break;
156 case 8<<12: op1000(opcode); break;
157 case 9<<12: op1001(opcode); break;
158 case 10<<12: op1010(opcode); break;
159 case 11<<12: op1011(opcode); break;
160 case 12<<12: op1100(opcode); break;
161 case 13<<12: op1101(opcode); break;
162 case 14<<12: op1110(opcode); break;
163 default: op1111(opcode); break;
174 void sh2_dump_stats(void)
176 static const char *rnames[] = {
177 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
178 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "SP",
179 "PC", "", "PR", "SR", "GBR", "VBR", "MACH", "MACL"
187 for (i = 0; i < 24; i++)
188 total += sh2_stats.r[i];
190 for (i = 0; i < 24; i++) {
191 if (i == 16 || i == 17 || i == 19)
193 printf("r %6.3f%% %-4s %9d\n", (double)sh2_stats.r[i] * 100.0 / total,
194 rnames[i], sh2_stats.r[i]);
197 memset(&sh2_stats, 0, sizeof(sh2_stats));
202 for (i = 0; i < 0x10000; i++)
205 for (u = 0; u < 16; u++) {
207 for (i = 0; i < 0x10000; i++) {
208 if (op_refs[i] > max) {
213 DasmSH2(buff, 0, op);
214 printf("i %6.3f%% %9d %s\n", (double)op_refs[op] * 100.0 / total,
218 memset(op_refs, 0, sizeof(op_refs));