4 typedef signed char INT8;
5 typedef signed short INT16;
6 typedef signed int INT32;
7 typedef unsigned int UINT32;
8 typedef unsigned short UINT16;
9 typedef unsigned char UINT8;
11 #define RB(a) p32x_sh2_read8(a,sh2)
12 #define RW(a) p32x_sh2_read16(a,sh2)
13 #define RL(a) p32x_sh2_read32(a,sh2)
14 #define WB(a,d) p32x_sh2_write8(a,d,sh2)
15 #define WW(a,d) p32x_sh2_write16(a,d,sh2)
16 #define WL(a,d) p32x_sh2_write32(a,d,sh2)
18 // some stuff from sh2comn.h
27 #define FLAGS (M|Q|I|S|T)
29 #define Rn ((opcode>>8)&15)
30 #define Rm ((opcode>>4)&15)
32 #define sh2_icount sh2->icount
38 void sh2_execute(SH2 *sh2_, int cycles)
41 sh2->cycles_aim += cycles;
42 sh2->icount = cycles = sh2->cycles_aim - sh2->cycles_done;
51 if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
53 if (sh2->pending_irl > sh2->pending_int_irq)
54 sh2_do_irq(sh2, sh2->pending_irl, 64 + sh2->pending_irl/2);
56 sh2_do_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
57 sh2->pending_int_irq = 0; // auto-clear
58 sh2->pending_level = sh2->pending_irl;
65 sh2->ppc = sh2->delay;
66 opcode = RW(sh2->delay);
78 switch (opcode & ( 15 << 12))
80 case 0<<12: op0000(opcode); break;
81 case 1<<12: op0001(opcode); break;
82 case 2<<12: op0010(opcode); break;
83 case 3<<12: op0011(opcode); break;
84 case 4<<12: op0100(opcode); break;
85 case 5<<12: op0101(opcode); break;
86 case 6<<12: op0110(opcode); break;
87 case 7<<12: op0111(opcode); break;
88 case 8<<12: op1000(opcode); break;
89 case 9<<12: op1001(opcode); break;
90 case 10<<12: op1010(opcode); break;
91 case 11<<12: op1011(opcode); break;
92 case 12<<12: op1100(opcode); break;
93 case 13<<12: op1101(opcode); break;
94 case 14<<12: op1110(opcode); break;
95 default: op1111(opcode); break;
100 while (sh2->icount > 0 || sh2->delay); /* can't interrupt before delay */
102 sh2->cycles_done += cycles - sh2->icount;
108 #define REGPARM(x) __attribute__((regparm(x)))
114 void REGPARM(2) sh2_do_op(SH2 *sh2_, int opcode)
119 switch (opcode & ( 15 << 12))
121 case 0<<12: op0000(opcode); break;
122 case 1<<12: op0001(opcode); break;
123 case 2<<12: op0010(opcode); break;
124 case 3<<12: op0011(opcode); break;
125 case 4<<12: op0100(opcode); break;
126 case 5<<12: op0101(opcode); break;
127 case 6<<12: op0110(opcode); break;
128 case 7<<12: op0111(opcode); break;
129 case 8<<12: op1000(opcode); break;
130 case 9<<12: op1001(opcode); break;
131 case 10<<12: op1010(opcode); break;
132 case 11<<12: op1011(opcode); break;
133 case 12<<12: op1100(opcode); break;
134 case 13<<12: op1101(opcode); break;
135 case 14<<12: op1110(opcode); break;
136 default: op1111(opcode); break;