cpu/sh2/mame/sh2pico.c

   1 #include "../sh2.h"
   2
   3 // MAME types
   4 typedef signed char  INT8;
   5 typedef signed short INT16;
   6 typedef signed int   INT32;
   7 typedef unsigned int   UINT32;
   8 typedef unsigned short UINT16;
   9 typedef unsigned char  UINT8;
  10
  11 #define RB(sh2, a) p32x_sh2_read8(a,sh2)
  12 #define RW(sh2, a) p32x_sh2_read16(a,sh2)
  13 #define RL(sh2, a) p32x_sh2_read32(a,sh2)
  14 #define WB(sh2, a, d) p32x_sh2_write8(a,d,sh2)
  15 #define WW(sh2, a, d) p32x_sh2_write16(a,d,sh2)
  16 #define WL(sh2, a, d) p32x_sh2_write32(a,d,sh2)
  17
  18 // some stuff from sh2comn.h
  19 #define T       0x00000001
  20 #define S       0x00000002
  21 #define I       0x000000f0
  22 #define Q       0x00000100
  23 #define M       0x00000200
  24
  25 #define AM      0xc7ffffff
  26
  27 #define FLAGS   (M|Q|I|S|T)
  28
  29 #define Rn      ((opcode>>8)&15)
  30 #define Rm      ((opcode>>4)&15)
  31
  32 #define sh2_state SH2
  33
  34 extern void lprintf(const char *fmt, ...);
  35 #define logerror lprintf
  36
  37 #ifdef SH2_STATS
  38 static SH2 sh2_stats;
  39 static unsigned int op_refs[0x10000];
  40 # define LRN  1
  41 # define LRM  2
  42 # define LRNM (LRN|LRM)
  43 # define rlog(rnm) {   \
  44   int op = opcode;     \
  45   if ((rnm) & LRN) {   \
  46     op &= ~0x0f00;     \
  47     sh2_stats.r[Rn]++; \
  48   }                    \
  49   if ((rnm) & LRM) {   \
  50     op &= ~0x00f0;     \
  51     sh2_stats.r[Rm]++; \
  52   }                    \
  53   op_refs[op]++;       \
  54 }
  55 # define rlog1(x) sh2_stats.r[x]++
  56 # define rlog2(x1,x2) sh2_stats.r[x1]++; sh2_stats.r[x2]++
  57 #else
  58 # define rlog(x)
  59 # define rlog1(...)
  60 # define rlog2(...)
  61 #endif
  62
  63 #include "sh2.c"
  64
  65 #ifndef DRC_SH2
  66
  67 int sh2_execute(SH2 *sh2, int cycles)
  68 {
  69         sh2 = sh2_;
  70         sh2->icount = cycles;
  71
  72         if (sh2->icount <= 0)
  73                 return cycles;
  74
  75         sh2->cycles_timeslice = cycles;
  76
  77         do
  78         {
  79                 UINT32 opcode;
  80
  81                 if (sh2->delay)
  82                 {
  83                         sh2->ppc = sh2->delay;
  84                         opcode = RW(sh2, sh2->delay);
  85                         sh2->pc -= 2;
  86                 }
  87                 else
  88                 {
  89                         sh2->ppc = sh2->pc;
  90                         opcode = RW(sh2, sh2->pc);
  91                 }
  92
  93                 sh2->delay = 0;
  94                 sh2->pc += 2;
  95
  96                 switch (opcode & ( 15 << 12))
  97                 {
  98                 case  0<<12: op0000(sh2, opcode); break;
  99                 case  1<<12: op0001(sh2, opcode); break;
 100                 case  2<<12: op0010(sh2, opcode); break;
 101                 case  3<<12: op0011(sh2, opcode); break;
 102                 case  4<<12: op0100(sh2, opcode); break;
 103                 case  5<<12: op0101(sh2, opcode); break;
 104                 case  6<<12: op0110(sh2, opcode); break;
 105                 case  7<<12: op0111(sh2, opcode); break;
 106                 case  8<<12: op1000(sh2, opcode); break;
 107                 case  9<<12: op1001(sh2, opcode); break;
 108                 case 10<<12: op1010(sh2, opcode); break;
 109                 case 11<<12: op1011(sh2, opcode); break;
 110                 case 12<<12: op1100(sh2, opcode); break;
 111                 case 13<<12: op1101(sh2, opcode); break;
 112                 case 14<<12: op1110(sh2, opcode); break;
 113                 default: op1111(sh2, opcode); break;
 114                 }
 115
 116                 sh2->icount--;
 117
 118                 if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
 119                 {
 120                         int level = sh2->pending_level;
 121                         int vector = sh2->irq_callback(sh2, level);
 122                         sh2_do_irq(sh2, level, vector);
 123                         sh2->test_irq = 0;
 124                 }
 125
 126         }
 127         while (sh2->icount > 0 || sh2->delay);  /* can't interrupt before delay */
 128
 129         return sh2->cycles_timeslice - sh2->icount;
 130 }
 131
 132 #else // DRC_SH2
 133
 134 #ifdef __i386__
 135 #define REGPARM(x) __attribute__((regparm(x)))
 136 #else
 137 #define REGPARM(x)
 138 #endif
 139
 140 // drc debug
 141 void REGPARM(2) sh2_do_op(SH2 *sh2, int opcode)
 142 {
 143         sh2->pc += 2;
 144
 145         switch (opcode & ( 15 << 12))
 146         {
 147                 case  0<<12: op0000(sh2, opcode); break;
 148                 case  1<<12: op0001(sh2, opcode); break;
 149                 case  2<<12: op0010(sh2, opcode); break;
 150                 case  3<<12: op0011(sh2, opcode); break;
 151                 case  4<<12: op0100(sh2, opcode); break;
 152                 case  5<<12: op0101(sh2, opcode); break;
 153                 case  6<<12: op0110(sh2, opcode); break;
 154                 case  7<<12: op0111(sh2, opcode); break;
 155                 case  8<<12: op1000(sh2, opcode); break;
 156                 case  9<<12: op1001(sh2, opcode); break;
 157                 case 10<<12: op1010(sh2, opcode); break;
 158                 case 11<<12: op1011(sh2, opcode); break;
 159                 case 12<<12: op1100(sh2, opcode); break;
 160                 case 13<<12: op1101(sh2, opcode); break;
 161                 case 14<<12: op1110(sh2, opcode); break;
 162                 default: op1111(sh2, opcode); break;
 163         }
 164 }
 165
 166 #endif
 167
 168 #ifdef SH2_STATS
 169 #include <stdio.h>
 170 #include <string.h>
 171 #include "sh2dasm.h"
 172
 173 void sh2_dump_stats(void)
 174 {
 175         static const char *rnames[] = {
 176                 "R0", "R1", "R2",  "R3",  "R4",  "R5",  "R6",  "R7",
 177                 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "SP",
 178                 "PC", "", "PR", "SR", "GBR", "VBR", "MACH", "MACL"
 179         };
 180         long long total;
 181         char buff[64];
 182         int u, i;
 183
 184         // dump reg usage
 185         total = 0;
 186         for (i = 0; i < 24; i++)
 187                 total += sh2_stats.r[i];
 188
 189         for (i = 0; i < 24; i++) {
 190                 if (i == 16 || i == 17 || i == 19)
 191                         continue;
 192                 printf("r %6.3f%% %-4s %9d\n", (double)sh2_stats.r[i] * 100.0 / total,
 193                         rnames[i], sh2_stats.r[i]);
 194         }
 195
 196         memset(&sh2_stats, 0, sizeof(sh2_stats));
 197
 198         // dump ops
 199         printf("\n");
 200         total = 0;
 201         for (i = 0; i < 0x10000; i++)
 202                 total += op_refs[i];
 203
 204         for (u = 0; u < 16; u++) {
 205                 int max = 0, op = 0;
 206                 for (i = 0; i < 0x10000; i++) {
 207                         if (op_refs[i] > max) {
 208                                 max = op_refs[i];
 209                                 op = i;
 210                         }
 211                 }
 212                 DasmSH2(buff, 0, op);
 213                 printf("i %6.3f%% %9d %s\n", (double)op_refs[op] * 100.0 / total,
 214                         op_refs[op], buff);
 215                 op_refs[op] = 0;
 216         }
 217         memset(op_refs, 0, sizeof(op_refs));
 218 }
 219 #endif
 220