2 * Copyright (C) 2012-2023 Free Software Foundation, Inc.
4 * This file is part of GNU lightning.
6 * GNU lightning is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; either version 3, or (at your option)
11 * GNU lightning is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
14 * License for more details.
17 * Paulo Cesar Pereira de Andrade
23 #define JIT_HASH_CONSTS 0
24 #define JIT_NUM_OPERANDS 3
29 #define jit_swf_p() (jit_cpu.vfp == 0)
30 #define jit_hardfp_p() jit_cpu.abi
31 #define jit_ldrt_strt_p() jit_cpu.ldrt_strt
35 #define jit_r(i) (_R4 + (i))
37 #define jit_v(i) (_R7 + (i))
39 #define jit_f(i) (jit_cpu.abi ? _D8 + ((i)<<1) : _D0 - ((i)<<1))
41 _R12, /* ip - temporary */
45 _R4, /* r4 - variable */
46 _R5, /* r5 - variable */
47 _R6, /* r6 - variable */
51 _R7, /* r7 - variable */
52 _R8, /* r8 - variable */
53 _R9, /* r9 - variable */
54 _R10, /* sl - stack limit */
55 _R11, /* fp - frame pointer */
56 _R13, /* sp - stack pointer */
57 _R14, /* lr - link register */
58 _R15, /* pc - program counter */
59 _R3, /* r3 - argument/result */
60 _R2, /* r2 - argument/result */
61 _R1, /* r1 - argument/result */
62 _R0, /* r0 - argument/result */
63 #define JIT_F0 (jit_hardfp_p() ? _D8 : _D0)
64 #define JIT_F1 (jit_hardfp_p() ? _D9 : _D1)
65 #define JIT_F2 (jit_hardfp_p() ? _D10 : _D2)
66 #define JIT_F3 (jit_hardfp_p() ? _D11 : _D3)
67 #define JIT_F4 (jit_hardfp_p() ? _D12 : _D4)
68 #define JIT_F5 (jit_hardfp_p() ? _D13 : _D5)
69 #define JIT_F6 (jit_hardfp_p() ? _D14 : _D6)
70 #define JIT_F7 (jit_hardfp_p() ? _D15 : _D7)
71 _S16, _D8 = _S16, _Q4 = _D8,
75 _S20, _D10 = _S20, _Q5 = _D10,
79 _S24, _D12 = _S24, _Q6 = _D12,
83 _S28, _D14 = _S28, _Q7 = _D14,
90 _S12, _D6 = _S12, _Q3 = _D6,
94 _S8, _D4 = _S8, _Q2 = _D4,
98 _S4, _D2 = _S4, _Q1 = _D2,
102 _S0, _D0 = _S0, _Q0 = _D0,
104 #define JIT_NOREG _NOREG
108 jit_uint32_t version : 4;
109 /* this field originally was only used for the 'e' in armv5te.
110 * it can also be used to force hardware division, if setting
111 * version to 7, telling it is armv7r or better. */
112 jit_uint32_t extend : 1;
113 /* only generate thumb instructions for thumb2 */
114 jit_uint32_t thumb : 1;
115 jit_uint32_t vfp : 3;
116 jit_uint32_t neon : 1;
117 jit_uint32_t abi : 2;
118 /* use strt+offset instead of str.w?
119 * on special cases it causes a SIGILL at least on qemu, probably
120 * due to some memory ordering constraint not being respected, so,
121 * disable by default */
122 jit_uint32_t ldrt_strt : 1;
123 /* assume functions called never match jit instruction set?
124 * that is libc, gmp, mpfr, etc functions are in thumb mode and jit
125 * is in arm mode, or the reverse, what may cause a crash upon return
126 * of that function if generating jit for a relative jump.
128 jit_uint32_t exchange : 1;
129 /* By default assume cannot load unaligned data.
131 * Unaligned data access
132 * An ARMv7 implementation must support unaligned data accesses by
133 * some load and store instructions, as Table A3-1 shows. Software
134 * can set the SCTLR.A bit to control whether a misaligned access by
135 * one of these instructions causes an Alignment fault Data Abort
137 * Table A3-1 Alignment requirements of load/store instructions
138 * Result if check fails when
139 * Instructions Alignment check SCTLR.A is 0 SCTLR.A is 1
148 * TBH Halfword Unaligned access Alignment fault
149 * LDREXH, STREXH Halfword Alignment fault Alignment fault
151 * STR, STRT Word Unaligned access Alignment fault
152 * LDREX, STREX Word Alignment fault Alignment fault
153 * LDREXD, STREXD Doubleword Alignment fault Alignment fault
157 * STRD, SWP Word Alignment fault Alignment fault
159 * STC, STC2 Word Alignment fault Alignment fault
162 * VSTM, VSTR Word Alignment fault Alignment fault
169 * alignment (a) Element size Unaligned access Alignment fault
176 * specified (a) As specified by Alignment fault Alignment fault
179 * (a) These element and structure load/store instructions are only in
180 * the Advanced SIMD Extension to the ARMv7 ARM and Thumb instruction
181 * sets. ARMv7 does not support the pre-ARMv6 alignment model, so
182 * software cannot use that model with these instructions.
184 jit_uint32_t unaligned : 1;
185 jit_uint32_t vfp_unaligned : 1;
191 extern jit_cpu_t jit_cpu;
193 #endif /* _jit_arm_h */