2 * Copyright (C) 2012-2023 Free Software Foundation, Inc.
4 * This file is part of GNU lightning.
6 * GNU lightning is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; either version 3, or (at your option)
11 * GNU lightning is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
14 * License for more details.
17 * Paulo Cesar Pereira de Andrade
22 #if __BYTE_ORDER == __LITTLE_ENDIAN
23 struct { jit_uint32_t _:26; jit_uint32_t b : 6; } hc;
24 struct { jit_uint32_t _:21; jit_uint32_t b : 5; } rs;
25 struct { jit_uint32_t _:21; jit_uint32_t b : 5; } fm;
26 struct { jit_uint32_t _:16; jit_uint32_t b : 5; } rt;
27 struct { jit_uint32_t _:16; jit_uint32_t b : 5; } ft;
28 struct { jit_uint32_t _:11; jit_uint32_t b : 5; } rd;
29 struct { jit_uint32_t _:11; jit_uint32_t b : 5; } fs;
30 struct { jit_uint32_t _: 7; jit_uint32_t b : 9; } i9;
31 struct { jit_uint32_t _: 6; jit_uint32_t b : 5; } ic;
32 struct { jit_uint32_t _: 6; jit_uint32_t b : 5; } fd;
33 struct { jit_uint32_t b : 6; } tc;
34 struct { jit_uint32_t b : 5; } cn;
35 struct { jit_uint32_t b : 11; } cc;
36 struct { jit_uint32_t b : 16; } is;
37 struct { jit_uint32_t b : 26; } ii;
39 struct { jit_uint32_t b : 6; } hc;
40 struct { jit_uint32_t _: 6; jit_uint32_t b : 5; } rs;
41 struct { jit_uint32_t _: 6; jit_uint32_t b : 5; } fm;
42 struct { jit_uint32_t _:11; jit_uint32_t b : 5; } rt;
43 struct { jit_uint32_t _:11; jit_uint32_t b : 5; } ft;
44 struct { jit_uint32_t _:16; jit_uint32_t b : 5; } rd;
45 struct { jit_uint32_t _:16; jit_uint32_t b : 5; } fs;
46 struct { jit_uint32_t _:16; jit_uint32_t b : 9; } i9;
47 struct { jit_uint32_t _:21; jit_uint32_t b : 5; } ic;
48 struct { jit_uint32_t _:21; jit_uint32_t b : 5; } fd;
49 struct { jit_uint32_t _:26; jit_uint32_t b : 6; } tc;
50 struct { jit_uint32_t _:27; jit_uint32_t b : 5; } cn;
51 struct { jit_uint32_t _:21; jit_uint32_t b : 11; } cc;
52 struct { jit_uint32_t _:16; jit_uint32_t b : 16; } is;
53 struct { jit_uint32_t _: 6; jit_uint32_t b : 26; } ii;
57 #define jit_mips2_p() (jit_cpu.release >= 2)
58 #define jit_mips6_p() (jit_cpu.release >= 6)
59 # define _ZERO_REGNO 0
60 # define _T0_REGNO 0x08
61 # define _T1_REGNO 0x09
62 # define _T2_REGNO 0x0a
63 # define _T3_REGNO 0x0b
64 # define _T4_REGNO 0x0c
65 # define _T5_REGNO 0x0d
66 # define _T6_REGNO 0x0e
67 # define _T7_REGNO 0x0f
68 # define _S0_REGNO 0x10
69 # define _S1_REGNO 0x11
70 # define _S2_REGNO 0x12
71 # define _S3_REGNO 0x13
72 # define _S4_REGNO 0x14
73 # define _S5_REGNO 0x15
74 # define _S6_REGNO 0x16
75 # define _S7_REGNO 0x17
76 # define _T8_REGNO 0x18
77 # define _T9_REGNO 0x19
78 # define _SP_REGNO 0x1d
79 # define _BP_REGNO 0x1e
80 # define _RA_REGNO 0x1f
81 # define _F16_REGNO 16
82 # define _F18_REGNO 18
83 # define _F20_REGNO 20
84 # define _F22_REGNO 22
85 # define _F24_REGNO 24
86 # define _F26_REGNO 26
87 # define _F28_REGNO 28
88 # define _F30_REGNO 30
90 # define ldr(u,v) ldr_i(u,v)
91 # define ldi(u,v) ldi_i(u,v)
92 # define ldxi(u,v,w) ldxi_i(u,v,w)
93 # define sti(u,v) sti_i(u,v)
94 # define stxi(u,v,w) stxi_i(u,v,w)
96 # define ldr(u,v) ldr_l(u,v)
97 # define ldi(u,v) ldi_l(u,v)
98 # define ldxi(u,v,w) ldxi_l(u,v,w)
99 # define sti(u,v) sti_l(u,v)
100 # define stxi(u,v,w) stxi_l(u,v,w)
102 /* can_relative_jump_p(im) => can_sign_extend_short_p(im << 2) */
103 # define can_relative_jump_p(im) ((im) >= -130712 && (im) <= 131068)
104 # define can_sign_extend_short_p(im) ((im) >= -32678 && (im) <= 32767)
105 # define can_zero_extend_short_p(im) ((im) >= 0 && (im) <= 65535)
106 # define is_low_mask(im) (((im) & 1) ? (__builtin_popcountl((im) + 1) <= 1) : 0)
107 # define is_middle_mask(im) ((im) ? (__builtin_popcountl((im) + (1 << __builtin_ctzl(im))) <= 1) : 0)
108 # define is_high_mask(im) ((im) ? (__builtin_popcountl((im) + (1 << __builtin_ctzl(im))) == 0) : 0)
109 # define masked_bits_count(im) __builtin_popcountl(im)
110 # define unmasked_bits_count(im) (__WORDSIZE - masked_bits_count(im))
111 # if __WORDSIZE == 32
112 # define can_sign_extend_int_p(im) 1
113 # define can_zero_extend_int_p(im) 1
115 # define can_sign_extend_int_p(im) \
116 (((im) >= 0 && (im) <= 0x7fffffffL) || \
117 ((im) < 0 && (im) >= -0x80000000L))
118 # define can_zero_extend_int_p(im) ((im) >= 0 && (im) <= 0xffffffff)
120 # define MIPS_SPECIAL 0x00
121 # define MIPS_REGIMM 0x01
123 # define MIPS_SRL 0x02
124 # define MIPS_JAL 0x03
125 # define MIPS_SRA 0x03
126 # define MIPS_BEQ 0x04
127 # define MIPS_BNE 0x05
128 # define MIPS_BLEZ 0x06
129 # define MIPS_BGTZ 0x07
130 # define MIPS_ADDI 0x08
131 # define MIPS_ADDIU 0x09
132 # define MIPS_SLTI 0x0a
133 # define MIPS_SLTIU 0x0b
134 # define MIPS_ANDI 0x0c
135 # define MIPS_ORI 0x0d
136 # define MIPS_XORI 0x0e
137 # define MIPS_LUI 0x0f
138 # define MIPS_COP0 0x10
139 # define MIPS_COP1 0x11
140 # define MIPS_COP2 0x12
141 # define MIPS_COP1X 0x13
142 # define MIPS_BEQL 0x14
143 # define MIPS_BNEL 0x15
144 # define MIPS_BLEZL 0x16
145 # define MIPS_BGTZL 0x17
146 # define MIPS_DADDI 0x18
147 # define MIPS_DADDIU 0x19
148 # define MIPS_LDL 0x1a
149 # define MIPS_LDR 0x1b
150 # define MIPS_SPECIAL2 0x1c
151 # define MIPS_JALX 0x1d
152 # define MIPS_SPECIAL3 0x1f
153 # define MIPS_LB 0x20
154 # define MIPS_LH 0x21
155 # define MIPS_LWL 0x22
156 # define MIPS_LW 0x23
157 # define MIPS_LBU 0x24
158 # define MIPS_LHU 0x25
159 # define MIPS_LWR 0x26
160 # define MIPS_LWU 0x27
161 # define MIPS_SB 0x28
162 # define MIPS_SH 0x29
163 # define MIPS_SWL 0x2a
164 # define MIPS_SW 0x2b
165 # define MIPS_SWR 0x2e
166 # define MIPS_CACHE 0x2f
167 # define MIPS_LL 0x30
168 # define MIPS_LWC1 0x31
169 # define MIPS_LWC2 0x32
170 # define MIPS_PREF 0x33
171 # define MIPS_LLD 0x34
172 # define MIPS_LDC1 0x35
173 # define MIPS_LDC2 0x36
174 # define MIPS_LD 0x37
175 # define MIPS_SC 0x38
176 # define MIPS_SCD 0x3c
177 # define MIPS_SDC1 0x3d
178 # define MIPS_SDC2 0x3e
179 # define MIPS_SWC1 0x39
180 # define MIPS_SWC2 0x3a
181 # define MIPS_SD 0x3f
182 # define MIPS_MF 0x00
183 # define MIPS_DMF 0x01
184 # define MIPS_CF 0x02
185 # define MIPS_MFH 0x03
186 # define MIPS_MT 0x04
187 # define MIPS_DMT 0x05
188 # define MIPS_CT 0x06
189 # define MIPS_MTH 0x07
190 # define MIPS_BC 0x08
191 # define MIPS_BC1EQZ 0x09 /* release 6 */
192 # define MIPS_BC1NEZ 0x0d /* release 6 */
193 # define MIPS_WRPGPR 0x0e
194 # define MIPS_BGZAL 0x11
195 # define MIPS_MFMC0 0x11
196 # define MIPS_BCF 0x00
197 # define MIPS_BLTZ 0x00
198 # define MIPS_BCT 0x01
199 # define MIPS_BGEZ 0x01
200 # define MIPS_BCFL 0x02
201 # define MIPS_BLTZL 0x02
202 # define MIPS_BCTL 0x03
203 # define MIPS_BGEZL 0x03
204 # define MIPS_TGEI 0x08
205 # define MIPS_TGEIU 0x09
206 # define MIPS_TLTI 0x0a
207 # define MIPS_TLTIU 0x0b
208 # define MIPS_TEQI 0x0c
209 # define MIPS_TNEI 0x0e
210 # define MIPS_BLTZAL 0x10
211 # define MIPS_BGEZAL 0x11
212 # define MIPS_BLTZALL 0x12
213 # define MIPS_BGEZALL 0x13
214 # define MIPS_SYNCI 0x1f
215 # define MIPS_WSBH 0x02
216 # define MIPS_DBSH 0x02
217 # define MIPS_DSHD 0x05
218 # define MIPS_SEB 0x10
219 # define MIPS_SEH 0x18
220 # define MIPS_MADD 0x00
221 # define MIPS_SLL 0x00
222 # define MIPS_EXT 0x00
223 # define MIPS_DEXTM 0x01
224 # define MIPS_MADDU 0x01
225 # define MIPS_MOVFT 0x01
226 # define MIPS_TLBR 0x01
227 # define MIPS_MUL 0x02
228 # define MIPS_DEXTU 0x02
229 # define MIPS_TLBWI 0x02
230 # define MIPS_DEXT 0x03
231 # define MIPS_SLLV 0x04
232 # define MIPS_INS 0x04
233 # define MIPS_MSUB 0x04
234 # define MIPS_DINSM 0x05
235 # define MIPS_MSUBU 0x05
236 # define MIPS_SRLV 0x06
237 # define MIPS_DINSU 0x06
238 # define MIPS_TLBWR 0x06
239 # define MIPS_SRAV 0x07
240 # define MIPS_DINS 0x07
241 # define MIPS_JR 0x08
242 # define MIPS_TLBP 0x08
243 # define MIPS_JALR 0x09
244 # define MIPS_MOVZ 0x0a
245 # define MIPS_MOVN 0x0b
246 # define MIPS_SYSCALL 0x0c
247 # define MIPS_BREAK 0x0d
248 # define MIPS_PREFX 0x0f
249 # define MIPS_SYNC 0x0f
250 # define MIPS_MFHI 0x10
251 # define MIPS_MTHI 0x11
252 # define MIPS_MFLO 0x12
253 # define MIPS_MTLO 0x13
254 # define MIPS_DSLLV 0x14
255 # define MIPS_DSRLV 0x16
256 # define MIPS_DSRAV 0x17
257 # define MIPS_MULT 0x18
258 # define MIPS_ERET 0x18
259 # define MIPS_MULTU 0x19
260 # define MIPS_DIV 0x1a
261 # define MIPS_DIVU 0x1b
262 # define MIPS_DMULT 0x1c
263 # define MIPS_DMULTU 0x1d
264 # define MIPS_DDIV 0x1e
265 # define MIPS_DDIVU 0x1f
266 # define MIPS_DERET 0x1f
267 # define MIPS_ADD 0x20
268 # define MIPS_CLZ 0x20
269 # define MIPS_BSHFL 0x20
270 # define MIPS_ADDU 0x21
271 # define MIPS_CLO 0x21
272 # define MIPS_SUB 0x22
273 # define MIPS_SUBU 0x23
274 # define MIPS_AND 0x24
275 # define MIPS_DCLZ 0x24
276 # define MIPS_DBSHFL 0x24
277 # define MIPS_OR 0x25
278 # define MIPS_DCLO 0x25
279 # define MIPS_XOR 0x26
280 # define MIPS_NOR 0x27
281 # define MIPS_SLT 0x2a
282 # define MIPS_SLTU 0x2b
283 # define MIPS_DADD 0x2c
284 # define MIPS_DADDU 0x2d
285 # define MIPS_DSUB 0x2e
286 # define MIPS_DSUBU 0x2f
287 # define MIPS_TGE 0x30
288 # define MIPS_TGEU 0x31
289 # define MIPS_TLT 0x32
290 # define MIPS_TLTU 0x33
291 # define MIPS_TEQ 0x34
292 # define MIPS_TNE 0x36
293 # define MIPS_DSLL 0x38
294 # define MIPS_DSRL 0x3a
295 # define MIPS_DSRA 0x3b
296 # define MIPS_DSLL32 0x3c
297 # define MIPS_DSRL32 0x3e
298 # define MIPS_DSRA32 0x3f
299 # define MIPS_SDBPP 0x3f
300 # define ii(i) *_jit->pc.ui++ = i
301 # define instr(op) _instr(_jit, op)
302 static void _instr(jit_state_t*, jit_int32_t);
303 # define flush() _flush(_jit)
304 static void _flush(jit_state_t*);
305 # define pending() _pending(_jit)
306 static jit_int32_t _pending(jit_state_t*);
307 # define delay(op) _delay(_jit,op)
308 static void _delay(jit_state_t*,jit_int32_t);
309 # define jit_get_reg_for_delay_slot(mask, r0,r1) \
310 _jit_get_reg_for_delay_slot(_jit,mask,r0,r1)
311 static jit_int32_t _jit_get_reg_for_delay_slot(jit_state_t*,jit_int32_t,
312 jit_int32_t, jit_int32_t);
313 # define hrrrit(hc,rs,rt,rd,im,tc) _hrrrit(_jit,hc,rs,rt,rd,im,tc)
315 _hrrrit(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t,
316 jit_int32_t,jit_int32_t);
317 # define hrrr_t(hc,rs,rt,rd,tc) hrrrit(hc,rs,rt,rd,0,tc)
318 # define rrr_t(rs,rt,rd,tc) hrrr_t(0,rs,rt,rd,tc)
319 # define hrri(hc,rs,rt,im) _hrri(_jit,hc,rs,rt,im)
320 static void _hrri(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
321 # define hrri9(hc,rs,rt,i9,tc) _hrri9(_jit,hc,rs,rt,i9,tc)
322 static void _hrri9(jit_state_t*,jit_int32_t,jit_int32_t,
323 jit_int32_t,jit_int32_t,jit_int32_t);
324 # define hi(hc,im) _hi(_jit,hc,im)
325 static void _hi(jit_state_t*,jit_int32_t,jit_int32_t);
326 # define NOP(i0) instr(0)
327 # define nop(i0) _nop(_jit,i0)
328 static void _nop(jit_state_t*,jit_int32_t);
329 # define h_ri(hc,rt,im) _hrri(_jit,hc,0,rt,im)
330 # define rrit(rt,rd,im,tc) _hrrrit(_jit,0,0,rt,rd,im,tc)
331 # define LUI(rt,im) h_ri(MIPS_LUI,rt,im)
332 # define ADDU(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_ADDU)
333 # define DADDU(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_DADDU)
334 # define ADDIU(rt,rs,im) hrri(MIPS_ADDIU,rs,rt,im)
335 # define DADDIU(rt,rs,im) hrri(MIPS_DADDIU,rs,rt,im)
336 # define SUBU(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_SUBU)
337 # define DSUBU(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_DSUBU)
338 # define MUL(rd,rs,rt) hrrr_t(MIPS_SPECIAL2,rs,rt,rd,MIPS_MUL)
339 # define MULT(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_MULT)
340 # define MUL_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 24)
341 # define MUH_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 24)
342 # define MULTU(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_MULTU)
343 # define MULU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 25)
344 # define MUHU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 25)
345 # define DMULT(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_DMULT)
346 # define DMUL_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 28)
347 # define DMUH_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 28)
348 # define DMULTU(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_DMULTU)
349 # define DMULU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 29)
350 # define DMUHU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 29)
351 # define DIV(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_DIV)
352 # define DIV_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 26)
353 # define MOD_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 26)
354 # define DIVU(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_DIVU)
355 # define DIVU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 27)
356 # define MODU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 27)
357 # define DDIV(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_DDIV)
358 # define DDIV_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 30)
359 # define DMOD_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 30)
360 # define DDIVU(rs,rt) rrr_t(rs,rt,_ZERO_REGNO,MIPS_DDIVU)
361 # define DDIVU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 2, 31)
362 # define DMODU_R6(rd,rs,rt) hrrrit(MIPS_SPECIAL, rs, rt, rd, 3, 31)
363 # define SLLV(rd,rt,rs) rrr_t(rs,rt,rd,MIPS_SLLV)
364 # define SLL(rd,rt,sa) rrit(rt,rd,sa,MIPS_SLL)
365 # define DSLLV(rd,rt,rs) rrr_t(rs,rt,rd,MIPS_DSLLV)
366 # define DSLL(rd,rt,sa) rrit(rt,rd,sa,MIPS_DSLL)
367 # define DSLL32(rd,rt,sa) rrit(rt,rd,sa,MIPS_DSLL32)
368 # define SRAV(rd,rt,rs) rrr_t(rs,rt,rd,MIPS_SRAV)
369 # define SRA(rd,rt,sa) rrit(rt,rd,sa,MIPS_SRA)
370 # define SRLV(rd,rt,rs) rrr_t(rs,rt,rd,MIPS_SRLV)
371 # define SRL(rd,rt,sa) rrit(rt,rd,sa,MIPS_SRL)
372 # define DSRAV(rd,rt,rs) rrr_t(rs,rt,rd,MIPS_DSRAV)
373 # define DSRA(rd,rt,sa) rrit(rt,rd,sa,MIPS_DSRA)
374 # define DSRA32(rd,rt,sa) rrit(rt,rd,sa,MIPS_DSRA32)
375 # define DSRLV(rd,rt,rs) rrr_t(rs,rt,rd,MIPS_DSRLV)
376 # define DSRL(rd,rt,sa) rrit(rt,rd,sa,MIPS_DSRL)
377 # define DSRL32(rd,rt,sa) rrit(rt,rd,sa,MIPS_DSRL32)
378 # define INS(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,pos+size-1,pos,MIPS_INS)
379 # define DINS(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,pos+size-1,pos,MIPS_DINS)
380 # define DINSU(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,pos+size-32-1,pos-32,MIPS_DINSU)
381 # define DINSM(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,pos+size-32-1,pos,MIPS_DINSM)
382 # define EXT(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,size-1,pos,MIPS_EXT)
383 # define DEXT(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,size-1,pos,MIPS_DEXT)
384 # define DEXTU(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,size-1,pos-32,MIPS_DEXTU)
385 # define DEXTM(rt,rs,pos,size) hrrrit(MIPS_SPECIAL3,rs,rt,size-32-1,pos,MIPS_DEXTM)
386 # define ROTR(rd,rt,sa) hrrrit(MIPS_SPECIAL,1,rt,rd,sa,MIPS_SRL)
387 # define DROTR(rd,rt,sa) hrrrit(MIPS_SPECIAL,1,rt,rd,sa,MIPS_DSRL)
388 # define SYNC() rrr_t(_ZERO_REGNO,_ZERO_REGNO,_ZERO_REGNO,MIPS_SYNC)
389 # define MFHI(rd) rrr_t(_ZERO_REGNO,_ZERO_REGNO,rd,MIPS_MFHI)
390 # define MFLO(rd) rrr_t(_ZERO_REGNO,_ZERO_REGNO,rd,MIPS_MFLO)
391 # define MTHI(rs) rrr_t(rs,_ZERO_REGNO,_ZERO_REGNO,MIPS_MTHI)
392 # define MTLO(rs) rrr_t(rs,_ZERO_REGNO,_ZERO_REGNO,MIPS_MTLO)
393 # define AND(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_AND)
394 # define ANDI(rt,rs,im) hrri(MIPS_ANDI,rs,rt,im)
395 # define OR(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_OR)
396 # define ORI(rt,rs,im) hrri(MIPS_ORI,rs,rt,im)
397 # define NOR(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_NOR)
398 # define XOR(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_XOR)
399 # define XORI(rt,rs,im) hrri(MIPS_XORI,rs,rt,im)
400 # define LB(rt,of,rb) hrri(MIPS_LB,rb,rt,of)
401 # define LBU(rt,of,rb) hrri(MIPS_LBU,rb,rt,of)
402 # define LH(rt,of,rb) hrri(MIPS_LH,rb,rt,of)
403 # define LHU(rt,of,rb) hrri(MIPS_LHU,rb,rt,of)
404 # define LW(rt,of,rb) hrri(MIPS_LW,rb,rt,of)
405 # define LWU(rt,of,rb) hrri(MIPS_LWU,rb,rt,of)
406 # define LD(rt,of,rb) hrri(MIPS_LD,rb,rt,of)
407 # define LL(rt,of,rb) hrri(MIPS_LL,rb,rt,of)
408 # define LL_R6(rt,of,rb) hrri9(MIPS_SPECIAL3,rb,rt,of,54)
409 # define LLD(rt,of,rb) hrri(MIPS_LLD,rb,rt,of)
410 # define LLD_R6(rt,of,rb) hrri9(MIPS_SPECIAL3,rb,rt,of,55)
411 # define SB(rt,of,rb) hrri(MIPS_SB,rb,rt,of)
412 # define SH(rt,of,rb) hrri(MIPS_SH,rb,rt,of)
413 # define SW(rt,of,rb) hrri(MIPS_SW,rb,rt,of)
414 # define SD(rt,of,rb) hrri(MIPS_SD,rb,rt,of)
415 # define SC(rt,of,rb) hrri(MIPS_SC,rb,rt,of)
416 # define SC_R6(rt,of,rb) hrri9(MIPS_SPECIAL3,rb,rt,of,38)
417 # define SCD(rt,of,rb) hrri(MIPS_SCD,rb,rt,of)
418 # define SCD_R6(rt,of,rb) hrri9(MIPS_SPECIAL3,rb,rt,of,39)
419 # define WSBH(rd,rt) hrrrit(MIPS_SPECIAL3,0,rt,rd,MIPS_WSBH,MIPS_BSHFL)
420 # define SEB(rd,rt) hrrrit(MIPS_SPECIAL3,0,rt,rd,MIPS_SEB,MIPS_BSHFL)
421 # define SEH(rd,rt) hrrrit(MIPS_SPECIAL3,0,rt,rd,MIPS_SEH,MIPS_BSHFL)
422 # define SLT(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_SLT)
423 # define SLTU(rd,rs,rt) rrr_t(rs,rt,rd,MIPS_SLTU)
424 # define SLTI(rt,rs,im) hrri(MIPS_SLTI,rs,rt,im)
425 # define SLTIU(rt,rs,im) hrri(MIPS_SLTIU,rs,rt,im)
426 # define BLTZ(rs,im) hrri(MIPS_REGIMM,rs,MIPS_BLTZ,im)
427 # define BLEZ(rs,im) hrri(MIPS_BLEZ,rs,_ZERO_REGNO,im)
428 # define BEQ(rs,rt,im) hrri(MIPS_BEQ,rs,rt,im)
429 # define BGEZ(rs,im) hrri(MIPS_REGIMM,rs,MIPS_BGEZ,im)
430 # define BGTZ(rs,im) hrri(MIPS_BGTZ,rs,_ZERO_REGNO,im)
431 # define BNE(rs,rt,im) hrri(MIPS_BNE,rs,rt,im)
432 # define BGEZAL(rs,im) hrri(MIPS_REGIMM,rs,MIPS_BGEZAL,im)
433 # define JALR(r0) hrrrit(MIPS_SPECIAL,r0,0,_RA_REGNO,0,MIPS_JALR)
434 # if 1 /* This should work for mips r6 or older */
435 # define JR(r0) hrrrit(MIPS_SPECIAL,r0,0,0,0,MIPS_JALR)
436 # else /* This should generate an illegal instruction in mips r6 */
437 # define JR(r0) hrrrit(MIPS_SPECIAL,r0,0,0,0,MIPS_JR)
439 # define CLO_R6(rd,rs) hrrrit(MIPS_SPECIAL,rs,0,rd,1,0x11)
440 # define DCLO_R6(rd,rs) hrrrit(MIPS_SPECIAL,rs,0,rd,1,0x13)
441 # define CLZ_R6(rd,rs) hrrrit(MIPS_SPECIAL,rs,0,rd,1,0x10)
442 # define DCLZ_R6(rd,rs) hrrrit(MIPS_SPECIAL,rs,0,rd,1,0x12)
443 # define BITSWAP(rd,rt) hrrrit(MIPS_SPECIAL3,0,rt,rd,0,0x20)
444 # define DBITSWAP(rd,rt) hrrrit(MIPS_SPECIAL3,0,rt,rd,0,0x24)
445 # define CLO(rd,rs) hrrrit(MIPS_SPECIAL2,rs,rd,rd,0,MIPS_CLO)
446 # define DCLO(rd,rs) hrrrit(MIPS_SPECIAL2,rs,rd,rd,0,MIPS_DCLO)
447 # define CLZ(rd,rs) hrrrit(MIPS_SPECIAL2,rs,rd,rd,0,MIPS_CLZ)
448 # define DCLZ(rd,rs) hrrrit(MIPS_SPECIAL2,rs,rd,rd,0,MIPS_DCLZ)
449 # define J(i0) hi(MIPS_J,i0)
450 # define JAL(i0) hi(MIPS_JAL,i0)
451 # define MOVN(rd,rs,rt) hrrrit(0,rs,rt,rd,0,MIPS_MOVN)
452 # define MOVZ(rd,rs,rt) hrrrit(0,rs,rt,rd,0,MIPS_MOVZ)
453 # define SELEQZ(rd,rs,rt) hrrrit(0,rs,rt,rd,0,53)
454 # define SELNEZ(rd,rs,rt) hrrrit(0,rs,rt,rd,0,55)
455 # define comr(r0,r1) xori(r0,r1,-1)
456 # define negr(r0,r1) subr(r0,_ZERO_REGNO,r1)
457 # define bitswap(r0,r1) _bitswap(_jit, r0, r1);
458 static void _bitswap(jit_state_t*,jit_int32_t,jit_int32_t);
459 # define clor(r0, r1) _clor(_jit, r0, r1)
460 static void _clor(jit_state_t*, jit_int32_t, jit_int32_t);
461 # define clzr(r0, r1) _clzr(_jit, r0, r1)
462 static void _clzr(jit_state_t*, jit_int32_t, jit_int32_t);
463 # define ctor(r0, r1) _ctor(_jit, r0, r1)
464 static void _ctor(jit_state_t*, jit_int32_t, jit_int32_t);
465 # define ctzr(r0, r1) _ctzr(_jit, r0, r1)
466 static void _ctzr(jit_state_t*, jit_int32_t, jit_int32_t);
467 # if __WORDSIZE == 32
468 # define addr(rd,rs,rt) ADDU(rd,rs,rt)
469 # define addiu(r0,r1,i0) ADDIU(r0,r1,i0)
470 # define subr(rd,rs,rt) SUBU(rd,rs,rt)
471 # define mult(rs,rt) MULT(rs,rt)
472 # define mul_r6(rd,rs,rt) MUL_R6(rd,rs,rt)
473 # define muh_r6(rd,rs,rt) MUH_R6(rd,rs,rt)
474 # define multu(rs,rt) MULTU(rs,rt)
475 # define mulu_r6(rd,rs,rt) MULU_R6(rd,rs,rt)
476 # define muhu_r6(rd,rs,rt) MUHU_R6(rd,rs,rt)
477 # define div(rs,rt) DIV(rs,rt)
478 # define divu(rs,rt) DIVU(rs,rt)
479 # define div_r6(rd,rs,rt) DIV_R6(rd,rs,rt)
480 # define divu_r6(rd,rs,rt) DIVU_R6(rd,rs,rt)
481 # define mod_r6(rd,rs,rt) MOD_R6(rd,rs,rt)
482 # define modu_r6(rd,rs,rt) MODU_R6(rd,rs,rt)
484 # define addr(rd,rs,rt) DADDU(rd,rs,rt)
485 # define addiu(r0,r1,i0) DADDIU(r0,r1,i0)
486 # define subr(rd,rs,rt) DSUBU(rd,rs,rt)
487 # define mult(rs,rt) DMULT(rs,rt)
488 # define mul_r6(rd,rs,rt) DMUL_R6(rd,rs,rt)
489 # define muh_r6(rd,rs,rt) DMUH_R6(rd,rs,rt)
490 # define multu(rs,rt) DMULTU(rs,rt)
491 # define mulu_r6(rd,rs,rt) DMULU_R6(rd,rs,rt)
492 # define muhu_r6(rd,rs,rt) DMUHU_R6(rd,rs,rt)
493 # define div(rs,rt) DDIV(rs,rt)
494 # define divu(rs,rt) DDIVU(rs,rt)
495 # define div_r6(rd,rs,rt) DDIV_R6(rd,rs,rt)
496 # define divu_r6(rd,rs,rt) DDIVU_R6(rd,rs,rt)
497 # define mod_r6(rd,rs,rt) DMOD_R6(rd,rs,rt)
498 # define modu_r6(rd,rs,rt) DMODU_R6(rd,rs,rt)
500 # define extr(rd,rt,lsb,nb) _extr(_jit,rd,rt,lsb,nb)
501 static void _extr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
502 # define insr(rd,rt,lsb,nb) _insr(_jit,rd,rt,lsb,nb)
503 static void _insr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
504 # define addi(r0,r1,i0) _addi(_jit,r0,r1,i0)
505 static void _addi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
506 #define addcr(r0,r1,r2) _addcr(_jit,r0,r1,r2)
507 static void _addcr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
508 #define addci(r0,r1,i0) _addci(_jit,r0,r1,i0)
509 static void _addci(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
510 # define addxr(r0,r1,r2) _addxr(_jit,r0,r1,r2)
511 static void _addxr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
512 # define addxi(r0,r1,i0) _addxi(_jit,r0,r1,i0)
513 static void _addxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
514 # define subi(r0,r1,i0) _subi(_jit,r0,r1,i0)
515 static void _subi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
516 # define subcr(r0,r1,r2) _subcr(_jit,r0,r1,r2)
517 static void _subcr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
518 # define subci(r0,r1,i0) _subci(_jit,r0,r1,i0)
519 static void _subci(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
520 # define subxr(r0,r1,r2) _subxr(_jit,r0,r1,r2)
521 static void _subxr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
522 # define subxi(r0,r1,i0) _subxi(_jit,r0,r1,i0)
523 static void _subxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
524 # define rsbi(r0, r1, i0) _rsbi(_jit, r0, r1, i0)
525 static void _rsbi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
526 # define mulr(r0,r1,r2) _mulr(_jit,r0,r1,r2)
527 static void _mulr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
528 # define muli(r0,r1,i0) _muli(_jit,r0,r1,i0)
529 static void _muli(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
530 # define qmulr(r0,r1,r2,r3) iqmulr(r0,r1,r2,r3,1)
531 # define qmulr_u(r0,r1,r2,r3) iqmulr(r0,r1,r2,r3,0)
532 # define iqmulr(r0,r1,r2,r3,cc) _iqmulr(_jit,r0,r1,r2,r3,cc)
533 static void _iqmulr(jit_state_t*,jit_int32_t,jit_int32_t,
534 jit_int32_t,jit_int32_t,jit_bool_t);
535 # define qmuli(r0,r1,r2,i0) iqmuli(r0,r1,r2,i0,1)
536 # define qmuli_u(r0,r1,r2,i0) iqmuli(r0,r1,r2,i0,0)
537 # define iqmuli(r0,r1,r2,i0,cc) _iqmuli(_jit,r0,r1,r2,i0,cc)
538 static void _iqmuli(jit_state_t*,jit_int32_t,jit_int32_t,
539 jit_int32_t,jit_word_t,jit_bool_t);
540 # define divr(r0,r1,r2) _divr(_jit,r0,r1,r2)
541 static void _divr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
542 # define divi(r0,r1,i0) _divi(_jit,r0,r1,i0)
543 static void _divi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
544 # define divr_u(r0,r1,r2) _divr_u(_jit,r0,r1,r2)
545 static void _divr_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
546 # define divi_u(r0,r1,i0) _divi_u(_jit,r0,r1,i0)
547 static void _divi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
548 # define qdivr(r0,r1,r2,r3) iqdivr(r0,r1,r2,r3,1)
549 # define qdivr_u(r0,r1,r2,r3) iqdivr(r0,r1,r2,r3,0)
550 # define iqdivr(r0,r1,r2,r3,cc) _iqdivr(_jit,r0,r1,r2,r3,cc)
551 static void _iqdivr(jit_state_t*,jit_int32_t,jit_int32_t,
552 jit_int32_t,jit_int32_t,jit_bool_t);
553 # define qdivi(r0,r1,r2,i0) iqdivi(r0,r1,r2,i0,1)
554 # define qdivi_u(r0,r1,r2,i0) iqdivi(r0,r1,r2,i0,0)
555 # define iqdivi(r0,r1,r2,i0,cc) _iqdivi(_jit,r0,r1,r2,i0,cc)
556 static void _iqdivi(jit_state_t*,jit_int32_t,jit_int32_t,
557 jit_int32_t,jit_word_t,jit_bool_t);
558 # define remr(r0,r1,r2) _remr(_jit,r0,r1,r2)
559 static void _remr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
560 # define remi(r0,r1,i0) _remi(_jit,r0,r1,i0)
561 static void _remi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
562 # define remr_u(r0,r1,r2) _remr_u(_jit,r0,r1,r2)
563 static void _remr_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
564 # define remi_u(r0,r1,i0) _remi_u(_jit,r0,r1,i0)
565 static void _remi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
566 # if __WORDSIZE == 32
567 # define lshr(r0,r1,r2) SLLV(r0,r1,r2)
568 # define lshi(r0,r1,i0) SLL(r0,r1,i0)
569 # define rshr(r0,r1,r2) SRAV(r0,r1,r2)
570 # define rshi(r0,r1,i0) SRA(r0,r1,i0)
571 # define rshr_u(r0,r1,r2) SRLV(r0,r1,r2)
572 # define rshi_u(r0,r1,i0) SRL(r0,r1,i0)
574 # define lshr(r0,r1,r2) DSLLV(r0,r1,r2)
575 # define lshi(r0,r1,i0) _lshi(_jit,r0,r1,i0)
576 static void _lshi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
577 # define rshr(r0,r1,r2) DSRAV(r0,r1,r2)
578 # define rshi(r0,r1,i0) _rshi(_jit,r0,r1,i0)
579 static void _rshi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
580 # define rshr_u(r0,r1,r2) DSRLV(r0,r1,r2)
581 # define rshi_u(r0,r1,i0) _rshi_u(_jit,r0,r1,i0)
582 static void _rshi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
584 # define andr(r0,r1,r2) AND(r0,r1,r2)
585 # define andi(r0,r1,i0) _andi(_jit,r0,r1,i0)
586 static void _andi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
587 # define orr(r0,r1,r2) OR(r0,r1,r2)
588 # define ori(r0,r1,i0) _ori(_jit,r0,r1,i0)
589 static void _ori(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
590 # define xorr(r0,r1,r2) XOR(r0,r1,r2)
591 # define xori(r0,r1,i0) _xori(_jit,r0,r1,i0)
592 static void _xori(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
593 # define movr(r0,r1) _movr(_jit,r0,r1)
594 static void _movr(jit_state_t*,jit_int32_t,jit_int32_t);
595 # define movi(r0,i0) _movi(_jit,r0,i0)
596 static void _movi(jit_state_t*,jit_int32_t,jit_word_t);
597 # define movi_p(r0,i0) _movi_p(_jit,r0,i0)
598 static jit_word_t _movi_p(jit_state_t*,jit_int32_t,jit_word_t);
599 # define movnr(r0, r1, r2) _movnr(_jit, r0, r1, r2)
600 static void _movnr(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
601 # define movzr(r0, r1, r2) _movzr(_jit, r0, r1, r2)
602 static void _movzr(jit_state_t*, jit_int32_t, jit_int32_t, jit_int32_t);
603 # define casx(r0, r1, r2, r3, i0) _casx(_jit, r0, r1, r2, r3, i0)
604 static void _casx(jit_state_t *_jit,jit_int32_t,jit_int32_t,
605 jit_int32_t,jit_int32_t,jit_word_t);
606 #define casr(r0, r1, r2, r3) casx(r0, r1, r2, r3, 0)
607 #define casi(r0, i0, r1, r2) casx(r0, _NOREG, r1, r2, i0)
608 # define ldr_c(r0,r1) LB(r0,0,r1)
609 # define ldi_c(r0,i0) _ldi_c(_jit,r0,i0)
610 static void _ldi_c(jit_state_t*,jit_int32_t,jit_word_t);
611 # define ldr_uc(r0,r1) LBU(r0,0,r1)
612 # define ldi_uc(r0,i0) _ldi_uc(_jit,r0,i0)
613 static void _ldi_uc(jit_state_t*,jit_int32_t,jit_word_t);
614 # define ldr_s(r0,r1) LH(r0,0,r1)
615 # define ldi_s(r0,i0) _ldi_s(_jit,r0,i0)
616 static void _ldi_s(jit_state_t*,jit_int32_t,jit_word_t);
617 # define ldr_us(r0,r1) LHU(r0,0,r1)
618 # define ldi_us(r0,i0) _ldi_us(_jit,r0,i0)
619 static void _ldi_us(jit_state_t*,jit_int32_t,jit_word_t);
620 # define ldr_i(r0,r1) LW(r0,0,r1)
621 # define ldi_i(r0,i0) _ldi_i(_jit,r0,i0)
622 static void _ldi_i(jit_state_t*,jit_int32_t,jit_word_t);
623 # if __WORDSIZE == 64
624 # define ldr_ui(r0,r1) LWU(r0,0,r1)
625 # define ldi_ui(r0,i0) _ldi_ui(_jit,r0,i0)
626 static void _ldi_ui(jit_state_t*,jit_int32_t,jit_word_t);
627 # define ldr_l(r0,r1) LD(r0,0,r1)
628 # define ldi_l(r0,i0) _ldi_l(_jit,r0,i0)
629 static void _ldi_l(jit_state_t*,jit_int32_t,jit_word_t);
631 # define ldxr_c(r0,r1,r2) _ldxr_c(_jit,r0,r1,r2)
632 static void _ldxr_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
633 # define ldxi_c(r0,r1,i0) _ldxi_c(_jit,r0,r1,i0)
634 static void _ldxi_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
635 # define ldxr_uc(r0,r1,r2) _ldxr_uc(_jit,r0,r1,r2)
636 static void _ldxr_uc(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
637 # define ldxi_uc(r0,r1,i0) _ldxi_uc(_jit,r0,r1,i0)
638 static void _ldxi_uc(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
639 # define ldxr_s(r0,r1,r2) _ldxr_s(_jit,r0,r1,r2)
640 static void _ldxr_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
641 # define ldxi_s(r0,r1,i0) _ldxi_s(_jit,r0,r1,i0)
642 static void _ldxi_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
643 # define ldxr_us(r0,r1,r2) _ldxr_us(_jit,r0,r1,r2)
644 static void _ldxr_us(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
645 # define ldxi_us(r0,r1,i0) _ldxi_us(_jit,r0,r1,i0)
646 static void _ldxi_us(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
647 # define ldxr_i(r0,r1,r2) _ldxr_i(_jit,r0,r1,r2)
648 static void _ldxr_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
649 # define ldxi_i(r0,r1,i0) _ldxi_i(_jit,r0,r1,i0)
650 static void _ldxi_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
651 # if __WORDSIZE == 64
652 # define ldxr_ui(r0,r1,r2) _ldxr_ui(_jit,r0,r1,r2)
653 static void _ldxr_ui(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
654 # define ldxi_ui(r0,r1,i0) _ldxi_ui(_jit,r0,r1,i0)
655 static void _ldxi_ui(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
656 # define ldxr_l(r0,r1,r2) _ldxr_l(_jit,r0,r1,r2)
657 static void _ldxr_l(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
658 # define ldxi_l(r0,r1,i0) _ldxi_l(_jit,r0,r1,i0)
659 static void _ldxi_l(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
661 # define str_c(r0,r1) SB(r1,0,r0)
662 # define sti_c(i0,r0) _sti_c(_jit,i0,r0)
663 static void _sti_c(jit_state_t*,jit_word_t,jit_int32_t);
664 # define str_s(r0,r1) SH(r1,0,r0)
665 # define sti_s(i0,r0) _sti_s(_jit,i0,r0)
666 static void _sti_s(jit_state_t*,jit_word_t,jit_int32_t);
667 # define str_i(r0,r1) SW(r1,0,r0)
668 # define sti_i(i0,r0) _sti_i(_jit,i0,r0)
669 static void _sti_i(jit_state_t*,jit_word_t,jit_int32_t);
670 # if __WORDSIZE == 64
671 # define str_l(r0,r1) SD(r1,0,r0)
672 # define sti_l(i0,r0) _sti_l(_jit,i0,r0)
673 static void _sti_l(jit_state_t*,jit_word_t,jit_int32_t);
675 # define stxr_c(r0,r1,r2) _stxr_c(_jit,r0,r1,r2)
676 static void _stxr_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
677 # define stxi_c(i0,r0,r1) _stxi_c(_jit,i0,r0,r1)
678 static void _stxi_c(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
679 # define stxr_s(r0,r1,r2) _stxr_s(_jit,r0,r1,r2)
680 static void _stxr_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
681 # define stxi_s(i0,r0,r1) _stxi_s(_jit,i0,r0,r1)
682 static void _stxi_s(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
683 # define stxr_i(r0,r1,r2) _stxr_i(_jit,r0,r1,r2)
684 static void _stxr_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
685 # define stxi_i(i0,r0,r1) _stxi_i(_jit,i0,r0,r1)
686 static void _stxi_i(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
687 # if __WORDSIZE == 64
688 # define stxr_l(r0,r1,r2) _stxr_l(_jit,r0,r1,r2)
689 static void _stxr_l(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
690 # define stxi_l(i0,r0,r1) _stxi_l(_jit,i0,r0,r1)
691 static void _stxi_l(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
693 # define bswapr_us(r0,r1) _bswapr_us(_jit,r0,r1)
694 static void _bswapr_us(jit_state_t*,jit_int32_t,jit_int32_t);
695 # define bswapr_ui(r0,r1) _bswapr_ui(_jit,r0,r1)
696 static void _bswapr_ui(jit_state_t*,jit_int32_t,jit_int32_t);
697 # if __WORDSIZE == 64
698 # define bswapr_ul(r0,r1) generic_bswapr_ul(_jit,r0,r1)
700 # define extr_c(r0,r1) _extr_c(_jit,r0,r1)
701 static void _extr_c(jit_state_t*,jit_int32_t,jit_int32_t);
702 # define extr_uc(r0,r1) ANDI(r0,r1,0xff)
703 # define extr_s(r0,r1) _extr_s(_jit,r0,r1)
704 static void _extr_s(jit_state_t*,jit_int32_t,jit_int32_t);
705 # define extr_us(r0,r1) ANDI(r0,r1,0xffff)
706 # if __WORDSIZE == 64
707 # define extr_i(r0,r1) SLL(r0,r1,0)
708 # define extr_ui(r0,r1) _extr_ui(_jit,r0,r1)
709 static void _extr_ui(jit_state_t*,jit_int32_t,jit_int32_t);
711 # define ltr(r0,r1,r2) SLT(r0,r1,r2)
712 # define lti(r0,r1,i0) _lti(_jit,r0,r1,i0)
713 static void _lti(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
714 # define ltr_u(r0,r1,r2) SLTU(r0,r1,r2)
715 # define lti_u(r0,r1,i0) _lti_u(_jit,r0,r1,i0)
716 static void _lti_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
717 #define ler(r0,r1,r2) _ler(_jit,r0,r1,r2)
718 static void _ler(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
719 #define lei(r0,r1,i0) _lei(_jit,r0,r1,i0)
720 static void _lei(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
721 #define ler_u(r0,r1,r2) _ler_u(_jit,r0,r1,r2)
722 static void _ler_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
723 #define lei_u(r0,r1,i0) _lei_u(_jit,r0,r1,i0)
724 static void _lei_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
725 #define eqr(r0,r1,r2) _eqr(_jit,r0,r1,r2)
726 static void _eqr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
727 #define eqi(r0,r1,i0) _eqi(_jit,r0,r1,i0)
728 static void _eqi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
729 #define ger(r0,r1,r2) _ger(_jit,r0,r1,r2)
730 static void _ger(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
731 #define gei(r0,r1,i0) _gei(_jit,r0,r1,i0)
732 static void _gei(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
733 #define ger_u(r0,r1,i0) _ger_u(_jit,r0,r1,i0)
734 static void _ger_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
735 #define gei_u(r0,r1,i0) _gei_u(_jit,r0,r1,i0)
736 static void _gei_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
737 # define gtr(r0,r1,r2) SLT(r0,r2,r1)
738 #define gti(r0,r1,i0) _gti(_jit,r0,r1,i0)
739 static void _gti(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
740 # define gtr_u(r0,r1,r2) SLTU(r0,r2,r1)
741 # define gti_u(r0,r1,i0) _gti_u(_jit,r0,r1,i0)
742 static void _gti_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
743 #define ner(r0,r1,r2) _ner(_jit,r0,r1,r2)
744 static void _ner(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
745 #define nei(r0,r1,i0) _nei(_jit,r0,r1,i0)
746 static void _nei(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
747 #define bltr(i0,r0,r1) bger(i0,r1,r0)
748 #define bltr_u(i0,r0,r1) bger_u(i0,r1,r0)
749 #define blti(i0,r0,i1) _bgei(_jit,i0,r0,i1,0,1)
750 #define blti_u(i0,r0,i1) _bgei(_jit,i0,r0,i1,1,1)
751 #define bler(i0,r0,r1) _bgtr(_jit,i0,r1,r0,0,1)
752 #define bler_u(i0,r0,r1) _bgtr(_jit,i0,r1,r0,1,1)
753 #define blei(i0,r0,i1) _bgti(_jit,i0,r0,i1,0,1)
754 #define blei_u(i0,r0,i1) _bgti(_jit,i0,r0,i1,1,1)
755 #define beqr(i0,r0,r1) _beqr(_jit,i0,r0,r1)
756 static jit_word_t _beqr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
757 #define beqi(i0,r0,i1) _beqi(_jit,i0,r0,i1)
758 static jit_word_t _beqi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
759 #define bger(i0,r0,r1) _bger(_jit,i0,r0,r1,0)
760 #define bger_u(i0,r0,r1) _bger(_jit,i0,r0,r1,1)
761 static jit_word_t _bger(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t,
763 #define bgei(i0,r0,i1) _bgei(_jit,i0,r0,i1,0,0)
764 #define bgei_u(i0,r0,i1) _bgei(_jit,i0,r0,i1,1,0)
765 static jit_word_t _bgei(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t,
766 jit_bool_t,jit_bool_t);
767 #define bgtr(i0,r0,r1) _bgtr(_jit,i0,r0,r1,0,0)
768 #define bgtr_u(i0,r0,r1) _bgtr(_jit,i0,r0,r1,1,0)
769 static jit_word_t _bgtr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t,
770 jit_bool_t,jit_bool_t);
771 #define bgti(i0,r0,i1) _bgti(_jit,i0,r0,i1,0,0)
772 #define bgti_u(i0,r0,i1) _bgti(_jit,i0,r0,i1,1,0)
773 static jit_word_t _bgti(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t,
774 jit_bool_t,jit_bool_t);
775 #define bner(i0,r0,r1) _bner(_jit,i0,r0,r1)
776 static jit_word_t _bner(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
777 #define bnei(i0,r0,i1) _bnei(_jit,i0,r0,i1)
778 static jit_word_t _bnei(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
779 # define jmpr(r0) _jmpr(_jit,r0)
780 static void _jmpr(jit_state_t*,jit_int32_t);
781 # define jmpi(i0,patch) _jmpi(_jit,i0,patch)
782 static jit_word_t _jmpi(jit_state_t*,jit_word_t,jit_bool_t);
783 # define jmpi_p(i0) _jmpi_p(_jit,i0)
784 static jit_word_t _jmpi_p(jit_state_t*,jit_word_t);
785 # define boaddr(i0,r0,r1) _boaddr(_jit,i0,r0,r1)
786 static jit_word_t _boaddr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
787 # define boaddi(i0,r0,i1) _boaddi(_jit,i0,r0,i1)
788 static jit_word_t _boaddi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
789 # define boaddr_u(i0,r0,r1) _boaddr_u(_jit,i0,r0,r1)
790 static jit_word_t _boaddr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
791 # define boaddi_u(i0,r0,i1) _boaddi_u(_jit,i0,r0,i1)
792 static jit_word_t _boaddi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
793 # define bxaddr(i0,r0,r1) _bxaddr(_jit,i0,r0,r1)
794 static jit_word_t _bxaddr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
795 # define bxaddi(i0,r0,i1) _bxaddi(_jit,i0,r0,i1)
796 static jit_word_t _bxaddi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
797 # define bxaddr_u(i0,r0,r1) _bxaddr_u(_jit,i0,r0,r1)
798 static jit_word_t _bxaddr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
799 # define bxaddi_u(i0,r0,i1) _bxaddi_u(_jit,i0,r0,i1)
800 static jit_word_t _bxaddi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
801 # define bosubr(i0,r0,r1) _bosubr(_jit,i0,r0,r1)
802 static jit_word_t _bosubr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
803 # define bosubi(i0,r0,i1) _bosubi(_jit,i0,r0,i1)
804 static jit_word_t _bosubi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
805 # define bosubr_u(i0,r0,r1) _bosubr_u(_jit,i0,r0,r1)
806 static jit_word_t _bosubr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
807 # define bosubi_u(i0,r0,i1) _bosubi_u(_jit,i0,r0,i1)
808 static jit_word_t _bosubi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
809 # define bxsubr(i0,r0,r1) _bxsubr(_jit,i0,r0,r1)
810 static jit_word_t _bxsubr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
811 # define bxsubi(i0,r0,i1) _bxsubi(_jit,i0,r0,i1)
812 static jit_word_t _bxsubi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
813 # define bxsubr_u(i0,r0,r1) _bxsubr_u(_jit,i0,r0,r1)
814 static jit_word_t _bxsubr_u(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
815 # define bxsubi_u(i0,r0,i1) _bxsubi_u(_jit,i0,r0,i1)
816 static jit_word_t _bxsubi_u(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
817 # define bmsr(i0,r0,r1) _bmsr(_jit,i0,r0,r1)
818 static jit_word_t _bmsr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
819 # define bmsi(i0,r0,i1) _bmsi(_jit,i0,r0,i1)
820 static jit_word_t _bmsi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
821 # define bmcr(i0,r0,r1) _bmcr(_jit,i0,r0,r1)
822 static jit_word_t _bmcr(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
823 # define bmci(i0,r0,i1) _bmci(_jit,i0,r0,i1)
824 static jit_word_t _bmci(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
825 # define callr(r0) _callr(_jit,r0)
826 static void _callr(jit_state_t*,jit_int32_t);
827 # define calli(i0,i1) _calli(_jit,i0,i1)
828 static jit_word_t _calli(jit_state_t*,jit_word_t,jit_bool_t);
829 # define calli_p(i0) _calli_p(_jit,i0)
830 static jit_word_t _calli_p(jit_state_t*,jit_word_t);
831 # define prolog(node) _prolog(_jit,node)
832 static void _prolog(jit_state_t*,jit_node_t*);
833 # define epilog(node) _epilog(_jit,node)
834 static void _epilog(jit_state_t*,jit_node_t*);
835 # define vastart(r0) _vastart(_jit, r0)
836 static void _vastart(jit_state_t*, jit_int32_t);
837 # define vaarg(r0, r1) _vaarg(_jit, r0, r1)
838 static void _vaarg(jit_state_t*, jit_int32_t, jit_int32_t);
839 #define patch_abs(instr,label) _patch_abs(_jit,instr,label)
840 static void _patch_abs(jit_state_t*,jit_word_t,jit_word_t);
841 #define patch_at(jump,label) _patch_at(_jit,jump,label)
842 static void _patch_at(jit_state_t*,jit_word_t,jit_word_t);
843 /* definitions used by jit_get_reg_for_delay_slot() */
844 #include "jit_mips-fpu.c"
849 _instr(jit_state_t *_jit, jit_int32_t op)
851 if (_jitc->inst.pend)
854 _jitc->inst.pend = 1;
859 _flush(jit_state_t *_jit)
861 if (_jitc->inst.pend) {
863 _jitc->inst.pend = 0;
868 _pending(jit_state_t *_jit)
871 if (_jitc->inst.pend) {
873 _jitc->inst.pend = 0;
881 _delay(jit_state_t *_jit, jit_int32_t op)
883 assert(_jitc->inst.pend);
885 _jitc->inst.pend = 0;
890 _jit_get_reg_for_delay_slot(jit_state_t *_jit, jit_int32_t mask,
891 jit_int32_t reg0, jit_int32_t reg1)
894 jit_int32_t reg, r0, r1, r2, regs[3];
895 /* If will emit a pending instruction */
896 if (_jitc->inst.pend)
897 i.op = _jitc->inst.op;
898 /* Else if at least one instruction emited, check it */
899 else if (_jit->pc.uc > _jit->code.ptr)
900 i.op = _jit->pc.ui[-1];
904 regs[0] = regs[1] = regs[2] = -1;
906 case MIPS_SPECIAL: /* 00 */
908 case MIPS_SLLV: /* 04 */
909 case MIPS_SRLV: /* 06 */
910 case MIPS_SRAV: /* 07 */
911 case MIPS_DSLLV: /* 14 */
912 case MIPS_DSRLV: /* 16 */
913 case MIPS_DSRAV: /* 17 */
914 case MIPS_ADDU: /* 21 */
915 case MIPS_SUBU: /* 23 */
916 case MIPS_AND: /* 24 */
917 case MIPS_OR: /* 25 */
918 case MIPS_XOR: /* 26 */
919 case MIPS_NOR: /* 27 */
920 case MIPS_SLT: /* 2a */
921 case MIPS_SLTU: /* 2b */
922 case MIPS_DADDU: /* 2d */
923 case MIPS_DSUBU: /* 2f */
924 if (mask & jit_class_gpr) {
931 case MIPS_MULT: /* 18 */
933 case MIPS_MULTU: /* 19 */
935 case MIPS_DIV: /* 1a */
937 case MIPS_DIVU: /* 1b */
939 case MIPS_DMULT: /* 1c */
941 case MIPS_DMULTU: /* 1d */
943 case MIPS_DDIV: /* 1e */
945 case MIPS_DDIVU: /* 1f */
947 assert(i.ic.b == 2 || i.ic.b == 3);
948 if (mask & jit_class_gpr) {
956 if (mask & jit_class_gpr) {
964 case MIPS_MFHI: /* 10 */
966 case MIPS_MTHI: /* 11 */
968 case MIPS_MFLO: /* 12 */
970 case MIPS_MTLO: /* 13 */
971 if (mask & jit_class_gpr) {
977 assert(!i.rs.b && !i.rt.b);
984 case MIPS_JR: /* 08 */
985 assert(!jit_mips6_p());
986 case MIPS_JALR: /* 09 */
987 /* check for proper/known encondig */
989 if (mask & jit_class_gpr) {
995 case MIPS_SLL: /* 00 */
996 case MIPS_SRL: /* 02 */
997 case MIPS_SRA: /* 03 */
998 case MIPS_DSLL: /* 38 */
999 case MIPS_DSRL: /* 3a */
1000 case MIPS_DSRA: /* 3b */
1001 case MIPS_DSLL32: /* 3c */
1002 case MIPS_DSRA32: /* 3f */
1003 case MIPS_DSRL32: /* 3e */
1004 /* shift (or rotate if i.rs.b == 1) */
1005 assert(i.rs.b == 0 || i.rs.b == 1);
1006 if (mask & jit_class_gpr) {
1012 case MIPS_SYNC: /* 0f */
1013 assert(i.rs.b == 0 && i.rt.b == 0 && i.rd.b == 0);
1014 if (mask & jit_class_gpr)
1015 regs[0] = regs[1] = regs[1] = 0;
1017 case MIPS_MOVZ: /* 0a */
1018 case MIPS_MOVN: /* 0b */
1019 assert(!jit_mips6_p() && i.ic.b == 0);
1020 if (mask & jit_class_gpr) {
1030 assert(jit_mips6_p() && i.ic.b == 0);
1031 if (mask & jit_class_gpr) {
1041 case MIPS_REGIMM: /* 01 */
1043 case MIPS_BLTZ: /* 00 */
1044 case MIPS_BGEZ: /* 01 */
1045 case MIPS_BGEZAL: /* 11 */
1050 if (mask & jit_class_gpr) {
1052 regs[1] = regs[2] = 0;
1055 case MIPS_J: /* 02 */
1056 case MIPS_JAL: /* 03 */
1057 if (mask & jit_class_gpr)
1058 regs[0] = regs[1] = regs[2] = 0;
1060 case MIPS_LUI: /* 0f */
1061 assert(i.rs.b == 0);
1062 if (mask & jit_class_gpr) {
1064 regs[1] = regs[1] = 0;
1067 case MIPS_SPECIAL2: /* 1c */
1069 case MIPS_CLZ: /* 20 */
1070 case MIPS_CLO: /* 21 */
1071 case MIPS_DCLZ: /* 24 */
1072 case MIPS_DCLO: /* 25 */
1073 assert(!jit_mips6_p() && i.rt.b == i.rd.b && i.ic.b == 0);
1074 if (mask & jit_class_gpr) {
1080 case MIPS_MUL: /* 02 */
1081 assert(jit_mips2_p() && i.ic.b == 0);
1082 if (mask & jit_class_gpr) {
1092 case MIPS_SPECIAL3: /* 1f */
1094 case MIPS_EXT: /* 00 */
1095 case MIPS_DEXTM: /* 01 */
1096 case MIPS_DEXTU: /* 02 */
1097 case MIPS_DEXT: /* 03 */
1098 case MIPS_INS: /* 04 */
1099 case MIPS_DINSM: /* 05 */
1100 case MIPS_DINSU: /* 06 */
1101 case MIPS_DINS: /* 07 */
1102 if (mask & jit_class_gpr) {
1109 case MIPS_BSHFL: /* 20 */
1111 case MIPS_DBSHFL: /* 24 */
1113 case MIPS_WSBH: /* 02 */
1114 case MIPS_SEB: /* 10 */
1115 case MIPS_SEH: /* 18 */
1116 if (mask & jit_class_gpr) {
1122 /* BITSWAP DBITSWAP */
1124 assert(jit_mips6_p() && i.rt.b == 0);
1125 if (mask & jit_class_gpr) {
1143 assert(jit_mips6_p());
1144 if (mask & jit_class_gpr) {
1154 case MIPS_COP1: /* 11 */
1156 case MIPS_ADD_fmt: /* 00 */
1158 case MIPS_MF: /* 00 */
1159 case MIPS_DMF: /* 01 */
1160 case MIPS_MFH: /* 03 */
1161 case MIPS_MT: /* 04 */
1162 case MIPS_DMT: /* 05 */
1163 case MIPS_MTH: /* 07 */
1164 assert(i.ic.b == 0);
1165 if (mask & jit_class_gpr) {
1167 regs[1] = regs[2] = 0;
1176 case MIPS_SUB_fmt: /* 01 */
1177 case MIPS_MUL_fmt: /* 02 */
1178 case MIPS_DIV_fmt: /* 03 */
1181 assert(i.rs.b == MIPS_fmt_S ||
1183 i.rs.b == MIPS_fmt_D);
1184 if (mask & jit_class_gpr)
1185 regs[0] = regs[1] = regs[2] = 0;
1192 case MIPS_SQRT_fmt: /* 04 */
1193 case MIPS_ABS_fmt: /* 05 */
1194 case MIPS_MOV_fmt: /* 06 */
1195 case MIPS_NEG_fmt: /* 07 */
1196 assert((i.rs.b == MIPS_fmt_S || i.rs.b == MIPS_fmt_D) &&
1198 if (mask & jit_class_gpr)
1199 regs[0] = regs[1] = regs[2] = 0;
1205 case MIPS_CVT_fmt_S: /* 20 */
1206 case MIPS_CVT_fmt_D: /* 21 */
1207 case MIPS_CVT_fmt_W: /* 24 */
1208 case MIPS_CVT_fmt_L: /* 25 */
1210 case MIPS_fmt_S:/* 10 */
1211 case MIPS_fmt_D:/* 11 */
1212 case MIPS_fmt_W:/* 14 */
1213 case MIPS_fmt_L:/* 15 */
1218 assert(i.rt.b == 0);
1219 if (mask & jit_class_gpr)
1220 regs[0] = regs[1] = regs[2] = 0;
1226 case MIPS_cond_F: /* 30 */
1227 case MIPS_cond_UN: /* 31 */
1228 case MIPS_cond_EQ: /* 32 */
1229 case MIPS_cond_UEQ: /* 33 */
1230 case MIPS_cond_OLT: /* 34 */
1231 case MIPS_cond_ULT: /* 35 */
1232 case MIPS_cond_OLE: /* 36 */
1233 case MIPS_cond_ULE: /* 37 */
1234 case MIPS_cond_SF: /* 38 */
1235 case MIPS_cond_NGLE: /* 39 */
1236 case MIPS_cond_SEQ: /* 3a */
1237 case MIPS_cond_NGL: /* 3b */
1238 case MIPS_cond_LT: /* 3c */
1239 case MIPS_cond_NGE: /* 3d */
1240 case MIPS_cond_LE: /* 3e */
1241 case MIPS_cond_UGT: /* 3f */
1242 assert(!jit_mips6_p() &&
1244 (i.fm.b == MIPS_fmt_S ||
1246 i.fm.b == MIPS_fmt_D));
1247 if (mask & jit_class_gpr)
1248 regs[0] = regs[1] = regs[2] = 0;
1256 case MIPS_cmp_AF: /* 00 */
1257 case MIPS_cmp_UN: /* 01 */
1258 case MIPS_cmp_EQ: /* 02 */
1259 case MIPS_cmp_UEQ: /* 03 */
1260 case MIPS_cmp_LT: /* 04 */
1261 case MIPS_cmp_ULT: /* 05 */
1262 case MIPS_cmp_LE: /* 06 */
1263 case MIPS_cmp_ULE: /* 07 */
1264 case MIPS_cmp_SAF: /* 08 */
1265 case MIPS_cmp_SUN: /* 09 */
1266 case MIPS_cmp_SEQ: /* 0a */
1267 case MIPS_cmp_SUEQ:/* 0b */
1268 case MIPS_cmp_SLT: /* 0c */
1269 case MIPS_cmp_SULT:/* 0d */
1270 case MIPS_cmp_SLE: /* 0e */
1271 case MIPS_cmp_SULE:/* 0f */
1272 assert(jit_mips6_p() &&
1274 (i.rs.b == MIPS_condn_S ||
1276 i.rs.b == MIPS_condn_D));
1277 if (mask & jit_class_gpr)
1278 regs[0] = regs[1] = regs[2] = 0;
1289 case MIPS_BC: /* 08 */
1290 assert(!jit_mips6_p() &&
1292 (i.rs.b == MIPS_BCF ||
1294 i.rs.b == MIPS_BCT));
1295 if (mask & jit_class_gpr)
1296 regs[0] = regs[1] = regs[2] = 0;
1302 case MIPS_BC1EQZ:/* 09 */
1303 case MIPS_BC1NEZ:/* 0a */
1304 assert(jit_mips6_p());
1305 if (mask & jit_class_gpr)
1306 regs[0] = regs[1] = regs[2] = 0;
1316 case MIPS_ADDIU: /* 09 */
1317 case MIPS_SLTI: /* 0a */
1318 case MIPS_SLTIU: /* 0b */
1319 case MIPS_ANDI: /* 0c */
1320 case MIPS_ORI: /* 0d */
1321 case MIPS_XORI: /* 0e */
1322 case MIPS_DADDIU: /* 18 */
1323 case MIPS_LB: /* 20 */
1324 case MIPS_LH: /* 21 */
1325 case MIPS_LW: /* 23 */
1326 case MIPS_LBU: /* 24 */
1327 case MIPS_LHU: /* 25 */
1328 case MIPS_LWU: /* 27 */
1329 case MIPS_SB: /* 28 */
1330 case MIPS_SH: // 29 */
1331 case MIPS_SW: /* 2b */
1332 case MIPS_LD: /* 37 */
1333 case MIPS_SD: /* 3f */
1334 if (mask & jit_class_gpr) {
1340 case MIPS_LL: /* 30 */
1341 case MIPS_LLD: /* 34 */
1342 case MIPS_SC: /* 38 */
1343 case MIPS_SCD: /* 3c */
1344 assert(!jit_mips6_p() && i.ic.b == 0);
1345 if (mask & jit_class_gpr) {
1351 case MIPS_BLEZ: /* 06 */
1352 case MIPS_BGTZ: /* 07 */
1353 assert(i.rt.b == 0);
1354 if (mask & jit_class_gpr) {
1356 regs[1] = regs[2] = 0;
1359 case MIPS_BEQ: /* 04 */
1360 case MIPS_BNE: /* 05 */
1361 assert(i.rt.b == 0);
1362 case MIPS_LWC1: /* 31 */
1363 case MIPS_LDC1: /* 35 */
1364 case MIPS_SWC1: /* 39 */
1365 case MIPS_SDC1: /* 3d */
1366 if (mask & jit_class_gpr) {
1378 /* If cannot move instruction do delay slot */
1379 if (_jitc->inst.pend &&
1380 (((mask & jit_class_fpr) || reg0) &&
1381 (reg0 == regs[0] || reg0 == regs[1] || reg0 == regs[2])) ||
1382 (((mask & jit_class_fpr) || reg1) &&
1383 (reg1 == regs[0] || reg1 == regs[1] || reg1 == regs[2]))) {
1386 /* Get a temporary register */
1388 reg = jit_get_reg(mask|jit_class_nospill);
1389 /* Make sure will not use a register in use by delay slot */
1390 if (_jitc->inst.pend) {
1391 if (rn(reg) == regs[0] ||
1392 rn(reg) == regs[1] || rn(reg) == regs[2]) {
1394 reg = jit_get_reg(mask|jit_class_nospill);
1395 if (rn(reg) == regs[0] ||
1396 rn(reg) == regs[1] || rn(reg) == regs[2]) {
1398 reg = jit_get_reg(mask|jit_class_nospill);
1399 if (rn(reg) == regs[0] ||
1400 rn(reg) == regs[1] || rn(reg) == regs[2]) {
1402 reg = jit_get_reg(mask|jit_class_nospill);
1410 if (reg == JIT_NOREG) {
1411 /* Cannot get a register to optimize delay slot */
1413 /* Must find a free register */
1414 if (!(mask & jit_class_chk))
1417 assert(reg != JIT_NOREG || (mask & jit_class_chk));
1422 _hrrrit(jit_state_t *_jit,jit_int32_t hc,
1423 jit_int32_t rs, jit_int32_t rt, jit_int32_t rd,
1424 jit_int32_t ic, jit_int32_t tc)
1437 _hrri(jit_state_t *_jit, jit_int32_t hc,
1438 jit_int32_t rs, jit_int32_t rt, jit_int32_t im)
1450 _hrri9(jit_state_t *_jit, jit_int32_t hc,
1451 jit_int32_t rs, jit_int32_t rt, jit_int32_t i9, jit_int32_t tc)
1464 _hi(jit_state_t *_jit, jit_int32_t hc, jit_int32_t im)
1473 _nop(jit_state_t *_jit, jit_int32_t i0)
1475 for (; i0 > 0; i0 -= 4)
1481 _extr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
1482 jit_int32_t pos, jit_int32_t size)
1486 if (__WORDSIZE == 32)
1487 EXT(r0, r1, pos, size);
1489 DEXTU(r0, r1, pos, size);
1491 DEXTM(r0, r1, pos, size);
1493 DEXT(r0, r1, pos, size);
1497 _insr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
1498 jit_int32_t pos, jit_int32_t size)
1502 if (__WORDSIZE == 32)
1503 INS(r0, r1, pos, size);
1505 DINSU(r0, r1, pos, size);
1507 DINSM(r0, r1, pos, size);
1509 DINS(r0, r1, pos, size);
1512 /* http://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel */
1514 unsigned int s = sizeof(v) * CHAR_BIT; // bit size; must be power of 2
1515 unsigned int mask = ~0;
1516 while ((s >>= 1) > 0)
1518 mask ^= (mask << s);
1519 v = ((v >> s) & mask) | ((v << s) & ~mask);
1523 _bitswap(jit_state_t *_jit, jit_int32_t v, jit_int32_t r1)
1525 jit_int32_t s, mask;
1526 jit_word_t loop, done, t0, t1;
1528 s = jit_get_reg(jit_class_gpr);
1529 movi(rn(s), __WORDSIZE); /* s = sizeof(v) * CHAR_BIT; */
1530 mask = jit_get_reg(jit_class_gpr);
1531 movi(rn(mask), ~0L); /* mask = ~0; */
1533 loop = _jit->pc.w; /* while ((s >>= 1) > 0) */
1534 rshi(rn(s), rn(s), 1); /* (s >>= 1) */
1535 done = blei(_jit->pc.w, rn(s), 0); /* no loop if s <= 0 */
1536 t0 = jit_get_reg(jit_class_gpr);
1537 lshr(rn(t0), rn(mask), rn(s)); /* t0 = (mask << s) */
1538 xorr(rn(mask), rn(mask), rn(t0)); /* mask ^= t0 */
1539 rshr(rn(t0), v, rn(s)); /* t0 = v >> s */
1540 andr(rn(t0), rn(t0), rn(mask)); /* t0 = t0 & mask */
1541 t1 = jit_get_reg(jit_class_gpr);
1542 lshr(rn(t1), v, rn(s)); /* t1 = v << s */
1543 comr(v, rn(mask)); /* v = ~mask */
1544 andr(rn(t1), v, rn(t1)); /* t1 = t1 & v */
1545 orr(v, rn(t0), rn(t1)); /* v = t0 | t1 */
1548 patch_at(done, _jit->pc.w);
1551 jit_unget_reg(mask);
1556 _clor(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1558 #if __WORDSIZE == 32
1572 _clzr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1574 #if __WORDSIZE == 32
1588 _ctor(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1590 if (jit_mips6_p()) {
1591 #if __WORDSIZE == 32
1608 _ctzr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1610 if (jit_mips6_p()) {
1611 #if __WORDSIZE == 32
1628 _addi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1633 else if (can_sign_extend_short_p(i0))
1636 reg = jit_get_reg(jit_class_gpr);
1638 addr(r0, r1, rn(reg));
1644 _addcr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1648 if (jit_carry == _NOREG)
1649 jit_carry = jit_get_reg(jit_class_gpr);
1651 t0 = jit_get_reg(jit_class_gpr);
1652 addr(rn(t0), r1, r2);
1653 SLTU(rn(jit_carry), rn(t0), r1);
1659 SLTU(rn(jit_carry), r0, r1);
1664 _addci(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1668 if (jit_carry == _NOREG)
1669 jit_carry = jit_get_reg(jit_class_gpr);
1670 t0 = jit_get_reg(jit_class_gpr);
1672 if (can_sign_extend_short_p(i0))
1673 addiu(rn(t0), r1, i0);
1676 addr(rn(t0), r1, rn(t0));
1678 SLTU(rn(jit_carry), rn(t0), r1);
1682 if (can_sign_extend_short_p(i0))
1686 addr(r0, r1, rn(t0));
1688 SLTU(rn(jit_carry), r0, r1);
1694 _addxr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1698 assert(jit_carry != _NOREG);
1699 t0 = jit_get_reg(jit_class_gpr);
1700 movr(rn(t0), rn(jit_carry));
1702 addcr(r0, r0, rn(t0));
1707 _addxi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1711 assert(jit_carry != _NOREG);
1712 t0 = jit_get_reg(jit_class_gpr);
1713 movr(rn(t0), rn(jit_carry));
1715 addcr(r0, r0, rn(t0));
1720 _subi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1725 else if (can_sign_extend_short_p(i0) && (i0 & 0xffff) != 0x8000)
1728 reg = jit_get_reg(jit_class_gpr);
1730 subr(r0, r1, rn(reg));
1736 _subcr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1740 if (jit_carry == _NOREG)
1741 jit_carry = jit_get_reg(jit_class_gpr);
1743 t0 = jit_get_reg(jit_class_gpr);
1744 subr(rn(t0), r1, r2);
1745 SLTU(rn(jit_carry), r1, rn(t0));
1751 SLTU(rn(jit_carry), r1, r0);
1756 _subci(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1760 if (jit_carry == _NOREG)
1761 jit_carry = jit_get_reg(jit_class_gpr);
1762 t0 = jit_get_reg(jit_class_gpr);
1764 if (can_sign_extend_short_p(i0) && (i0 & 0xffff) != 0x8000)
1765 addiu(rn(t0), r1, -i0);
1768 subr(rn(t0), r1, rn(t0));
1770 SLTU(rn(jit_carry), r1, rn(t0));
1774 if (can_sign_extend_short_p(i0) && (i0 & 0xffff) != 0x8000)
1778 subr(r0, r1, rn(t0));
1780 SLTU(rn(jit_carry), r1, r0);
1786 _subxr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1790 assert(jit_carry != _NOREG);
1791 t0 = jit_get_reg(jit_class_gpr);
1792 movr(rn(t0), rn(jit_carry));
1794 subcr(r0, r0, rn(t0));
1799 _subxi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1803 assert(jit_carry != _NOREG);
1804 t0 = jit_get_reg(jit_class_gpr);
1805 movr(rn(t0), rn(jit_carry));
1807 subcr(r0, r0, rn(t0));
1812 _rsbi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1819 _mulr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1824 if (jit_mips2_p() && __WORDSIZE == 32)
1834 _muli(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1838 reg = jit_get_reg(jit_class_gpr);
1840 mulr(r0, r1, rn(reg));
1845 _iqmulr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
1846 jit_int32_t r2, jit_int32_t r3, jit_bool_t sign)
1849 if (jit_mips6_p()) {
1850 if (r0 == r2 || r0 == r3) {
1851 t0 = jit_get_reg(jit_class_gpr);
1853 mul_r6(rn(t0), r2, r3);
1855 mulu_r6(rn(t0), r2, r3);
1861 mulu_r6(r0, r2, r3);
1866 muhu_r6(r1, r2, r3);
1867 if (r0 == r2 || r0 == r3) {
1883 _iqmuli(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
1884 jit_int32_t r2, jit_word_t i0, jit_bool_t sign)
1887 reg = jit_get_reg(jit_class_gpr);
1889 iqmulr(r0, r1, r2, rn(reg), sign);
1894 _divr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1905 _divi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1908 reg = jit_get_reg(jit_class_gpr);
1910 divr(r0, r1, rn(reg));
1915 _divr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1918 divu_r6(r0, r1, r2);
1926 _divi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1929 reg = jit_get_reg(jit_class_gpr);
1931 divr_u(r0, r1, rn(reg));
1936 _iqdivr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
1937 jit_int32_t r2, jit_int32_t r3, jit_bool_t sign)
1940 if (jit_mips6_p()) {
1941 if (r0 == r2 || r0 == r3)
1942 t0 = jit_get_reg(jit_class_gpr);
1949 div_r6(rn(t0), r2, r3);
1954 divu_r6(r0, r2, r3);
1956 divu_r6(rn(t0), r2, r3);
1957 modu_r6(r1, r2, r3);
1975 _iqdivi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
1976 jit_int32_t r2, jit_word_t i0, jit_bool_t sign)
1979 reg = jit_get_reg(jit_class_gpr);
1981 iqdivr(r0, r1, r2, rn(reg), sign);
1986 _remr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1997 _remi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2000 reg = jit_get_reg(jit_class_gpr);
2002 remr(r0, r1, rn(reg));
2007 _remr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2010 modu_r6(r0, r1, r2);
2018 _remi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2021 reg = jit_get_reg(jit_class_gpr);
2023 remr_u(r0, r1, rn(reg));
2027 #if __WORDSIZE == 64
2029 _lshi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2031 assert(i0 >= 0 && i0 <= 63);
2035 DSLL32(r0, r1, i0 - 32);
2039 _rshi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2041 assert(i0 >= 0 && i0 <= 63);
2045 DSRA32(r0, r1, i0 - 32);
2049 _rshi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2051 assert(i0 >= 0 && i0 <= 63);
2055 DSRL32(r0, r1, i0 - 32);
2060 _andi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2063 if (can_zero_extend_short_p(i0))
2065 else if (is_low_mask(i0)) {
2067 extr(r0, r1, 0, masked_bits_count(i0));
2069 lshi(r0, r1, unmasked_bits_count(i0));
2070 rshi_u(r0, r0, unmasked_bits_count(i0));
2072 } else if (is_high_mask(i0)) {
2073 if (jit_mips2_p() && r0 == r1)
2074 insr(r0, _ZERO_REGNO, 0, unmasked_bits_count(i0));
2076 rshi(r0, r1, unmasked_bits_count(i0));
2077 lshi(r0, r0, unmasked_bits_count(i0));
2079 } else if (jit_mips2_p() && is_middle_mask(i0)) {
2080 extr(r0, r1, __builtin_ctzl(i0), masked_bits_count(i0));
2081 lshi(r0, r0, __builtin_ctzl(i0));
2082 } else if (jit_mips2_p() && is_middle_mask(~i0)) {
2085 insr(r0, _ZERO_REGNO, __builtin_ctzl(~i0), masked_bits_count(~i0));
2087 reg = jit_get_reg(jit_class_gpr);
2089 AND(r0, r1, rn(reg));
2095 _ori(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2098 if (can_zero_extend_short_p(i0))
2101 reg = jit_get_reg(jit_class_gpr);
2103 OR(r0, r1, rn(reg));
2109 _xori(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2112 if (can_zero_extend_short_p(i0))
2115 reg = jit_get_reg(jit_class_gpr);
2117 XOR(r0, r1, rn(reg));
2123 _movr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2126 orr(r0, r1, _ZERO_REGNO);
2130 _movi(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2133 OR(r0, _ZERO_REGNO, _ZERO_REGNO);
2134 else if (can_sign_extend_short_p(i0))
2135 addiu(r0, _ZERO_REGNO, i0);
2136 else if (can_zero_extend_short_p(i0))
2137 ORI(r0, _ZERO_REGNO, i0);
2139 if (can_sign_extend_int_p(i0))
2141 else if (can_zero_extend_int_p(i0)) {
2142 if (i0 & 0xffff0000) {
2143 ORI(r0, _ZERO_REGNO, i0 >> 16);
2147 # if __WORDSIZE == 64
2149 movi(r0, (jit_uword_t)i0 >> 32);
2150 if (i0 & 0xffff0000) {
2152 ORI(r0, r0, i0 >> 16);
2165 _movi_p(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2170 # if __WORDSIZE == 32
2175 ORI(r0, r0, i0 >> 32);
2177 ORI(r0, r0, i0 >> 16);
2186 _movnr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2189 if (jit_mips6_p()) {
2190 reg = jit_get_reg(jit_class_gpr);
2191 SELNEZ(rn(reg), r1, r2);
2193 OR(r0, r0, rn(reg));
2201 _movzr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2204 if (jit_mips6_p()) {
2205 reg = jit_get_reg(jit_class_gpr);
2206 SELEQZ(rn(reg), r1, r2);
2208 OR(r0, r0, rn(reg));
2216 _casx(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1,
2217 jit_int32_t r2, jit_int32_t r3, jit_word_t i0)
2219 jit_int32_t r1_reg, iscasi;
2220 jit_word_t retry, done, jump0, jump1;
2221 if ((iscasi = (r1 == _NOREG))) {
2222 r1_reg = jit_get_reg(jit_class_gpr);
2230 # if __WORDSIZE == 32
2231 if (jit_mips6_p()) LL_R6(r0, 0, r1);
2234 if (jit_mips6_p()) LLD_R6(r0, 0, r1);
2235 else LLD(r0, 0, r1);
2239 BNE(r0, r2, 1); /* bne done r0 r2 */
2240 movi(r0, 0); /* set to 0 in delay slot */
2242 movr(r0, r3); /* after jump and delay slot */
2243 /* store new value */
2244 # if __WORDSIZE == 32
2245 if (jit_mips6_p()) SC_R6(r0, 0, r1);
2248 if (jit_mips6_p()) SCD_R6(r0, 0, r1);
2249 else SCD(r0, 0, r1);
2253 BEQ(r0, _ZERO_REGNO, 0); /* beqi retry r0 0 */
2254 movi(r0, 1); /* set to 1 in delay slot */
2260 patch_at(jump0, done);
2261 patch_at(jump1, retry);
2263 jit_unget_reg(r1_reg);
2267 _ldi_c(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2270 if (can_sign_extend_short_p(i0))
2271 LB(r0, i0, _ZERO_REGNO);
2273 reg = jit_get_reg(jit_class_gpr);
2281 _ldi_uc(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2284 if (can_sign_extend_short_p(i0))
2285 LBU(r0, i0, _ZERO_REGNO);
2287 reg = jit_get_reg(jit_class_gpr);
2289 ldr_uc(r0, rn(reg));
2295 _ldi_s(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2298 if (can_sign_extend_short_p(i0))
2299 LH(r0, i0, _ZERO_REGNO);
2301 reg = jit_get_reg(jit_class_gpr);
2309 _ldi_us(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2312 if (can_sign_extend_short_p(i0))
2313 LHU(r0, i0, _ZERO_REGNO);
2315 reg = jit_get_reg(jit_class_gpr);
2317 ldr_us(r0, rn(reg));
2323 _ldi_i(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2326 if (can_sign_extend_short_p(i0))
2327 LW(r0, i0, _ZERO_REGNO);
2329 reg = jit_get_reg(jit_class_gpr);
2336 #if __WORDSIZE == 64
2338 _ldi_ui(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2341 if (can_sign_extend_short_p(i0))
2342 LWU(r0, i0, _ZERO_REGNO);
2344 reg = jit_get_reg(jit_class_gpr);
2346 ldr_ui(r0, rn(reg));
2352 _ldi_l(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
2355 if (can_sign_extend_short_p(i0))
2356 LD(r0, i0, _ZERO_REGNO);
2358 reg = jit_get_reg(jit_class_gpr);
2367 _ldxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2374 _ldxi_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2376 if (can_sign_extend_short_p(i0))
2385 _ldxr_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2392 _ldxi_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2394 if (can_sign_extend_short_p(i0))
2403 _ldxr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2410 _ldxi_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2412 if (can_sign_extend_short_p(i0))
2421 _ldxr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2428 _ldxi_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2430 if (can_sign_extend_short_p(i0))
2439 _ldxr_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2446 _ldxi_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2448 if (can_sign_extend_short_p(i0))
2456 #if __WORDSIZE == 64
2458 _ldxr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2465 _ldxi_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2467 if (can_sign_extend_short_p(i0))
2476 _ldxr_l(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2483 _ldxi_l(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2485 if (can_sign_extend_short_p(i0))
2495 _sti_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
2498 if (can_sign_extend_short_p(i0))
2499 SB(r0, i0, _ZERO_REGNO);
2501 reg = jit_get_reg(jit_class_gpr);
2509 _sti_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
2512 if (can_sign_extend_short_p(i0))
2513 SH(r0, i0, _ZERO_REGNO);
2515 reg = jit_get_reg(jit_class_gpr);
2523 _sti_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
2526 if (can_sign_extend_short_p(i0))
2527 SW(r0, i0, _ZERO_REGNO);
2529 reg = jit_get_reg(jit_class_gpr);
2536 #if __WORDSIZE == 64
2538 _sti_l(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
2541 if (can_sign_extend_short_p(i0))
2542 SD(r0, i0, _ZERO_REGNO);
2544 reg = jit_get_reg(jit_class_gpr);
2553 _stxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2556 reg = jit_get_reg(jit_class_gpr);
2557 addr(rn(reg), r0, r1);
2563 _stxi_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2566 if (can_sign_extend_short_p(i0))
2569 reg = jit_get_reg(jit_class_gpr);
2570 addi(rn(reg), r0, i0);
2577 _stxr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2580 reg = jit_get_reg(jit_class_gpr);
2581 addr(rn(reg), r0, r1);
2587 _stxi_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2590 if (can_sign_extend_short_p(i0))
2593 reg = jit_get_reg(jit_class_gpr);
2594 addi(rn(reg), r0, i0);
2601 _stxr_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2604 reg = jit_get_reg(jit_class_gpr);
2605 addr(rn(reg), r0, r1);
2611 _stxi_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2614 if (can_sign_extend_short_p(i0))
2617 reg = jit_get_reg(jit_class_gpr);
2618 addi(rn(reg), r0, i0);
2624 #if __WORDSIZE == 64
2626 _stxr_l(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1 ,jit_int32_t r2)
2629 reg = jit_get_reg(jit_class_gpr);
2630 addr(rn(reg), r0, r1);
2636 _stxi_l(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2639 if (can_sign_extend_short_p(i0))
2642 reg = jit_get_reg(jit_class_gpr);
2643 addi(rn(reg), r0, i0);
2651 _bswapr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2653 if (jit_mips2_p()) {
2657 generic_bswapr_us(_jit, r0, r1);
2662 _bswapr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2664 if (jit_mips2_p()) {
2665 if (__WORDSIZE == 64) {
2669 extr(r0, r0, 0, 32);
2675 generic_bswapr_ui(_jit, r0, r1);
2680 _extr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2685 lshi(r0, r1, __WORDSIZE - 8);
2686 rshi(r0, r0, __WORDSIZE - 8);
2691 _extr_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2696 lshi(r0, r1, __WORDSIZE - 16);
2697 rshi(r0, r0, __WORDSIZE - 16);
2701 # if __WORDSIZE == 64
2703 _extr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2706 DEXT(r0, r1, 0, 32);
2715 _lti(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2719 if (can_sign_extend_short_p(i0))
2722 reg = jit_get_reg(jit_class_gpr);
2724 ltr(r0, r1, rn(reg));
2730 _lti_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2734 if (can_sign_extend_short_p(i0))
2737 reg = jit_get_reg(jit_class_gpr);
2739 ltr_u(r0, r1, rn(reg));
2745 _ler(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2752 _lei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2756 if (can_sign_extend_short_p(i0 + 1))
2757 SLTI(r0, r1, i0 + 1);
2759 reg = jit_get_reg(jit_class_gpr);
2761 ler(r0, r1, rn(reg));
2767 _ler_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2774 _lei_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2778 if (can_sign_extend_short_p(i0 + 1))
2779 SLTIU(r0, r1, i0 + 1);
2781 reg = jit_get_reg(jit_class_gpr);
2783 ler_u(r0, r1, rn(reg));
2789 _eqr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2796 _eqi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2807 _ger(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2814 _gei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2818 if (can_sign_extend_short_p(i0)) {
2822 reg = jit_get_reg(jit_class_gpr);
2824 ger(r0, r1, rn(reg));
2830 _ger_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2837 _gei_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2841 if (can_sign_extend_short_p(i0)) {
2845 reg = jit_get_reg(jit_class_gpr);
2847 ger_u(r0, r1, rn(reg));
2853 _gti(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2858 SLT(r0, _ZERO_REGNO, r1);
2860 reg = jit_get_reg(jit_class_gpr);
2862 SLT(r0, rn(reg), r1);
2868 _gti_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2873 SLTU(r0, _ZERO_REGNO, r1);
2875 reg = jit_get_reg(jit_class_gpr);
2877 SLTU(r0, rn(reg), r1);
2883 _ner(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
2886 SLTU(r0, _ZERO_REGNO, r0);
2890 _nei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
2894 SLTU(r0, _ZERO_REGNO, r0);
2897 SLTU(r0, _ZERO_REGNO, r1);
2901 _beqr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2904 jit_int32_t op, reg;
2905 /* Just to not move incorrectly instruction to delay slot */
2906 reg = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk, r0, r1);
2908 /* implicit flush() */
2910 BEQ(r0, r1, ((i0 - w) >> 2) - 1);
2912 if (reg != JIT_NOREG)
2918 _beqi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2921 jit_int32_t op, reg;
2923 w = beqr(i0, r0, _ZERO_REGNO);
2925 reg = jit_get_reg_for_delay_slot(jit_class_gpr, r0, _ZERO_REGNO);
2930 BEQ(r0, rn(reg), ((i0 - w) >> 2) - 1);
2938 _bger(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1,
2942 jit_int32_t op, reg;
2943 reg = jit_get_reg_for_delay_slot(jit_class_gpr, r0, r1);
2946 SLTU(rn(reg), r0, r1);
2948 SLT(rn(reg), r0, r1);
2951 BEQ(rn(reg), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
2958 _bgei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1,
2959 jit_bool_t sltiu, jit_bool_t bne)
2964 jit_int32_t op, t0, mask;
2965 zero_p = !sltiu && i1 == 0;
2966 /* Even if zero_p allocate one as a mean to avoid incorrect delay slot */
2967 mask = jit_class_gpr;
2969 mask |= jit_class_chk;
2970 t0 = jit_get_reg_for_delay_slot(mask, r0, _ZERO_REGNO);
2971 if (can_sign_extend_short_p(i1)) {
2975 SLTIU(rn(t0), r0, i1);
2977 SLTI(rn(t0), r0, i1);
2981 d = ((i0 - w) >> 2) - 1;
2984 BNE(rn(t0), _ZERO_REGNO, d);
2990 BEQ(rn(t0), _ZERO_REGNO, d);
2999 SLTU(rn(t0), r0, rn(t0));
3001 SLT(rn(t0), r0, rn(t0));
3005 BNE(rn(t0), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3007 BEQ(rn(t0), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3010 if (t0 != JIT_NOREG)
3016 _bgtr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1,
3017 jit_bool_t sltu, jit_bool_t inv)
3020 jit_int32_t op, reg;
3021 reg = jit_get_reg_for_delay_slot(jit_class_gpr, r0, r1);
3024 SLTU(rn(reg), r1, r0);
3026 SLT(rn(reg), r1, r0);
3030 BEQ(rn(reg), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3032 BNE(rn(reg), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3039 _bgti(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1,
3040 jit_bool_t sltiu, jit_bool_t inv)
3043 jit_int32_t op, t0, mask;
3044 mask = jit_class_gpr;
3046 mask |= jit_class_chk;
3047 /* Allocate even if i0 == 0 as a way to avoid incorrect delay slot */
3048 t0 = jit_get_reg_for_delay_slot(mask, r0, _ZERO_REGNO);
3051 /* implicit flush() */
3055 BEQ(r0, _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3057 BLEZ(r0, ((i0 - w) >> 2) - 1);
3061 BNE(r0, _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3063 BGTZ(r0, ((i0 - w) >> 2) - 1);
3070 SLTU(rn(t0), rn(t0), r0);
3072 SLT(rn(t0), rn(t0), r0);
3076 BEQ(rn(t0), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3078 BNE(rn(t0), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3081 if (t0 != JIT_NOREG)
3087 _bner(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3090 jit_int32_t op, reg;
3091 /* Just to not move incorrectly instruction to delay slot */
3092 reg = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk, r0, r1);
3094 /* implicit flush() */
3096 BNE(r0, r1, ((i0 - w) >> 2) - 1);
3098 if (reg != JIT_NOREG)
3104 _bnei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3107 jit_int32_t op, reg;
3109 w = bner(i0, r0, _ZERO_REGNO);
3111 reg = jit_get_reg_for_delay_slot(jit_class_gpr, r0, _ZERO_REGNO);
3116 BNE(r0, rn(reg), ((i0 - w) >> 2) - 1);
3124 _jmpr(jit_state_t *_jit, jit_int32_t r0)
3127 /* make sure delay slot does not use r0 */
3128 t0 = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk,
3133 if (t0 != JIT_NOREG)
3138 _jmpi(jit_state_t *_jit, jit_word_t i0, jit_bool_t patch)
3142 /* try to get a pending instruction before the jump */
3143 t0 = jit_get_reg_for_delay_slot(jit_class_gpr, _ZERO_REGNO, _ZERO_REGNO);
3145 /* implicit flush() */
3147 if (jit_mips2_p()) {
3148 disp = ((i0 - w) >> 2) - 1;
3149 if (patch || can_sign_extend_short_p(disp)) {
3150 BEQ(_ZERO_REGNO, _ZERO_REGNO, disp);
3154 if (((w + sizeof(jit_int32_t)) & 0xf0000000) == (i0 & 0xf0000000))
3155 J((i0 & ~0xf0000000) >> 2);
3158 w = movi_p(rn(t0), i0);
3170 _jmpi_p(jit_state_t *_jit, jit_word_t i0)
3174 /* make sure delay slot does not use _T9_REGNO */
3175 t0 = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk,
3176 _T9_REGNO, _ZERO_REGNO);
3178 /* implicit flush() */
3181 flush(); /* movi_p will be patched */
3184 if (t0 != JIT_NOREG)
3190 _boaddr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3197 /* t1 = r0 + r1; overflow = r1 < 0 ? r0 < t1 : t1 < r0 */
3198 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3199 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3200 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3201 SLT(rn(t0), r1, _ZERO_REGNO); /* t0 = r1 < 0 */
3202 addr(rn(t1), r0, r1); /* t1 = r0 + r1 */
3203 SLT(rn(t2), rn(t1), r0); /* t2 = t1 < r0 */
3204 SLT(rn(t1), r0, rn(t1)); /* t1 = r0 < t1 */
3205 movzr(rn(t1), rn(t2), rn(t0)); /* if (r0 == 0) t1 = t2 */
3206 /* cannot optimize delay slot */
3209 BNE(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3221 _boaddi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3228 if (can_sign_extend_short_p(i1)) {
3229 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3230 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3231 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3232 SLTI(rn(t0), _ZERO_REGNO, i1);
3233 addiu(rn(t1), r0, i1);
3234 SLT(rn(t2), r0, rn(t1));
3235 SLT(rn(t1), rn(t1), r0);
3236 movzr(rn(t1), rn(t2), rn(t0));
3237 /* cannot optimize delay slot */
3240 BNE(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3249 t0 = jit_get_reg(jit_class_gpr);
3251 w = boaddr(i0, r0, rn(t0));
3258 _boaddr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3264 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3265 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3266 addr(rn(t0), r0, r1);
3267 SLTU(rn(t1), rn(t0), r0);
3269 /* cannot optimize delay slot */
3271 BNE(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3281 _boaddi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3287 if (can_sign_extend_short_p(i0)) {
3288 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3289 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3290 addiu(rn(t0), r0, i1);
3291 SLTU(rn(t1), rn(t0), r0);
3293 /* cannot optimize delay slot */
3295 BNE(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3303 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3305 w = boaddr_u(i0, r0, rn(t0));
3312 _bxaddr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3319 /* t1 = r0 + r1; overflow = r1 < 0 ? r0 < t1 : t1 < r0 */
3320 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3321 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3322 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3323 SLT(rn(t0), r1, _ZERO_REGNO); /* t0 = r1 < 0 */
3324 addr(rn(t1), r0, r1); /* t1 = r0 + r1 */
3325 SLT(rn(t2), rn(t1), r0); /* t2 = t1 < r0 */
3326 SLT(rn(t1), r0, rn(t1)); /* t1 = r0 < t1 */
3327 movzr(rn(t1), rn(t2), rn(t0)); /* if (r0 == 0) t1 = t2 */
3328 /* cannot optimize delay slot */
3331 BEQ(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3343 _bxaddi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3350 if (can_sign_extend_short_p(i1)) {
3351 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3352 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3353 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3354 SLTI(rn(t0), _ZERO_REGNO, i1);
3355 addiu(rn(t1), r0, i1);
3356 SLT(rn(t2), r0, rn(t1));
3357 SLT(rn(t1), rn(t1), r0);
3358 movzr(rn(t1), rn(t2), rn(t0));
3359 /* cannot optimize delay slot */
3362 BEQ(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3371 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3373 w = bxaddr(i0, r0, rn(t0));
3380 _bxaddr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3386 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3387 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3388 addr(rn(t0), r0, r1);
3389 SLTU(rn(t1), rn(t0), r0);
3390 /* cannot optimize delay slot */
3393 BEQ(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3403 _bxaddi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3409 if (can_sign_extend_short_p(i0)) {
3410 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3411 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3412 addiu(rn(t0), r0, i1);
3413 SLTU(rn(t1), rn(t0), r0);
3414 /* cannot optimize delay slot */
3417 BEQ(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3425 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3427 w = bxaddr_u(i0, r0, rn(t0));
3434 _bosubr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3441 /* t1 = r0 - r1; overflow = 0 < r1 ? r0 < t1 : t1 < r0 */
3442 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3443 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3444 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3445 SLT(rn(t0), _ZERO_REGNO, r1); /* t0 = 0 < r1 */
3446 subr(rn(t1), r0, r1); /* t1 = r0 - r1 */
3447 SLT(rn(t2), rn(t1), r0); /* t2 = t1 < r0 */
3448 SLT(rn(t1), r0, rn(t1)); /* t1 = r0 < t1 */
3449 movzr(rn(t1), rn(t2), rn(t0)); /* if (r0 == 0) t1 = t2 */
3452 BNE(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3464 _bosubi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3471 if (can_sign_extend_short_p(i1) && (i1 & 0xffff) != 0x8000) {
3472 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3473 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3474 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3475 SLTI(rn(t0), _ZERO_REGNO, i1);
3476 addiu(rn(t1), r0, -i1);
3477 SLT(rn(t2), rn(t1), r0);
3478 SLT(rn(t1), r0, rn(t1));
3479 movzr(rn(t1), rn(t2), rn(t0));
3482 BNE(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3491 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3493 w = bosubr(i0, r0, rn(t0));
3500 _bosubr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3506 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3507 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3508 subr(rn(t0), r0, r1);
3509 SLTU(rn(t1), r0, rn(t0));
3510 /* cannot optimize delay slot */
3513 BNE(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3523 _bosubi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3529 if (can_sign_extend_short_p(i0) && (i0 & 0xffff) != 0x8000) {
3530 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3531 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3532 addiu(rn(t0), r0, -i1);
3533 SLTU(rn(t1), r0, rn(t0));
3534 /* cannot optimize delay slot */
3537 BNE(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3545 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3547 w = bosubr_u(i0, r0, rn(t0));
3554 _bxsubr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3561 /* t1 = r0 - r1; overflow = 0 < r1 ? r0 < t1 : t1 < r0 */
3562 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3563 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3564 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3565 SLT(rn(t0), _ZERO_REGNO, r1); /* t0 = 0 < r1 */
3566 subr(rn(t1), r0, r1); /* t1 = r0 - r1 */
3567 SLT(rn(t2), rn(t1), r0); /* t2 = t1 < r0 */
3568 SLT(rn(t1), r0, rn(t1)); /* t1 = r0 < t1 */
3569 movzr(rn(t1), rn(t2), rn(t0)); /* if (t0 == 0) t1 = t2 */
3570 /* cannot optimize delay slot */
3573 BEQ(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3585 _bxsubi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3592 if (can_sign_extend_short_p(i1) && (i1 & 0xffff) != 0x8000) {
3593 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3594 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3595 t2 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3596 SLTI(rn(t0), _ZERO_REGNO, i1);
3597 addiu(rn(t1), r0, -i1);
3598 SLT(rn(t2), rn(t1), r0);
3599 SLT(rn(t1), r0, rn(t1));
3600 movzr(rn(t1), rn(t2), rn(t0));
3601 /* cannot optimize delay slot */
3604 BEQ(rn(t1), _ZERO_REGNO, ((i0 - w) >> 2) - 1);
3613 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3615 w = bxsubr(i0, r0, rn(t0));
3622 _bxsubr_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3628 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3629 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3630 subr(rn(t0), r0, r1);
3631 SLTU(rn(t1), r0, rn(t0));
3632 /* cannot optimize delay slot */
3635 BEQ(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3645 _bxsubi_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3651 if (can_sign_extend_short_p(i0) && (i0 & 0xffff) != 0x8000) {
3652 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3653 t1 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3654 addiu(rn(t0), r0, -i1);
3655 SLTU(rn(t1), r0, rn(t0));
3656 /* cannot optimize delay slot */
3659 BEQ(_ZERO_REGNO, rn(t1), ((i0 - w) >> 2) - 1);
3667 t0 = jit_get_reg(jit_class_gpr|jit_class_nospill);
3669 w = bxsubr_u(i0, r0, rn(t0));
3676 _bmsr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3680 t0 = jit_get_reg_for_delay_slot(jit_class_gpr, r0, r1);
3682 AND(rn(t0), r0, r1);
3685 BNE(_ZERO_REGNO, rn(t0), ((i0 - w) >> 2) - 1);
3692 _bmsi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3696 t0 = jit_get_reg_for_delay_slot(jit_class_gpr, r0, _ZERO_REGNO);
3698 andi(rn(t0), r0, i1);
3701 BNE(_ZERO_REGNO, rn(t0), ((i0 - w) >> 2) - 1);
3708 _bmcr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
3712 t0 = jit_get_reg_for_delay_slot(jit_class_gpr, r0, r1);
3714 AND(rn(t0), r0, r1);
3717 BEQ(_ZERO_REGNO, rn(t0), ((i0 - w) >> 2) - 1);
3724 _bmci(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
3728 t0 = jit_get_reg_for_delay_slot(jit_class_gpr, r0, _ZERO_REGNO);
3730 andi(rn(t0), r0, i1);
3733 BEQ(_ZERO_REGNO, rn(t0), ((i0 - w) >> 2) - 1);
3740 _callr(jit_state_t *_jit, jit_int32_t r0)
3743 if (r0 != _T9_REGNO) {
3746 movr(_T9_REGNO, r0);
3750 /* make sure delay slot does not use r0 */
3751 t0 = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk,
3756 if (t0 != JIT_NOREG)
3762 _calli(jit_state_t *_jit, jit_word_t i0, jit_bool_t patch)
3767 if (jit_mips2_p()) {
3768 disp = ((i0 - w) >> 2) - 1;
3769 if (patch || can_sign_extend_short_p(disp)) {
3771 BGEZAL(_ZERO_REGNO, disp); /* Renamed to BAL in mips release 6 */
3778 if (((w + sizeof(jit_int32_t)) & 0xf0000000) == (i0 & 0xf0000000)) {
3779 if (can_sign_extend_short_p(i0)) {
3780 JAL((i0 & ~0xf0000000) >> 2);
3782 addiu(_T9_REGNO, _ZERO_REGNO, i0);
3784 else if (can_zero_extend_short_p(i0)) {
3785 JAL((i0 & ~0xf0000000) >> 2);
3787 ORI(_T9_REGNO, _ZERO_REGNO, i0);
3789 else if (can_sign_extend_int_p(i0)) {
3791 LUI(_T9_REGNO, i0 >> 16);
3792 JAL((i0 & ~0xf0000000) >> 2);
3794 ORI(_T9_REGNO, _T9_REGNO, i0);
3797 JAL((i0 & ~0xf0000000) >> 2);
3799 LUI(_T9_REGNO, i0 >> 16);
3807 /* make sure delay slot does not use _T9_REGNO */
3808 t0 = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk,
3809 _T9_REGNO, _ZERO_REGNO);
3810 /* try to get an instruction before the call */
3812 movi(_T9_REGNO, i0);
3815 if (t0 != JIT_NOREG)
3823 _calli_p(jit_state_t *_jit, jit_word_t i0)
3827 /* make sure delay slot does not use _T9_REGNO */
3828 t0 = jit_get_reg_for_delay_slot(jit_class_gpr|jit_class_chk,
3829 _T9_REGNO, _ZERO_REGNO);
3831 /* implicit flush() */
3833 movi_p(_T9_REGNO, i0);
3836 if (t0 != JIT_NOREG)
3842 _prolog(jit_state_t *_jit, jit_node_t *node)
3844 jit_int32_t reg, offs;
3845 if (_jitc->function->define_frame || _jitc->function->assume_frame) {
3846 jit_int32_t frame = -_jitc->function->frame;
3848 assert(_jitc->function->self.aoff >= frame);
3849 if (_jitc->function->assume_frame)
3851 _jitc->function->self.aoff = frame;
3853 if (_jitc->function->allocar)
3854 _jitc->function->self.aoff &= -8;
3856 _jitc->function->stack = ((_jitc->function->self.alen -
3857 /* align stack at 16 bytes */
3858 _jitc->function->self.aoff) + 15) & -16;
3860 _jitc->function->stack = ((/* first 16 bytes must be allocated */
3861 (_jitc->function->self.alen > 16 ?
3862 _jitc->function->self.alen : 16) -
3863 /* align stack at 8 bytes */
3864 _jitc->function->self.aoff) + 7) & -8;
3868 if (_jitc->function->stack)
3869 _jitc->function->need_stack = 1;
3870 if (!_jitc->function->need_frame && !_jitc->function->need_stack) {
3871 /* check if any callee save register needs to be saved */
3872 for (reg = 0; reg < _jitc->reglen; ++reg)
3873 if (jit_regset_tstbit(&_jitc->function->regset, reg) &&
3874 (_rvs[reg].spec & jit_class_sav)) {
3875 _jitc->function->need_stack = 1;
3880 /* Need always a frame due to the need to always allocate 16 bytes */
3884 if (_jitc->function->need_frame || _jitc->function->need_stack)
3885 subi(_SP_REGNO, _SP_REGNO, jit_framesize());
3886 if (_jitc->function->need_frame) {
3887 stxi(0, _SP_REGNO, _RA_REGNO);
3888 stxi(STACK_SLOT, _SP_REGNO, _BP_REGNO);
3890 /* callee save registers */
3891 for (reg = 0, offs = STACK_SLOT << 1; reg < jit_size(iregs); reg++) {
3892 if (jit_regset_tstbit(&_jitc->function->regset, iregs[reg])) {
3893 stxi(offs, _SP_REGNO, rn(iregs[reg]));
3897 for (reg = 0; reg < jit_size(fregs); reg++) {
3898 if (jit_regset_tstbit(&_jitc->function->regset, fregs[reg])) {
3899 stxi_d(offs, _SP_REGNO, rn(fregs[reg]));
3900 offs += sizeof(jit_float64_t);
3904 if (_jitc->function->need_frame)
3905 movr(_BP_REGNO, _SP_REGNO);
3908 if (_jitc->function->stack)
3909 subi(_SP_REGNO, _SP_REGNO, _jitc->function->stack);
3910 if (_jitc->function->allocar) {
3911 reg = jit_get_reg(jit_class_gpr);
3912 movi(rn(reg), _jitc->function->self.aoff);
3913 stxi_i(_jitc->function->aoffoff, _BP_REGNO, rn(reg));
3917 if (_jitc->function->self.call & jit_call_varargs) {
3918 for (reg = _jitc->function->vagp; jit_arg_reg_p(reg); ++reg) {
3919 offs = jit_framesize() - ((NUM_WORD_ARGS - reg) * STACK_SLOT);
3921 SD(rn(_A0 - reg), offs, _BP_REGNO);
3923 offs += 16 + WORD_ADJUST;
3924 stxi(offs, _BP_REGNO, rn(_A0 - reg));
3931 _epilog(jit_state_t *_jit, jit_node_t *node)
3933 jit_int32_t reg, offs;
3934 if (_jitc->function->assume_frame)
3937 if (_jitc->function->need_frame) {
3938 movr(_SP_REGNO, _BP_REGNO);
3939 ldxi(_RA_REGNO, _SP_REGNO, 0);
3940 ldxi(_BP_REGNO, _SP_REGNO, STACK_SLOT);
3943 /* callee save registers */
3944 for (reg = 0, offs = STACK_SLOT << 1; reg < jit_size(iregs); reg++) {
3945 if (jit_regset_tstbit(&_jitc->function->regset, iregs[reg])) {
3946 ldxi(rn(iregs[reg]), _SP_REGNO, offs);
3947 offs += sizeof(jit_word_t);
3950 for (reg = 0; reg < jit_size(fregs); reg++) {
3951 if (jit_regset_tstbit(&_jitc->function->regset, fregs[reg])) {
3952 ldxi_d(rn(fregs[reg]), _SP_REGNO, offs);
3953 offs += sizeof(jit_float64_t);
3958 if (_jitc->function->need_frame || _jitc->function->need_stack)
3959 addi(_SP_REGNO, _SP_REGNO, jit_framesize());
3966 _vastart(jit_state_t *_jit, jit_int32_t r0)
3968 assert(_jitc->function->self.call & jit_call_varargs);
3970 /* Initialize va_list to the first stack argument. */
3971 if (jit_arg_reg_p(_jitc->function->vagp))
3974 ((NUM_WORD_ARGS - _jitc->function->vagp) * STACK_SLOT));
3977 addi(r0, _BP_REGNO, jit_selfsize());
3981 _vaarg(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
3983 /* Load argument. */
3985 ldxi(r0, r1, WORD_ADJUST);
3990 /* Update va_list. */
3991 addi(r1, r1, STACK_SLOT);
3995 _patch_abs(jit_state_t *_jit, jit_word_t instr, jit_word_t label)
4004 #if __WORDSIZE == 32
4006 assert(i.hc.b == MIPS_LUI);
4007 i.is.b = label >> 16;
4010 assert(i.hc.b == MIPS_ORI);
4015 assert(i.hc.b == MIPS_LUI);
4016 i.is.b = label >> 48;
4019 assert(i.hc.b == MIPS_ORI);
4020 i.is.b = label >> 32;
4024 assert(i.hc.b == MIPS_ORI);
4025 i.is.b = label >> 16;
4029 assert(i.hc.b == MIPS_ORI);
4036 _patch_at(jit_state_t *_jit, jit_word_t instr, jit_word_t label)
4047 /* 16 bit immediate opcodes */
4050 case MIPS_BLTZ: case MIPS_BLTZL:
4051 case MIPS_BLTZAL: case MIPS_BLTZALL:
4052 case MIPS_BGEZ: case MIPS_BGEZAL:
4053 case MIPS_BGEZALL: case MIPS_BGEZL:
4054 case MIPS_TEQI: case MIPS_TGEI:
4055 case MIPS_TGEIU: case MIPS_TLTI:
4056 case MIPS_TLTIU: case MIPS_TNEI:
4057 i.is.b = ((label - instr) >> 2) - 1;
4061 assert(!"unhandled branch opcode");
4066 case MIPS_COP1: case MIPS_COP2:
4067 if (jit_mips6_p()) {
4069 case MIPS_BC1EQZ: case MIPS_BC1NEZ:
4070 assert(jit_mips6_p());
4071 i.is.b = ((label - instr) >> 2) - 1;
4075 assert(!"unhandled branch opcode");
4080 assert(i.rs.b == MIPS_BC);
4082 case MIPS_BCF: case MIPS_BCFL:
4083 case MIPS_BCT: case MIPS_BCTL:
4084 assert(!jit_mips6_p());
4085 i.is.b = ((label - instr) >> 2) - 1;
4089 assert(!"unhandled branch opcode");
4095 case MIPS_BLEZ: case MIPS_BLEZL:
4096 case MIPS_BEQ: case MIPS_BEQL:
4097 case MIPS_BGTZ: case MIPS_BGTZL:
4098 case MIPS_BNE: case MIPS_BNEL:
4099 i.is.b = ((label - instr) >> 2) - 1;
4104 patch_abs(instr, label);
4107 case MIPS_J: case MIPS_JAL:
4109 assert(((instr + sizeof(jit_int32_t)) & 0xf0000000) ==
4110 (label & 0xf0000000));
4111 i.ii.b = (label & ~0xf0000000) >> 2;
4116 assert(!"unhandled branch opcode");