1 ###############################################################################
3 # Copyright (c) 2011, GraÅžvydas Ignotas
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are met:
8 # * Redistributions of source code must retain the above copyright
9 # notice, this list of conditions and the following disclaimer.
10 # * Redistributions in binary form must reproduce the above copyright
11 # notice, this list of conditions and the following disclaimer in the
12 # documentation and/or other materials provided with the distribution.
13 # * Neither the name of the organization nor the
14 # names of its contributors may be used to endorse or promote products
15 # derived from this software without specific prior written permission.
17 # THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND ANY
18 # EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 # DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY
21 # DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 # --register-prefix-optional --bitwise-or
38 # receive 1 byte to d0
41 .macro recv_one_byte is_last=0
42 move.b #0,(a1) /* clear TH */
47 bne 0b /*L_wait_tl_low*/
49 move.b #0x40,(a1) /* set TH */
55 beq 0b /*L_wait_tl_hi*/
58 move.b #0,(a1) /* clear TH - ready for next */
74 bne 0b /*Lwait_tl_low*/
76 move.b d2,(a1) /* clears TH and writes data */
80 bset.b #6,d2 /* prepare TH */
85 beq 0b /*wait_tl_hi1*/
95 # receive 1 16bit word to d0
107 # receive address/size to d0 (3 bytes BE)
130 .macro switch_to_output
131 0: /*Lwait_tl_low: PC should switch to rx mode before lowering tl */
134 bne 0b /*Lwait_tl_low*/
136 move.b #0x4f,(0xa1000b).l
140 .equ sat_maxsize, (80*8+0x200) /* sprites+max_align */
142 # make sure cache is invalidated
143 # note: VRAM copy doesn't seem to help here
144 # note2: cache is updated as data is written
145 # in: d0 - vdp reg5, a0 = 0xc00000
147 invalidate_sprite_cache:
148 move.w #0x8f02,4(a0) /* auto increment 2 */
149 lsl.b #1,d0 /* upper byte of sat address */
151 lsr.b #6,d1 /* 15:14 dst addr */
152 and.b #0x3f,d0 /* assemble cmd */
159 move.l #sat_maxsize/2-1,d2
164 bset #30,d0 /* VRAM write */
168 move.l #sat_maxsize/2-1,d2
178 move.b #0x40,(0xa1000b).l /* ctrl - all inputs except TH */
193 lea (jumptab,pc,d0),a0
196 bra pcc_transfer_recv /* sent to us */
197 bra pcc_transfer_send /* recv from us */
205 /* receive data from PC */
220 /* send data to PC */
237 /* call specified location */
245 /* do simple i/o commands */
255 move.b #0x40,(0xa1000b).l /* input mode */
261 move.b d0,d3 /* cmd */
264 move.l d0,a2 /* addr */
343 /* PicoDrive savestate load */
347 move.w #0x8f02,4(a0) /* auto increment 2 */
349 move.l #0x40000000,4(a0)
350 move.l #0x10000/2-1,d3
354 dbra d3, tr_do_vram_loop
357 move.l #0xc0000000,4(a0)
362 dbra d3, tr_do_cram_loop
365 move.l #0x40000010,4(a0)
370 dbra d3, tr_do_vsram_loop
372 /* recv and write regs */
376 tr_do_vdpreg_recv_loop:
379 dbra d3, tr_do_vdpreg_recv_loop
390 cmp.b #0x17,d3 /* FIXME: r23 might cause DMA or.. */
391 bne 0f /* ..something and hang VDP.. */
392 add.b #1,d3 /* ..so we skip it */
395 blt tr_do_vdpreg_loop
399 bsr invalidate_sprite_cache
410 move.w #0x8f02,4(a0) /* auto increment 2 */
411 move.l #0,4(a0) /* VRAM read, addr 0 */
412 move.l #0x10000/2-1,d4
423 dbra d4,tr_vram_send_loop
429 /* some random code */
436 move.b #0,(0xa1000b).l /* all inputs */
438 move.l d0,(a1)+ /* last state for debug */
447 # vim:filetype=asmM68k