2 * (C) GraÅžvydas "notaz" Ignotas, 2011
4 * This work is licensed under the terms of any of these licenses
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
23 @ approximate gteMAC|123 flags
24 @ in: rr 123 as gteMAC|123
26 .macro do_mac_flags rr1 rr2 rr3
28 orrvs lr, #(1<<31)|(1<<27)
30 orrvs lr, #(1<<31)|(1<<26)
32 orrvs lr, #(1<<31)|(1<<25)
33 cmn \rr1, #1 @ same as adds ...
41 @ approximate 3x gteMACn flags
42 @ in: rr 123 as 3 instances gteMACn, *flags
44 .macro do_mac_flags3x rr1 rr2 rr3 nflags pflags
49 cmn \rr1, #1 @ adds ...
55 @ get gteIR|123 flags from gteMAC|123
56 @ in: rr 123 as gteMAC|123
58 .macro do_irs_flags rr1 rr2 rr3
62 orrne lr, #(1<<31)|(1<<24) @ IR1/limB1
66 orrne lr, #(1<<23) @ IR2/limB2
68 orrne lr, #(1<<22) @ IR3/limB3
73 * RTPS/RTPT register map:
75 * q | d | c code / phase 1 phase 2 scratch
76 * 0 0 gteR1* [s16] gteMAC3 = gteMAC3 \ v=0 *
77 * 1 gteR2* gteIR1-3 = gteIR1-3 / *
78 * 1 2 gteR3* gteMAC3 = gteMAC3 \ v=1
79 * 3 * gteIR1-3 = gteIR1-3 /
80 * 2 4 gteTRX<<12 [s64] gteOFX [s64] gteMAC3 \ v=2
81 * 5 gteTRY<<12 gteOFY [s64] gteIR1-3 /
82 * 3 6 gteTRZ<<12 gteDQA [s64] min gteMAC|12 v=012
83 * 7 0 gteDQB [s64] max gteMAC|12
84 * 4 8 VXYZ(v) / gteMAC1,2 [s32] min gteIR|123
85 * 9 * / gteMAC3 max gteIR|123
86 * 5 10 gteIR1-3 [s16] gteIR1-3 v=2 quotients 12
88 * 6 12 gteH (adj. for cmp)
89 * 13 gteH (float for div)
95 @ load gteR*, gteTR* and gteH (see map above), clear q15
100 vldmia r3, {d0-d2} @ gteR* [16*9]
102 add r3, r0, #4*(32+5)
103 vldmia r3, {d4-d5} @ gteTR*
104 vext.16 d2, d1, d2, #2 @ xxx3 -> x321
105 vext.16 d1, d0, d1, #3 @ xx32 -> x321
106 add r3, r0, #4*(32+26)
107 vld1.32 d11[0], [r3] @ gteH
108 vshll.s32 q3, d5, #12 @ gteTRZ
109 vshll.s32 q2, d4, #12 @ gteTR|XY
110 vmovl.s16 q6, d11 @ gteH
113 @ do RTP* gteMAC* calculation
114 @ in: gteR*, gteTR* as in map, d8 - VXYZ, r12 - 0
115 @ out: d8,d9 - gteMAC|123, d10 - gteIR|123
120 vmull.s16 q10, d2, d8
124 vadd.s64 d16, d17 @ d16=d0.16[2]*d8.16[2], as
125 vadd.s64 d18, d19 @ d8[3]==0, so won't affect
126 vadd.s64 d20, d21 @ QC
130 vqshrn.s64 d8, q8, #12 @ gteMAC1
131 vqshrn.s64 d18, q9, #12 @ gteMAC2
132 vqshrn.s64 d9, q10, #12 @ gteMAC3
133 vsli.u64 d8, d18, #32 @ gteMAC|12
135 vqmovn.s32 d10, q4 @ gteIR|123; losing 2 cycles?
138 .global gteRTPS_neon @ r0=CP2 (d,c),
142 @ fmrx r4, fpscr @ vmrs? at least 40 cycle hit
143 movw r1, #:lower16:scratch
144 movt r1, #:upper16:scratch
147 vldmia r0, {d8} @ VXYZ(0)
150 @ rtpx_mac @ slower here, faster in RTPT?
151 vmov.16 d8[3], r12 @ kill unused upper vector
154 vmull.s16 q10, d2, d8
155 vpadd.s32 d16, d16, d17
156 vpadd.s32 d17, d18, d19
157 vpadd.s32 d18, d20, d21
159 vpadal.s32 q3, q9 @ d6, d18 is slow?
160 vqshrn.s64 d8, q2, #12 @ gteMAC|12
161 vqshrn.s64 d9, q3, #12 @ gteMAC3
165 vst1.32 d9[0], [r3] @ wb gteMAC|123
166 vqmovn.s32 d10, q4 @ gteIR|123
168 add r3, r0, #4*17 @ gteSZ*
169 vldmia r3, {q7} @ d14,d15 gteSZ|123x
170 vmov.i32 d28, #0xffff @ 0xffff[32]
171 vmax.s32 d11, d9, d31
172 vshr.s32 d16, d12, #1 @ | gteH/2 (adjust for cmp)
174 vmin.u32 d11, d28 @ saturate to 0..0xffff limD/fSZ3
175 vmovl.s16 q9, d10 @ || expand gteIR|123
176 vshl.u32 d13, d12, #16 @ | preparing gteH
181 vsli.u64 d15, d11, #32 @ new gteSZ|0123 in q7
182 vclt.u32 d16, d16, d11 @ gteH/2 < fSZ3?
184 add r3, r0, #4*(32+24)
185 vld1.32 d4, [r3] @ || gteOF|XY
186 add r3, r0, #4*(32+27)
187 vld1.32 d6, [r3] @ || gteDQ|AB
190 vmovl.s32 q2, d4 @ || gteOF|XY [64]
191 vmax.u32 d11, d26 @ make divisor 1 if not
192 vmovl.s32 q3, d6 @ || gteDQ|AB [64]
193 add r3, r0, #4*16 @ | gteSZ*
194 vstmia r3, {q7} @ | d14,d15 gteSZ|123x
196 vcvt.f32.u32 d13, d13 @ gteH (float for div)
197 vcvt.f32.u32 d11, d11 @ divisor
199 @ divide.. it's not worth messing with reciprocals here
200 @ just for 1 value, let's just use VFP divider here
201 vdiv.f32 s22, s26, s22
203 vcvt.u32.f32 d11, d11 @ quotient
205 @ while NEON's busy we calculate some flags on ARM
208 ldmia r3, {r4-r6} @ gteMAC|123
210 vst1.32 d11, [r1, :64] @ wb quotient for flags (pre-limE)
213 do_mac_flags r4, r5, r6
215 vshr.u32 d11, #15 @ quotient (limE)
217 do_irs_flags r4, r5, r6
219 vmlal.s32 q2, d18, d11[0]@ gteOF|XY + gteIR|12 * quotient
221 vld1.32 d16, [r3] @ || load fS|XY12, new 01
222 vqmovn.s64 d18, q2 @ saturate to 32
223 vmull.s32 q10, d6, d11[0]@ | d20 = gteDQA * quotient
224 vqshl.s32 d19, d18, #5 @ 11bit precision
226 ldr r4, [r1] @ quotient
229 orrne lr, #(1<<18) @ fSZ (limD)
231 vst1.32 d18, [r1, :64] @ writeback fS|XY2 before limG
233 vshr.s32 d18, d19, #16+5@ can't vqshrn because of insn
234 vadd.s64 d20, d7 @ | gteDQB + gteDQA * quotient
235 vmovn.s32 d18, q9 @ fS|XY2 [s16]
237 vqmovn.s64 d20, q10 @ | gteMAC0
239 vst1.32 d16, [r3]! @ writeback fS|XY01
240 vst1.32 d18[0], [r3] @ ...2
242 vshr.s32 d21, d20, #12
243 vst1.32 d20[0], [r3] @ gteMAC0
247 orrne lr, #(1<<17) @ limE
250 vmov.i32 d22, #0x1000
253 vst1.16 d21[0], [r3] @ gteIR0
255 ldmia r1, {r4,r5} @ fS|XY2 before limG, after 11bit sat
256 add r2, r4, #0x400<<16
257 add r3, r5, #0x400<<16
259 orrne lr, #(1<<14) @ limG1
262 orrne lr, #(1<<13) @ limG2
266 orrvs lr, #(1<<16) @ F
272 ldr r4, [r0, #4*24] @ gteMAC0
276 orrvs lr, #(1<<16) @ F
279 orrvs lr, #(1<<15) @ F
282 orrhi lr, #(1<<12) @ limH
284 str lr, [r0, #4*(32+31)] @ gteFLAG
287 .size gteRTPS_neon, .-gteRTPS_neon
291 .global gteRTPT_neon @ r0=CP2 (d,c),
295 movw r1, #:lower16:scratch
296 movt r1, #:upper16:scratch
301 vmov.i32 d22, #0x7fffffff
302 vmov.i32 d23, #0x80000000
306 vldmia r2!, {d8} @ VXYZ(v)
307 vmov.16 d8[3], r12 @ kill unused upper vector
310 vmin.s32 d22, d8 @ min gteMAC|12
311 vmax.s32 d23, d8 @ max gteMAC|12
313 vst1.32 {d9,d10}, [r1, :128]!
316 vst1.32 {d22,d23}, [r1, :128]! @ min/max gteMAC|12, for flags
320 vldmia r1, {d0-d3} @ note: d4,d5 is for gteOF|XY
322 vmov d20, d0 @ gteMAC3 v=0
323 vmin.s16 d24, d1, d3 @ | find min IR
324 vshr.s32 d22, d12, #1 @ || gteH/2 (adjust for cmp)
325 vmax.s16 d25, d1, d3 @ | .. also max, for flag gen
326 vsli.u64 d20, d2, #32 @ gteMAC3 v=1
327 vmov d21, d9 @ ... v=2
329 vmov.i32 q14, #0xffff @ 0xffff[32]
332 vdup.32 q11, d22[0] @ gteH/2
333 vmin.u32 q10, q14 @ saturate to 0..0xffff limD/fSZ(v)
334 vmin.s16 d24, d10 @ | find min/max IR
335 vmax.s16 d25, d10 @ |
337 add r3, r0, #4*19 @ ||
338 vld1.32 d14[0], [r3] @ || gteSZ3
340 vclt.u32 q11, q11, q10 @ gteH/2 < fSZ(v)?
342 vst1.32 d20, [r3]! @ | writeback fSZ(v)
344 vst1.32 d21[0], [r3] @ |
345 vmax.u32 q10, q11, q13 @ make divisor 1 if not
347 vstmia r3, {q12} @ min/max IR for flags
348 vcvt.f32.u32 q10, q10
349 vshl.u32 d13, d12, #16 @ | preparing gteH
351 @ while NEON's busy we calculate some flags on ARM
354 ldmia r2, {r4-r7} @ min/max gteMAC|12
356 orrvs lr, #(1<<31)|(1<<27)
358 orrvs lr, #(1<<31)|(1<<26)
363 ldr r4, [r1, #0] @ gteMAC3 v=0
364 ldr r5, [r1, #8*2] @ ... v=1
365 ldr r6, [r1, #8*4] @ ... v=2
367 add r3, r0, #4*(32+24)
368 vld1.32 d4, [r3] @ || gteOF|XY
369 add r3, r0, #4*(32+27)
370 vld1.32 d6, [r3] @ || gteDQ|AB
374 vrecpe.f32 q11, q10 @ inv
375 vmovl.s32 q2, d4 @ || gteOF|XY [64]
376 vmovl.s32 q3, d6 @ || gteDQ|AB [64]
377 vrecps.f32 q12, q10, q11 @ step
378 vcvt.f32.u32 d13, d13 @ | gteH (float for div)
379 vmul.f32 q11, q12, q11 @ better inv
381 vst1.32 d14[0], [r3] @ gteSZ0 = gteSZ3
382 vdup.32 q13, d13[0] @ |
383 @ vrecps.f32 q12, q10, q11 @ step
384 @ vmul.f32 q11, q12, q11 @ better inv
385 vmul.f32 q10, q13, q11 @ result
387 vmovl.s32 q2, d4 @ || gteOF|XY [64]
388 vmovl.s32 q3, d6 @ || gteDQ|AB [64]
389 vcvt.f32.u32 d13, d13 @ | gteH (float for div)
390 vdup.32 q13, d13[0] @ |
392 vst1.32 d14[0], [r3] @ gteSZ0 = gteSZ3
395 vmov q0, q10 @ to test against C code
403 do_mac_flags3x r4, r5, r6, (1<<31)|(1<<25), (1<<27) @ MAC3
407 ldmia r4, {r7,r8,r10,r11} @ min/max IR
411 orrne lr, #(1<<18) @ fSZ (limD)
413 @ vadd.f32 q10, q @ adjust for vcvt rounding mode
415 vmovl.s16 q9, d1 @ expand gteIR|12 v=0
416 vmovl.s16 q10, d3 @ expand gteIR|12 v=1
418 vstmia r6, {q8} @ wb quotients for flags (pre-limE)
420 vmovl.s16 q11, d10 @ expand gteIR|12 v=2
421 vshr.u32 q8, #15 @ quotients (limE)
424 vdup.32 d26, d17[0] @ quotient (dup)
426 @ flags for minIR012 (r7,r8), maxIR012 (r10,r11)
431 orrvs lr, #(1<<23) @ IR2/limB2
432 rsbs r2, r4, r7, lsl #16
433 cmnvc r4, r10, lsl #16
434 orrvs lr, #(1<<31)|(1<<24) @ IR1/limB1
435 rsbs r2, r4, r8, lsl #16
436 cmnvc r4, r11, lsl #16
437 orrvs lr, #(1<<22) @ IR3/limB3
439 vmull.s32 q9, d18, d24 @ gteIR|12 * quotient v=0
440 vmull.s32 q10, d20, d25 @ ... v=1
441 vmull.s32 q11, d22, d26 @ ... v=2
442 vadd.s64 q9, q2 @ gteOF|XY + gteIR|12 * quotient
443 vadd.s64 q10, q2 @ ... v=1
444 vadd.s64 q11, q2 @ ... v=2
445 vqmovn.s64 d18, q9 @ saturate to 32 v=0
446 vqmovn.s64 d19, q10 @ ... v=1
447 vqmovn.s64 d20, q11 @ ... v=2
448 vmin.s32 d14, d18, d19 @ || find min/max fS|XY(v) [32]
449 vmax.s32 d15, d18, d19 @ || for flags
452 vqshl.s32 q11, q9, #5 @ 11bit precision, v=0,1
453 vqshl.s32 d24, d20, #5 @ ... v=2
454 vmull.s32 q13, d6, d17 @ | gteDQA * quotient v=2
455 vpmin.s32 d16, d14, d31 @ || also find min/max in pair
456 vpmax.s32 d17, d15, d31 @ ||
457 vshr.s32 q11, #16+5 @ can't vqshrn because of insn
458 vshr.s32 d24, #16+5 @ encoding doesn't allow 21 :(
459 vsli.u64 d16, d17, #32 @ || pack in-pair min/max
460 vadd.s64 d26, d7 @ | gteDQB + gteDQA * quotient
461 vmovn.s32 d12, q11 @ fS|XY(v) [s16] v=0,1
462 vmovn.s32 d13, q12 @ 3
463 vstmia r1, {d14-d16} @ || other cacheline than quotients
465 vst1.32 d12, [r3]! @ writeback fS|XY v=0,1
468 vqmovn.s64 d26, q13 @ | gteMAC0
469 vmovl.u16 q5, d10 @ expand gteIR|123 v=2
471 vmov.i32 d13, #0x1000
472 vshr.s32 d12, d26, #12
475 vst1.32 d26[0], [r3]! @ gteMAC0
477 vst1.32 d8, [r3]! @ gteMAC123 (last iteration)
480 vmin.s32 d12, d13 @ | gteIR0
482 ldmia r6, {r4-r6} @ quotients
488 vst1.32 d12[0], [r3]! @ gteIR0
489 vst1.32 d10, [r3]! @ gteIR12
490 vst1.32 d11[0], [r3] @ ..3
493 orrne lr, #(1<<31) @ limE
494 orrne lr, #(1<<17) @ limE
496 add r2, r4, #0x400<<16 @ min fSX
497 add r3, r6, #0x400<<16 @ max fSX
500 orrne lr, #(1<<31) @ limG1
502 add r2, r5, #0x400<<16 @ min fSY
503 add r3, r7, #0x400<<16 @ max fSY
506 orrne lr, #(1<<31) @ limG2
509 orrvs lr, #(1<<16) @ F (31 already done by above)
512 ldr r4, [r0, #4*24] @ gteMAC0
517 orrvs lr, #(1<<31) @ F
520 orrvs lr, #(1<<31) @ F
522 orrhi lr, #(1<<12) @ limH
524 str lr, [r0, #4*(32+31)] @ gteFLAG
527 .size gteRTPT_neon, .-gteRTPT_neon
531 .global gteMVMVA_neon @ r0=CP2 (d,c), op
537 ubfx r2, r1, #15, #2 @ v
539 vmov.i32 q0, #0 @ d0,d1
540 vmov.i32 q1, #0 @ d2,d3
541 vmov.i32 q2, #0 @ d4,d5
544 addne r3, r0, r2, lsl #3
547 pkhbteq r4, r3, r4, lsl #16
550 vmov.32 d8[1], r5 @ VXYZ(v)
551 ubfx r3, r1, #17, #2 @ mx
552 ubfx r2, r1, #13, #2 @ cv
554 beq 0f @ very rare case
555 add r3, r12, r3, lsl #5
556 vldmia r3, {d0-d2} @ MXxy/gteR* [16*9]
559 add r3, r12, r2, lsl #5
562 vldmia r3, {d4-d5} @ CVx/gteTR*
566 vext.16 d2, d1, d2, #2 @ xxx3 -> x321
567 vext.16 d1, d0, d1, #3 @ xx32 -> x321
568 vshll.s32 q3, d5, #12 @ gteTRZ/CV3
569 vshll.s32 q2, d4, #12 @ gteTR|XY/CV12
573 vmull.s16 q10, d2, d8
574 vpadd.s32 d16, d16, d17
575 vpadd.s32 d17, d18, d19
576 vpadd.s32 d18, d20, d21
584 vqmovn.s64 d8, q2 @ gteMAC|12
585 vqmovn.s64 d9, q3 @ gteMAC3
589 vqmovn.s32 d10, q4 @ gteIR|123
591 vst1.32 d9[0], [r3] @ wb gteMAC|123
596 vmovl.s16 q9, d10 @ expand gteIR|123
605 moveq r2, #0x8000 @ adj
606 moveq r12, #16 @ shift
609 ldmia r3, {r3-r5} @ gteMAC|123
611 do_mac_flags r3, r4, r5
617 orrne lr, #(1<<31)|(1<<24) @ IR1/limB1
620 orrne lr, #(1<<23) @ IR2/limB2
622 orrne lr, #(1<<22) @ IR3/limB3
623 str lr, [r0, #4*(32+31)] @ gteFLAG
626 .size gteMVMVA_neon, .-gteMVMVA_neon
630 @ the name is misnormer, this doesn't use NEON but oh well..
631 .global gteNCLIP_neon @ r0=CP2 (d,c),
640 sub r12, r4, r5 @ 3: gteSY0 - gteSY1
641 sub r5, r5, r6 @ 1: gteSY1 - gteSY2
643 smull r1, r5, r1, r5 @ RdLo, RdHi
644 sub r6, r4 @ 2: gteSY2 - gteSY0
649 smlal r1, r5, r3, r12
655 movtgt lr, #((1<<31)|(1<<16))>>16
656 mvngt r1, #1<<31 @ maxint
658 movmi r1, #1<<31 @ minint
661 str lr, [r0, #4*(32+31)] @ gteFLAG
664 .size gteNCLIP_neon, .-gteNCLIP_neon
667 @ vim:filetype=armasm