1 // stop compiling if NORECBUILD build (only for Visual Studio)
2 #if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
10 /********************/
12 /* fild m32 to fpu reg stack */
13 void FILD32( uptr from )
15 MEMADDR_OP(0, VAROP1(0xDB), false, 0, from, 0);
18 /* fistp m32 from fpu reg stack */
19 void FISTP32( uptr from )
21 MEMADDR_OP(0, VAROP1(0xDB), false, 3, from, 0);
24 /* fld m32 to fpu reg stack */
25 void FLD32( uptr from )
27 MEMADDR_OP(0, VAROP1(0xD9), false, 0, from, 0);
31 void FLD(int st) { write16(0xc0d9+(st<<8)); }
33 void FLD1() { write16(0xe8d9); }
34 void FLDL2E() { write16(0xead9); }
36 /* fst m32 from fpu reg stack */
39 MEMADDR_OP(0, VAROP1(0xD9), false, 2, to, 0);
42 /* fstp m32 from fpu reg stack */
43 void FSTP32( uptr to )
45 MEMADDR_OP(0, VAROP1(0xD9), false, 3, to, 0);
49 void FSTP(int st) { write16(0xd8dd+(st<<8)); }
51 /* fldcw fpu control word from m16 */
52 void FLDCW( uptr from )
54 MEMADDR_OP(0, VAROP1(0xD9), false, 5, from, 0);
57 /* fnstcw fpu control word to m16 */
58 void FNSTCW( uptr to )
60 MEMADDR_OP(0, VAROP1(0xD9), false, 7, to, 0);
63 void FNSTSWtoAX( void )
73 void FDECSTP() { write16(0xf6d9); }
74 void FRNDINT() { write16(0xfcd9); }
75 void FXCH(int st) { write16(0xc8d9+(st<<8)); }
76 void F2XM1() { write16(0xf0d9); }
77 void FSCALE() { write16(0xfdd9); }
79 /* fadd ST(src) to fpu reg stack ST(0) */
80 void FADD32Rto0( x86IntRegType src )
86 /* fadd ST(0) to fpu reg stack ST(src) */
87 void FADD320toR( x86IntRegType src )
93 /* fsub ST(src) to fpu reg stack ST(0) */
94 void FSUB32Rto0( x86IntRegType src )
100 /* fsub ST(0) to fpu reg stack ST(src) */
101 void FSUB320toR( x86IntRegType src )
104 write8( 0xE8 + src );
107 /* fsubp -> substract ST(0) from ST(1), store in ST(1) and POP stack */
114 /* fmul ST(src) to fpu reg stack ST(0) */
115 void FMUL32Rto0( x86IntRegType src )
118 write8( 0xC8 + src );
121 /* fmul ST(0) to fpu reg stack ST(src) */
122 void FMUL320toR( x86IntRegType src )
125 write8( 0xC8 + src );
128 /* fdiv ST(src) to fpu reg stack ST(0) */
129 void FDIV32Rto0( x86IntRegType src )
132 write8( 0xF0 + src );
135 /* fdiv ST(0) to fpu reg stack ST(src) */
136 void FDIV320toR( x86IntRegType src )
139 write8( 0xF8 + src );
142 void FDIV320toRP( x86IntRegType src )
145 write8( 0xF8 + src );
148 /* fadd m32 to fpu reg stack */
149 void FADD32( uptr from )
151 MEMADDR_OP(0, VAROP1(0xD8), false, 0, from, 0);
154 /* fsub m32 to fpu reg stack */
155 void FSUB32( uptr from )
157 MEMADDR_OP(0, VAROP1(0xD8), false, 4, from, 0);
160 /* fmul m32 to fpu reg stack */
161 void FMUL32( uptr from )
163 MEMADDR_OP(0, VAROP1(0xD8), false, 1, from, 0);
166 /* fdiv m32 to fpu reg stack */
167 void FDIV32( uptr from )
169 MEMADDR_OP(0, VAROP1(0xD8), false, 6, from, 0);
172 /* fabs fpu reg stack */
178 /* fsqrt fpu reg stack */
184 void FPATAN(void) { write16(0xf3d9); }
185 void FSIN(void) { write16(0xfed9); }
187 /* fchs fpu reg stack */
193 /* fcomi st, st(i) */
194 void FCOMI( x86IntRegType src )
197 write8( 0xF0 + src );
200 /* fcomip st, st(i) */
201 void FCOMIP( x86IntRegType src )
204 write8( 0xF0 + src );
207 /* fucomi st, st(i) */
208 void FUCOMI( x86IntRegType src )
211 write8( 0xE8 + src );
214 /* fucomip st, st(i) */
215 void FUCOMIP( x86IntRegType src )
218 write8( 0xE8 + src );
221 /* fcom m32 to fpu reg stack */
222 void FCOM32( uptr from )
224 MEMADDR_OP(0, VAROP1(0xD8), false, 2, from, 0);
227 /* fcomp m32 to fpu reg stack */
228 void FCOMP32( uptr from )
230 MEMADDR_OP(0, VAROP1(0xD8), false, 3, from, 0);
233 #define FCMOV32( low, high ) \
236 write8( high + from ); \
239 void FCMOVB32( x86IntRegType from ) { FCMOV32( 0xDA, 0xC0 ); }
240 void FCMOVE32( x86IntRegType from ) { FCMOV32( 0xDA, 0xC8 ); }
241 void FCMOVBE32( x86IntRegType from ) { FCMOV32( 0xDA, 0xD0 ); }
242 void FCMOVU32( x86IntRegType from ) { FCMOV32( 0xDA, 0xD8 ); }
243 void FCMOVNB32( x86IntRegType from ) { FCMOV32( 0xDB, 0xC0 ); }
244 void FCMOVNE32( x86IntRegType from ) { FCMOV32( 0xDB, 0xC8 ); }
245 void FCMOVNBE32( x86IntRegType from ) { FCMOV32( 0xDB, 0xD0 ); }
246 void FCMOVNU32( x86IntRegType from ) { FCMOV32( 0xDB, 0xD8 ); }