11 #include "../psxdma.h"
13 #include "../psxmem.h"
14 #include "../r3000a.h"
16 #include "../frontend/main.h"
21 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
22 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
25 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
27 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
28 # define LE32TOH(x) __builtin_bswap32(x)
29 # define HTOLE32(x) __builtin_bswap32(x)
30 # define LE16TOH(x) __builtin_bswap16(x)
31 # define HTOLE16(x) __builtin_bswap16(x)
33 # define LE32TOH(x) (x)
34 # define HTOLE32(x) (x)
35 # define LE16TOH(x) (x)
36 # define HTOLE16(x) (x)
40 # define likely(x) __builtin_expect(!!(x),1)
41 # define unlikely(x) __builtin_expect(!!(x),0)
43 # define likely(x) (x)
44 # define unlikely(x) (x)
50 static struct lightrec_state *lightrec_state;
52 static char *name = "retroarch.exe";
54 static bool use_lightrec_interpreter;
55 static bool use_pcsx_interpreter;
57 static u32 lightrec_begin_cycles;
84 static void (*cp2_ops[])(struct psxCP2Regs *) = {
85 [OP_CP2_RTPS] = gteRTPS,
86 [OP_CP2_RTPS] = gteRTPS,
87 [OP_CP2_NCLIP] = gteNCLIP,
89 [OP_CP2_DPCS] = gteDPCS,
90 [OP_CP2_INTPL] = gteINTPL,
91 [OP_CP2_MVMVA] = gteMVMVA,
92 [OP_CP2_NCDS] = gteNCDS,
93 [OP_CP2_CDP] = gteCDP,
94 [OP_CP2_NCDT] = gteNCDT,
95 [OP_CP2_NCCS] = gteNCCS,
97 [OP_CP2_NCS] = gteNCS,
98 [OP_CP2_NCT] = gteNCT,
99 [OP_CP2_SQR] = gteSQR,
100 [OP_CP2_DCPL] = gteDCPL,
101 [OP_CP2_DPCT] = gteDPCT,
102 [OP_CP2_AVSZ3] = gteAVSZ3,
103 [OP_CP2_AVSZ4] = gteAVSZ4,
104 [OP_CP2_RTPT] = gteRTPT,
105 [OP_CP2_GPF] = gteGPF,
106 [OP_CP2_GPL] = gteGPL,
107 [OP_CP2_NCCT] = gteNCCT,
110 static char cache_buf[64 * 1024];
112 static void cop2_op(struct lightrec_state *state, u32 func)
114 struct lightrec_registers *regs = lightrec_get_registers(state);
118 if (unlikely(!cp2_ops[func & 0x3f])) {
119 fprintf(stderr, "Invalid CP2 function %u\n", func);
121 /* This works because regs->cp2c comes right after regs->cp2d,
122 * so it can be cast to a pcsxCP2Regs pointer. */
123 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
127 static bool has_interrupt(void)
129 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
130 (psxRegs.CP0.n.Status & 0x401) == 0x401) ||
131 (psxRegs.CP0.n.Status & psxRegs.CP0.n.Cause & 0x0300);
134 static void lightrec_restore_state(struct lightrec_state *state)
136 lightrec_reset_cycle_count(state, psxRegs.cycle);
138 if (booting || has_interrupt())
139 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
141 lightrec_set_target_cycle_count(state, next_interupt);
144 static void hw_write_byte(struct lightrec_state *state,
145 u32 op, void *host, u32 mem, u8 val)
147 psxRegs.cycle = lightrec_current_cycle_count(state);
149 psxHwWrite8(mem, val);
151 lightrec_restore_state(state);
154 static void hw_write_half(struct lightrec_state *state,
155 u32 op, void *host, u32 mem, u16 val)
157 psxRegs.cycle = lightrec_current_cycle_count(state);
159 psxHwWrite16(mem, val);
161 lightrec_restore_state(state);
164 static void hw_write_word(struct lightrec_state *state,
165 u32 op, void *host, u32 mem, u32 val)
167 psxRegs.cycle = lightrec_current_cycle_count(state);
169 psxHwWrite32(mem, val);
171 lightrec_restore_state(state);
174 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
178 psxRegs.cycle = lightrec_current_cycle_count(state);
180 val = psxHwRead8(mem);
182 lightrec_restore_state(state);
187 static u16 hw_read_half(struct lightrec_state *state,
188 u32 op, void *host, u32 mem)
192 psxRegs.cycle = lightrec_current_cycle_count(state);
194 val = psxHwRead16(mem);
196 lightrec_restore_state(state);
201 static u32 hw_read_word(struct lightrec_state *state,
202 u32 op, void *host, u32 mem)
206 psxRegs.cycle = lightrec_current_cycle_count(state);
208 val = psxHwRead32(mem);
210 lightrec_restore_state(state);
215 static struct lightrec_mem_map_ops hw_regs_ops = {
224 static u32 cache_ctrl;
226 static void cache_ctrl_write_word(struct lightrec_state *state,
227 u32 op, void *host, u32 mem, u32 val)
232 static u32 cache_ctrl_read_word(struct lightrec_state *state,
233 u32 op, void *host, u32 mem)
238 static struct lightrec_mem_map_ops cache_ctrl_ops = {
239 .sw = cache_ctrl_write_word,
240 .lw = cache_ctrl_read_word,
243 static struct lightrec_mem_map lightrec_map[] = {
244 [PSX_MAP_KERNEL_USER_RAM] = {
245 /* Kernel and user memory */
254 [PSX_MAP_SCRATCH_PAD] = {
259 [PSX_MAP_PARALLEL_PORT] = {
264 [PSX_MAP_HW_REGISTERS] = {
265 /* Hardware registers */
270 [PSX_MAP_CACHE_CONTROL] = {
274 .ops = &cache_ctrl_ops,
277 /* Mirrors of the kernel/user memory */
278 [PSX_MAP_MIRROR1] = {
281 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
283 [PSX_MAP_MIRROR2] = {
286 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
288 [PSX_MAP_MIRROR3] = {
291 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
293 [PSX_MAP_CODE_BUFFER] = {
294 .length = CODE_BUFFER_SIZE,
298 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
301 memcpy(psxM, cache_buf, sizeof(cache_buf));
303 memcpy(cache_buf, psxM, sizeof(cache_buf));
306 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
346 return is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
377 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
382 static const struct lightrec_ops lightrec_ops = {
384 .enable_ram = lightrec_enable_ram,
385 .hw_direct = lightrec_can_hw_direct,
388 static int lightrec_plugin_init(void)
390 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
391 lightrec_map[PSX_MAP_BIOS].address = psxR;
392 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
393 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
395 if (LIGHTREC_CUSTOM_MAP) {
396 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
397 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
398 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
399 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
400 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
403 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
404 if (getenv("LIGHTREC_BEGIN_CYCLES"))
405 lightrec_begin_cycles = (unsigned int) strtol(
406 getenv("LIGHTREC_BEGIN_CYCLES"), NULL, 0);
408 lightrec_state = lightrec_init(name,
409 lightrec_map, ARRAY_SIZE(lightrec_map),
412 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
416 // (uintptr_t) psxH);
419 signal(SIGPIPE, exit);
424 static void lightrec_dump_regs(struct lightrec_state *state)
426 struct lightrec_registers *regs = lightrec_get_registers(state);
428 if (unlikely(booting))
429 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
430 psxRegs.CP0.n.Status = regs->cp0[12];
431 psxRegs.CP0.n.Cause = regs->cp0[13];
434 static void lightrec_restore_regs(struct lightrec_state *state)
436 struct lightrec_registers *regs = lightrec_get_registers(state);
438 if (unlikely(booting))
439 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
440 regs->cp0[12] = psxRegs.CP0.n.Status;
441 regs->cp0[13] = psxRegs.CP0.n.Cause;
442 regs->cp0[14] = psxRegs.CP0.n.EPC;
445 extern void intExecuteBlock();
446 extern void gen_interupt();
448 static void lightrec_plugin_execute_block(void)
450 u32 old_pc = psxRegs.pc;
455 // step during early boot so that 0x80030000 fastboot hack works
457 next_interupt = psxRegs.cycle;
459 if (use_pcsx_interpreter) {
462 lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
463 lightrec_restore_regs(lightrec_state);
465 if (unlikely(use_lightrec_interpreter)) {
466 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
470 psxRegs.pc = lightrec_execute(lightrec_state,
471 psxRegs.pc, next_interupt);
474 psxRegs.cycle = lightrec_current_cycle_count(lightrec_state);
476 lightrec_dump_regs(lightrec_state);
477 flags = lightrec_exit_flags(lightrec_state);
479 if (flags & LIGHTREC_EXIT_SEGFAULT) {
480 fprintf(stderr, "Exiting at cycle 0x%08x\n",
485 if (flags & LIGHTREC_EXIT_SYSCALL)
486 psxException(0x20, 0);
488 if (booting && (psxRegs.pc & 0xff800000) == 0x80000000)
492 if ((psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x300) &&
493 (psxRegs.CP0.n.Status & 0x1)) {
494 /* Handle software interrupts */
495 psxRegs.CP0.n.Cause &= ~0x7c;
496 psxException(psxRegs.CP0.n.Cause, 0);
500 static void lightrec_plugin_execute(void)
505 lightrec_plugin_execute_block();
508 static void lightrec_plugin_clear(u32 addr, u32 size)
510 if (addr == 0 && size == UINT32_MAX)
511 lightrec_invalidate_all(lightrec_state);
513 /* size * 4: PCSX uses DMA units */
514 lightrec_invalidate(lightrec_state, addr, size * 4);
517 static void lightrec_plugin_notify(int note, void *data)
520 To change once proper icache emulation is emulated
523 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
524 lightrec_plugin_clear(0, 0x200000/4);
526 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
527 // Sent from psxDma3().
528 case R3000ACPU_NOTIFY_DMA3_EXE_LOAD:
534 static void lightrec_plugin_apply_config()
538 static void lightrec_plugin_shutdown(void)
540 lightrec_destroy(lightrec_state);
543 static void lightrec_plugin_reset(void)
545 struct lightrec_registers *regs;
547 regs = lightrec_get_registers(lightrec_state);
549 /* Invalidate all blocks */
550 lightrec_invalidate_all(lightrec_state);
552 /* Reset registers */
553 memset(regs, 0, sizeof(*regs));
555 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
556 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
561 void lightrec_plugin_prepare_load_state(void)
563 struct lightrec_registers *regs;
565 regs = lightrec_get_registers(lightrec_state);
566 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
567 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
568 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
570 lightrec_invalidate_all(lightrec_state);
573 void lightrec_plugin_prepare_save_state(void)
575 struct lightrec_registers *regs;
577 regs = lightrec_get_registers(lightrec_state);
578 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
579 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
580 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
585 lightrec_plugin_init,
586 lightrec_plugin_reset,
587 lightrec_plugin_execute,
588 lightrec_plugin_execute_block,
589 lightrec_plugin_clear,
590 lightrec_plugin_notify,
591 lightrec_plugin_apply_config,
592 lightrec_plugin_shutdown,