17 #include "../psxdma.h"
19 #include "../psxmem.h"
20 #include "../r3000a.h"
21 #include "../psxinterpreter.h"
22 #include "../new_dynarec/events.h"
24 #include "../frontend/main.h"
29 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
30 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
33 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
35 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
36 # define LE32TOH(x) __builtin_bswap32(x)
37 # define HTOLE32(x) __builtin_bswap32(x)
38 # define LE16TOH(x) __builtin_bswap16(x)
39 # define HTOLE16(x) __builtin_bswap16(x)
41 # define LE32TOH(x) (x)
42 # define HTOLE32(x) (x)
43 # define LE16TOH(x) (x)
44 # define HTOLE16(x) (x)
48 # define likely(x) __builtin_expect(!!(x),1)
49 # define unlikely(x) __builtin_expect(!!(x),0)
51 # define likely(x) (x)
52 # define unlikely(x) (x)
60 static struct lightrec_state *lightrec_state;
62 static char *name = "retroarch.exe";
64 static bool use_lightrec_interpreter;
65 static bool use_pcsx_interpreter;
66 static bool block_stepping;
67 static u32 cycle_mult_to_pcsx; // 22.10 fractional
68 static u32 cycle_mult_from_pcsx;
95 static void (*cp2_ops[])(struct psxCP2Regs *) = {
96 [OP_CP2_RTPS] = gteRTPS,
97 [OP_CP2_RTPS] = gteRTPS,
98 [OP_CP2_NCLIP] = gteNCLIP,
100 [OP_CP2_DPCS] = gteDPCS,
101 [OP_CP2_INTPL] = gteINTPL,
102 [OP_CP2_MVMVA] = gteMVMVA,
103 [OP_CP2_NCDS] = gteNCDS,
104 [OP_CP2_CDP] = gteCDP,
105 [OP_CP2_NCDT] = gteNCDT,
106 [OP_CP2_NCCS] = gteNCCS,
108 [OP_CP2_NCS] = gteNCS,
109 [OP_CP2_NCT] = gteNCT,
110 [OP_CP2_SQR] = gteSQR,
111 [OP_CP2_DCPL] = gteDCPL,
112 [OP_CP2_DPCT] = gteDPCT,
113 [OP_CP2_AVSZ3] = gteAVSZ3,
114 [OP_CP2_AVSZ4] = gteAVSZ4,
115 [OP_CP2_RTPT] = gteRTPT,
116 [OP_CP2_GPF] = gteGPF,
117 [OP_CP2_GPL] = gteGPL,
118 [OP_CP2_NCCT] = gteNCCT,
121 static char cache_buf[64 * 1024];
123 static void cop2_op(struct lightrec_state *state, u32 func)
125 struct lightrec_registers *regs = lightrec_get_registers(state);
129 if (unlikely(!cp2_ops[func & 0x3f])) {
130 fprintf(stderr, "Invalid CP2 function %u\n", func);
132 /* This works because regs->cp2c comes right after regs->cp2d,
133 * so it can be cast to a pcsxCP2Regs pointer. */
134 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
138 static bool has_interrupt(void)
140 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
142 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
143 (regs->cp0[12] & 0x401) == 0x401) ||
144 (regs->cp0[12] & regs->cp0[13] & 0x0300);
147 static u32 cycles_pcsx_to_lightrec(u32 c)
149 assert((u64)c * cycle_mult_from_pcsx <= (u32)-1);
150 return c * cycle_mult_from_pcsx >> 10;
153 static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
155 psxRegs.cycle += lightrec_current_cycle_count(state) * cycle_mult_to_pcsx >> 10;
156 lightrec_reset_cycle_count(state, 0);
159 static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
161 s32 cycles_left = next_interupt - psxRegs.cycle;
163 if (block_stepping || cycles_left <= 0 || has_interrupt())
164 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
166 lightrec_set_target_cycle_count(state,
167 cycles_pcsx_to_lightrec(cycles_left));
171 static void hw_write_byte(struct lightrec_state *state,
172 u32 op, void *host, u32 mem, u8 val)
174 lightrec_tansition_to_pcsx(state);
176 psxHwWrite8(mem, val);
178 lightrec_tansition_from_pcsx(state);
181 static void hw_write_half(struct lightrec_state *state,
182 u32 op, void *host, u32 mem, u16 val)
184 lightrec_tansition_to_pcsx(state);
186 psxHwWrite16(mem, val);
188 lightrec_tansition_from_pcsx(state);
191 static void hw_write_word(struct lightrec_state *state,
192 u32 op, void *host, u32 mem, u32 val)
194 lightrec_tansition_to_pcsx(state);
196 psxHwWrite32(mem, val);
198 lightrec_tansition_from_pcsx(state);
201 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
205 lightrec_tansition_to_pcsx(state);
207 val = psxHwRead8(mem);
209 lightrec_tansition_from_pcsx(state);
214 static u16 hw_read_half(struct lightrec_state *state,
215 u32 op, void *host, u32 mem)
219 lightrec_tansition_to_pcsx(state);
221 val = psxHwRead16(mem);
223 lightrec_tansition_from_pcsx(state);
228 static u32 hw_read_word(struct lightrec_state *state,
229 u32 op, void *host, u32 mem)
233 lightrec_tansition_to_pcsx(state);
235 val = psxHwRead32(mem);
237 lightrec_tansition_from_pcsx(state);
242 static struct lightrec_mem_map_ops hw_regs_ops = {
251 static u32 cache_ctrl;
253 static void cache_ctrl_write_word(struct lightrec_state *state,
254 u32 op, void *host, u32 mem, u32 val)
259 static u32 cache_ctrl_read_word(struct lightrec_state *state,
260 u32 op, void *host, u32 mem)
265 static struct lightrec_mem_map_ops cache_ctrl_ops = {
266 .sw = cache_ctrl_write_word,
267 .lw = cache_ctrl_read_word,
270 static struct lightrec_mem_map lightrec_map[] = {
271 [PSX_MAP_KERNEL_USER_RAM] = {
272 /* Kernel and user memory */
281 [PSX_MAP_SCRATCH_PAD] = {
286 [PSX_MAP_PARALLEL_PORT] = {
291 [PSX_MAP_HW_REGISTERS] = {
292 /* Hardware registers */
297 [PSX_MAP_CACHE_CONTROL] = {
301 .ops = &cache_ctrl_ops,
304 /* Mirrors of the kernel/user memory */
305 [PSX_MAP_MIRROR1] = {
308 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
310 [PSX_MAP_MIRROR2] = {
313 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
315 [PSX_MAP_MIRROR3] = {
318 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
321 /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */
322 [PSX_MAP_PPORT_MIRROR] = {
325 .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT],
329 [PSX_MAP_CODE_BUFFER] = {
330 .length = CODE_BUFFER_SIZE,
334 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
337 memcpy(psxM, cache_buf, sizeof(cache_buf));
339 memcpy(cache_buf, psxM, sizeof(cache_buf));
342 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
382 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
413 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
418 #if defined(HW_DOL) || defined(HW_RVL)
419 static void lightrec_code_inv(void *ptr, uint32_t len)
421 extern void DCFlushRange(void *ptr, u32 len);
422 extern void ICInvalidateRange(void *ptr, u32 len);
424 DCFlushRange(ptr, len);
425 ICInvalidateRange(ptr, len);
427 #elif defined(HW_WUP)
428 static void lightrec_code_inv(void *ptr, uint32_t len)
430 wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
434 static const struct lightrec_ops lightrec_ops = {
436 .enable_ram = lightrec_enable_ram,
437 .hw_direct = lightrec_can_hw_direct,
438 #if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
439 .code_inv = lightrec_code_inv,
443 static int lightrec_plugin_init(void)
445 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
446 lightrec_map[PSX_MAP_BIOS].address = psxR;
447 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
448 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
449 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
451 if (!LIGHTREC_CUSTOM_MAP) {
453 code_buffer = mmap(0, CODE_BUFFER_SIZE,
454 PROT_EXEC | PROT_READ | PROT_WRITE,
455 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
456 if (code_buffer == MAP_FAILED)
459 code_buffer = malloc(CODE_BUFFER_SIZE);
465 if (LIGHTREC_CUSTOM_MAP) {
466 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
467 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
468 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
471 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
473 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
475 lightrec_state = lightrec_init(name,
476 lightrec_map, ARRAY_SIZE(lightrec_map),
479 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
483 // (uintptr_t) psxH);
486 signal(SIGPIPE, exit);
491 static void lightrec_plugin_execute_internal(bool block_only)
493 struct lightrec_registers *regs;
494 u32 flags, cycles_pcsx;
496 regs = lightrec_get_registers(lightrec_state);
497 gen_interupt((psxCP0Regs *)regs->cp0);
498 cycles_pcsx = next_interupt - psxRegs.cycle;
499 assert((s32)cycles_pcsx > 0);
501 // step during early boot so that 0x80030000 fastboot hack works
502 block_stepping = block_only;
506 if (use_pcsx_interpreter) {
509 u32 cycles_lightrec = cycles_pcsx_to_lightrec(cycles_pcsx);
510 if (unlikely(use_lightrec_interpreter)) {
511 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
515 psxRegs.pc = lightrec_execute(lightrec_state,
516 psxRegs.pc, cycles_lightrec);
519 lightrec_tansition_to_pcsx(lightrec_state);
521 flags = lightrec_exit_flags(lightrec_state);
523 if (flags & LIGHTREC_EXIT_SEGFAULT) {
524 fprintf(stderr, "Exiting at cycle 0x%08x\n",
529 if (flags & LIGHTREC_EXIT_SYSCALL)
530 psxException(0x20, 0, (psxCP0Regs *)regs->cp0);
533 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
534 /* Handle software interrupts */
535 regs->cp0[13] &= ~0x7c;
536 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
540 static void lightrec_plugin_execute(void)
545 lightrec_plugin_execute_internal(false);
548 static void lightrec_plugin_execute_block(enum blockExecCaller caller)
550 lightrec_plugin_execute_internal(true);
553 static void lightrec_plugin_clear(u32 addr, u32 size)
555 if (addr == 0 && size == UINT32_MAX)
556 lightrec_invalidate_all(lightrec_state);
558 /* size * 4: PCSX uses DMA units */
559 lightrec_invalidate(lightrec_state, addr, size * 4);
562 static void lightrec_plugin_sync_regs_to_pcsx(void);
563 static void lightrec_plugin_sync_regs_from_pcsx(void);
565 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
569 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
570 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
571 /* not used, lightrec calls lightrec_enable_ram() instead */
573 case R3000ACPU_NOTIFY_BEFORE_SAVE:
574 lightrec_plugin_sync_regs_to_pcsx();
576 case R3000ACPU_NOTIFY_AFTER_LOAD:
577 lightrec_plugin_sync_regs_from_pcsx();
582 static void lightrec_plugin_apply_config()
584 u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
585 ? Config.cycle_multiplier_override : Config.cycle_multiplier;
587 cycle_mult_to_pcsx = (cycle_mult * 1024 + 199) / 200;
588 cycle_mult_from_pcsx = (200 * 1024 + cycle_mult/2) / cycle_mult;
591 static void lightrec_plugin_shutdown(void)
593 lightrec_destroy(lightrec_state);
595 if (!LIGHTREC_CUSTOM_MAP) {
597 munmap(code_buffer, CODE_BUFFER_SIZE);
604 static void lightrec_plugin_reset(void)
606 struct lightrec_registers *regs;
608 regs = lightrec_get_registers(lightrec_state);
610 /* Invalidate all blocks */
611 lightrec_invalidate_all(lightrec_state);
613 /* Reset registers */
614 memset(regs, 0, sizeof(*regs));
616 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
617 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
620 static void lightrec_plugin_sync_regs_from_pcsx(void)
622 struct lightrec_registers *regs;
624 regs = lightrec_get_registers(lightrec_state);
625 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
626 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
627 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
629 lightrec_invalidate_all(lightrec_state);
632 static void lightrec_plugin_sync_regs_to_pcsx(void)
634 struct lightrec_registers *regs;
636 regs = lightrec_get_registers(lightrec_state);
637 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
638 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
639 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
644 lightrec_plugin_init,
645 lightrec_plugin_reset,
646 lightrec_plugin_execute,
647 lightrec_plugin_execute_block,
648 lightrec_plugin_clear,
649 lightrec_plugin_notify,
650 lightrec_plugin_apply_config,
651 lightrec_plugin_shutdown,