17 #include "../psxdma.h"
19 #include "../psxmem.h"
20 #include "../r3000a.h"
21 #include "../psxinterpreter.h"
22 #include "../new_dynarec/events.h"
24 #include "../frontend/main.h"
29 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
30 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
33 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
35 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
36 # define LE32TOH(x) __builtin_bswap32(x)
37 # define HTOLE32(x) __builtin_bswap32(x)
38 # define LE16TOH(x) __builtin_bswap16(x)
39 # define HTOLE16(x) __builtin_bswap16(x)
41 # define LE32TOH(x) (x)
42 # define HTOLE32(x) (x)
43 # define LE16TOH(x) (x)
44 # define HTOLE16(x) (x)
48 # define likely(x) __builtin_expect(!!(x),1)
49 # define unlikely(x) __builtin_expect(!!(x),0)
51 # define likely(x) (x)
52 # define unlikely(x) (x)
60 static struct lightrec_state *lightrec_state;
62 static char *name = "retroarch.exe";
64 static bool use_lightrec_interpreter;
65 static bool use_pcsx_interpreter;
66 static bool block_stepping;
93 static void (*cp2_ops[])(struct psxCP2Regs *) = {
94 [OP_CP2_RTPS] = gteRTPS,
95 [OP_CP2_RTPS] = gteRTPS,
96 [OP_CP2_NCLIP] = gteNCLIP,
98 [OP_CP2_DPCS] = gteDPCS,
99 [OP_CP2_INTPL] = gteINTPL,
100 [OP_CP2_MVMVA] = gteMVMVA,
101 [OP_CP2_NCDS] = gteNCDS,
102 [OP_CP2_CDP] = gteCDP,
103 [OP_CP2_NCDT] = gteNCDT,
104 [OP_CP2_NCCS] = gteNCCS,
106 [OP_CP2_NCS] = gteNCS,
107 [OP_CP2_NCT] = gteNCT,
108 [OP_CP2_SQR] = gteSQR,
109 [OP_CP2_DCPL] = gteDCPL,
110 [OP_CP2_DPCT] = gteDPCT,
111 [OP_CP2_AVSZ3] = gteAVSZ3,
112 [OP_CP2_AVSZ4] = gteAVSZ4,
113 [OP_CP2_RTPT] = gteRTPT,
114 [OP_CP2_GPF] = gteGPF,
115 [OP_CP2_GPL] = gteGPL,
116 [OP_CP2_NCCT] = gteNCCT,
119 static char cache_buf[64 * 1024];
121 static void cop2_op(struct lightrec_state *state, u32 func)
123 struct lightrec_registers *regs = lightrec_get_registers(state);
127 if (unlikely(!cp2_ops[func & 0x3f])) {
128 fprintf(stderr, "Invalid CP2 function %u\n", func);
130 /* This works because regs->cp2c comes right after regs->cp2d,
131 * so it can be cast to a pcsxCP2Regs pointer. */
132 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
136 static bool has_interrupt(void)
138 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
140 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
141 (regs->cp0[12] & 0x401) == 0x401) ||
142 (regs->cp0[12] & regs->cp0[13] & 0x0300);
145 static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
147 psxRegs.cycle += lightrec_current_cycle_count(state) / 1024;
148 lightrec_reset_cycle_count(state, 0);
151 static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
153 s32 cycles_left = next_interupt - psxRegs.cycle;
155 if (block_stepping || cycles_left <= 0 || has_interrupt())
156 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
158 lightrec_set_target_cycle_count(state, cycles_left * 1024);
162 static void hw_write_byte(struct lightrec_state *state,
163 u32 op, void *host, u32 mem, u8 val)
165 lightrec_tansition_to_pcsx(state);
167 psxHwWrite8(mem, val);
169 lightrec_tansition_from_pcsx(state);
172 static void hw_write_half(struct lightrec_state *state,
173 u32 op, void *host, u32 mem, u16 val)
175 lightrec_tansition_to_pcsx(state);
177 psxHwWrite16(mem, val);
179 lightrec_tansition_from_pcsx(state);
182 static void hw_write_word(struct lightrec_state *state,
183 u32 op, void *host, u32 mem, u32 val)
185 lightrec_tansition_to_pcsx(state);
187 psxHwWrite32(mem, val);
189 lightrec_tansition_from_pcsx(state);
192 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
196 lightrec_tansition_to_pcsx(state);
198 val = psxHwRead8(mem);
200 lightrec_tansition_from_pcsx(state);
205 static u16 hw_read_half(struct lightrec_state *state,
206 u32 op, void *host, u32 mem)
210 lightrec_tansition_to_pcsx(state);
212 val = psxHwRead16(mem);
214 lightrec_tansition_from_pcsx(state);
219 static u32 hw_read_word(struct lightrec_state *state,
220 u32 op, void *host, u32 mem)
224 lightrec_tansition_to_pcsx(state);
226 val = psxHwRead32(mem);
228 lightrec_tansition_from_pcsx(state);
233 static struct lightrec_mem_map_ops hw_regs_ops = {
242 static u32 cache_ctrl;
244 static void cache_ctrl_write_word(struct lightrec_state *state,
245 u32 op, void *host, u32 mem, u32 val)
250 static u32 cache_ctrl_read_word(struct lightrec_state *state,
251 u32 op, void *host, u32 mem)
256 static struct lightrec_mem_map_ops cache_ctrl_ops = {
257 .sw = cache_ctrl_write_word,
258 .lw = cache_ctrl_read_word,
261 static struct lightrec_mem_map lightrec_map[] = {
262 [PSX_MAP_KERNEL_USER_RAM] = {
263 /* Kernel and user memory */
272 [PSX_MAP_SCRATCH_PAD] = {
277 [PSX_MAP_PARALLEL_PORT] = {
282 [PSX_MAP_HW_REGISTERS] = {
283 /* Hardware registers */
288 [PSX_MAP_CACHE_CONTROL] = {
292 .ops = &cache_ctrl_ops,
295 /* Mirrors of the kernel/user memory */
296 [PSX_MAP_MIRROR1] = {
299 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
301 [PSX_MAP_MIRROR2] = {
304 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
306 [PSX_MAP_MIRROR3] = {
309 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
312 /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */
313 [PSX_MAP_PPORT_MIRROR] = {
316 .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT],
320 [PSX_MAP_CODE_BUFFER] = {
321 .length = CODE_BUFFER_SIZE,
325 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
328 memcpy(psxM, cache_buf, sizeof(cache_buf));
330 memcpy(cache_buf, psxM, sizeof(cache_buf));
333 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
373 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
404 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
409 #if defined(HW_DOL) || defined(HW_RVL)
410 static void lightrec_code_inv(void *ptr, uint32_t len)
412 extern void DCFlushRange(void *ptr, u32 len);
413 extern void ICInvalidateRange(void *ptr, u32 len);
415 DCFlushRange(ptr, len);
416 ICInvalidateRange(ptr, len);
418 #elif defined(HW_WUP)
419 static void lightrec_code_inv(void *ptr, uint32_t len)
421 wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
425 static const struct lightrec_ops lightrec_ops = {
427 .enable_ram = lightrec_enable_ram,
428 .hw_direct = lightrec_can_hw_direct,
429 #if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
430 .code_inv = lightrec_code_inv,
434 static int lightrec_plugin_init(void)
436 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
437 lightrec_map[PSX_MAP_BIOS].address = psxR;
438 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
439 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
440 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
442 if (!LIGHTREC_CUSTOM_MAP) {
444 code_buffer = mmap(0, CODE_BUFFER_SIZE,
445 PROT_EXEC | PROT_READ | PROT_WRITE,
446 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
447 if (code_buffer == MAP_FAILED)
450 code_buffer = malloc(CODE_BUFFER_SIZE);
456 if (LIGHTREC_CUSTOM_MAP) {
457 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
458 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
459 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
462 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
464 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
466 lightrec_state = lightrec_init(name,
467 lightrec_map, ARRAY_SIZE(lightrec_map),
470 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
474 // (uintptr_t) psxH);
477 signal(SIGPIPE, exit);
482 static void lightrec_plugin_execute_internal(bool block_only)
484 struct lightrec_registers *regs;
485 u32 flags, cycles_pcsx;
487 regs = lightrec_get_registers(lightrec_state);
488 gen_interupt((psxCP0Regs *)regs->cp0);
489 cycles_pcsx = next_interupt - psxRegs.cycle;
490 assert((s32)cycles_pcsx > 0);
492 // step during early boot so that 0x80030000 fastboot hack works
493 block_stepping = block_only;
497 if (use_pcsx_interpreter) {
500 u32 cycles_lightrec = cycles_pcsx * 1024;
501 if (unlikely(use_lightrec_interpreter)) {
502 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
506 psxRegs.pc = lightrec_execute(lightrec_state,
507 psxRegs.pc, cycles_lightrec);
510 lightrec_tansition_to_pcsx(lightrec_state);
512 flags = lightrec_exit_flags(lightrec_state);
514 if (flags & LIGHTREC_EXIT_SEGFAULT) {
515 fprintf(stderr, "Exiting at cycle 0x%08x\n",
520 if (flags & LIGHTREC_EXIT_SYSCALL)
521 psxException(0x20, 0, (psxCP0Regs *)regs->cp0);
524 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
525 /* Handle software interrupts */
526 regs->cp0[13] &= ~0x7c;
527 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
531 static void lightrec_plugin_execute(void)
536 lightrec_plugin_execute_internal(false);
539 static void lightrec_plugin_execute_block(enum blockExecCaller caller)
541 lightrec_plugin_execute_internal(true);
544 static void lightrec_plugin_clear(u32 addr, u32 size)
546 if (addr == 0 && size == UINT32_MAX)
547 lightrec_invalidate_all(lightrec_state);
549 /* size * 4: PCSX uses DMA units */
550 lightrec_invalidate(lightrec_state, addr, size * 4);
553 static void lightrec_plugin_sync_regs_to_pcsx(void);
554 static void lightrec_plugin_sync_regs_from_pcsx(void);
556 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
560 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
561 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
562 /* not used, lightrec calls lightrec_enable_ram() instead */
564 case R3000ACPU_NOTIFY_BEFORE_SAVE:
565 lightrec_plugin_sync_regs_to_pcsx();
567 case R3000ACPU_NOTIFY_AFTER_LOAD:
568 lightrec_plugin_sync_regs_from_pcsx();
573 static void lightrec_plugin_apply_config()
575 u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
576 ? Config.cycle_multiplier_override : Config.cycle_multiplier;
579 lightrec_set_cycles_per_opcode(lightrec_state, cycle_mult * 1024 / 100);
582 static void lightrec_plugin_shutdown(void)
584 lightrec_destroy(lightrec_state);
586 if (!LIGHTREC_CUSTOM_MAP) {
588 munmap(code_buffer, CODE_BUFFER_SIZE);
595 static void lightrec_plugin_reset(void)
597 struct lightrec_registers *regs;
599 regs = lightrec_get_registers(lightrec_state);
601 /* Invalidate all blocks */
602 lightrec_invalidate_all(lightrec_state);
604 /* Reset registers */
605 memset(regs, 0, sizeof(*regs));
607 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
608 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
611 static void lightrec_plugin_sync_regs_from_pcsx(void)
613 struct lightrec_registers *regs;
615 regs = lightrec_get_registers(lightrec_state);
616 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
617 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
618 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
620 lightrec_invalidate_all(lightrec_state);
623 static void lightrec_plugin_sync_regs_to_pcsx(void)
625 struct lightrec_registers *regs;
627 regs = lightrec_get_registers(lightrec_state);
628 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
629 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
630 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
635 lightrec_plugin_init,
636 lightrec_plugin_reset,
637 lightrec_plugin_execute,
638 lightrec_plugin_execute_block,
639 lightrec_plugin_clear,
640 lightrec_plugin_notify,
641 lightrec_plugin_apply_config,
642 lightrec_plugin_shutdown,