1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
31 #pragma GCC diagnostic ignored "-Wunused-function"
32 #pragma GCC diagnostic ignored "-Wunused-variable"
33 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
36 void indirect_jump_indexed();
49 void jump_vaddr_r10();
50 void jump_vaddr_r12();
52 void * const jump_vaddr_reg[16] = {
71 void invalidate_addr_r0();
72 void invalidate_addr_r1();
73 void invalidate_addr_r2();
74 void invalidate_addr_r3();
75 void invalidate_addr_r4();
76 void invalidate_addr_r5();
77 void invalidate_addr_r6();
78 void invalidate_addr_r7();
79 void invalidate_addr_r8();
80 void invalidate_addr_r9();
81 void invalidate_addr_r10();
82 void invalidate_addr_r12();
84 const u_int invalidate_addr_reg[16] = {
85 (int)invalidate_addr_r0,
86 (int)invalidate_addr_r1,
87 (int)invalidate_addr_r2,
88 (int)invalidate_addr_r3,
89 (int)invalidate_addr_r4,
90 (int)invalidate_addr_r5,
91 (int)invalidate_addr_r6,
92 (int)invalidate_addr_r7,
93 (int)invalidate_addr_r8,
94 (int)invalidate_addr_r9,
95 (int)invalidate_addr_r10,
97 (int)invalidate_addr_r12,
104 static void set_jump_target(void *addr, void *target_)
106 u_int target = (u_int)target_;
108 u_int *ptr2=(u_int *)ptr;
110 assert((target-(u_int)ptr2-8)<1024);
111 assert(((uintptr_t)addr&3)==0);
112 assert((target&3)==0);
113 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
114 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
116 else if(ptr[3]==0x72) {
117 // generated by emit_jno_unlikely
118 if((target-(u_int)ptr2-8)<1024) {
119 assert(((uintptr_t)addr&3)==0);
120 assert((target&3)==0);
121 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
123 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
124 assert(((uintptr_t)addr&3)==0);
125 assert((target&3)==0);
126 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
128 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
131 assert((ptr[3]&0x0e)==0xa);
132 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
136 // This optionally copies the instruction from the target of the branch into
137 // the space before the branch. Works, but the difference in speed is
138 // usually insignificant.
140 static void set_jump_target_fillslot(int addr,u_int target,int copy)
142 u_char *ptr=(u_char *)addr;
143 u_int *ptr2=(u_int *)ptr;
144 assert(!copy||ptr2[-1]==0xe28dd000);
147 assert((target-(u_int)ptr2-8)<4096);
148 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
151 assert((ptr[3]&0x0e)==0xa);
152 u_int target_insn=*(u_int *)target;
153 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
156 if((target_insn&0x0c100000)==0x04100000) { // Load
159 if(target_insn&0x08000000) {
163 ptr2[-1]=target_insn;
166 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
172 static void add_literal(int addr,int val)
174 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
175 literals[literalcount][0]=addr;
176 literals[literalcount][1]=val;
180 // from a pointer to external jump stub (which was produced by emit_extjump2)
181 // find where the jumping insn is
182 static void *find_extjump_insn(void *stub)
184 int *ptr=(int *)(stub+4);
185 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
186 u_int offset=*ptr&0xfff;
187 void **l_ptr=(void *)ptr+offset+8;
191 // find where external branch is liked to using addr of it's stub:
192 // get address that insn one after stub loads (dyna_linker arg1),
193 // treat it as a pointer to branch insn,
194 // return addr where that branch jumps to
196 static void *get_pointer(void *stub)
198 //printf("get_pointer(%x)\n",(int)stub);
199 int *i_ptr=find_extjump_insn(stub);
200 assert((*i_ptr&0x0f000000)==0x0a000000); // b
201 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
205 // Allocate a specific ARM register.
206 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
211 // see if it's already allocated (and dealloc it)
212 for(n=0;n<HOST_REGS;n++)
214 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
215 dirty=(cur->dirty>>n)&1;
220 assert(n == hr || cur->regmap[hr] < 0 || !((cur->noevict >> hr) & 1));
221 cur->regmap[hr] = reg;
222 cur->dirty &= ~(1 << hr);
223 cur->dirty |= dirty << hr;
224 cur->isconst &= ~(1u << hr);
225 cur->noevict |= 1u << hr;
228 // Alloc cycle count into dedicated register
229 static void alloc_cc(struct regstat *cur, int i)
231 alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
234 static void alloc_cc_optional(struct regstat *cur, int i)
236 if (cur->regmap[HOST_CCREG] < 0) {
237 alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
238 cur->noevict &= ~(1u << HOST_CCREG);
244 static unused char regname[16][4] = {
262 static void output_w32(u_int word)
264 *((u_int *)out)=word;
268 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
273 return((rn<<16)|(rd<<12)|rm);
276 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
281 assert((shift&1)==0);
282 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
285 static u_int genimm(u_int imm,u_int *encoded)
293 *encoded=((i&30)<<7)|imm;
296 imm=(imm>>2)|(imm<<30);i-=2;
301 static void genimm_checked(u_int imm,u_int *encoded)
303 u_int ret=genimm(imm,encoded);
308 static u_int genjmp(u_int addr)
310 if (addr < 3) return 0; // a branch that will be patched later
311 int offset = addr-(int)out-8;
312 if (offset < -33554432 || offset >= 33554432) {
313 SysPrintf("genjmp: out of range: %08x\n", offset);
317 return ((u_int)offset>>2)&0xffffff;
320 static unused void emit_breakpoint(void)
322 assem_debug("bkpt #0\n");
323 //output_w32(0xe1200070);
324 output_w32(0xe7f001f0);
327 static void emit_mov(int rs,int rt)
329 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
330 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
333 static void emit_movs(int rs,int rt)
335 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
336 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
339 static void emit_add(int rs1,int rs2,int rt)
341 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
342 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
345 static void emit_adds(int rs1,int rs2,int rt)
347 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
348 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
350 #define emit_adds_ptr emit_adds
352 static void emit_adcs(int rs1,int rs2,int rt)
354 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
355 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
358 static void emit_neg(int rs, int rt)
360 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
361 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
364 static void emit_negs(int rs, int rt)
366 assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
367 output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
370 static void emit_sub(int rs1,int rs2,int rt)
372 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
373 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
376 static void emit_subs(int rs1,int rs2,int rt)
378 assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
379 output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
382 static void emit_zeroreg(int rt)
384 assem_debug("mov %s,#0\n",regname[rt]);
385 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
388 static void emit_loadlp(u_int imm,u_int rt)
390 add_literal((int)out,imm);
391 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
392 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
396 static void emit_movw(u_int imm,u_int rt)
399 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
400 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
403 static void emit_movt(u_int imm,u_int rt)
405 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
406 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
410 static void emit_movimm(u_int imm,u_int rt)
413 if(genimm(imm,&armval)) {
414 assem_debug("mov %s,#%d\n",regname[rt],imm);
415 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
416 }else if(genimm(~imm,&armval)) {
417 assem_debug("mvn %s,#%d\n",regname[rt],imm);
418 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
419 }else if(imm<65536) {
421 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
422 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
423 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
424 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
432 emit_movw(imm&0x0000FFFF,rt);
433 emit_movt(imm&0xFFFF0000,rt);
438 static void emit_pcreladdr(u_int rt)
440 assem_debug("add %s,pc,#?\n",regname[rt]);
441 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
444 static void emit_loadreg(int r, int hr)
446 assert(hr != EXCLUDE_REG);
452 //case HIREG: addr = &hi; break;
453 //case LOREG: addr = &lo; break;
454 case CCREG: addr = &cycle_count; break;
455 case INVCP: addr = &invc_ptr; break;
456 case ROREG: addr = &ram_offset; break;
459 addr = &psxRegs.GPR.r[r];
462 u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
464 assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
465 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
469 static void emit_storereg(int r, int hr)
471 assert(hr != EXCLUDE_REG);
472 int addr = (int)&psxRegs.GPR.r[r];
474 //case HIREG: addr = &hi; break;
475 //case LOREG: addr = &lo; break;
476 case CCREG: addr = (int)&cycle_count; break;
477 default: assert(r < 34); break;
479 u_int offset = addr-(u_int)&dynarec_local;
481 assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
482 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
485 static void emit_test(int rs, int rt)
487 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
488 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
491 static void emit_testimm(int rs,int imm)
494 assem_debug("tst %s,#%d\n",regname[rs],imm);
495 genimm_checked(imm,&armval);
496 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
499 static void emit_testeqimm(int rs,int imm)
502 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
503 genimm_checked(imm,&armval);
504 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
507 static void emit_not(int rs,int rt)
509 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
510 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
513 static void emit_mvneq(int rs,int rt)
515 assem_debug("mvneq %s,%s\n",regname[rt],regname[rs]);
516 output_w32(0x01e00000|rd_rn_rm(rt,0,rs));
519 static void emit_and(u_int rs1,u_int rs2,u_int rt)
521 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
522 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
525 static void emit_or(u_int rs1,u_int rs2,u_int rt)
527 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
528 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
531 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
536 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
537 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
540 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
545 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
546 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
549 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
551 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
552 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
555 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
557 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
558 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
561 static void emit_addimm(u_int rs,int imm,u_int rt)
567 if(genimm(imm,&armval)) {
568 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
569 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
570 }else if(genimm(-imm,&armval)) {
571 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
572 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
574 }else if(rt!=rs&&(u_int)imm<65536) {
575 emit_movw(imm&0x0000ffff,rt);
577 }else if(rt!=rs&&(u_int)-imm<65536) {
578 emit_movw(-imm&0x0000ffff,rt);
581 }else if((u_int)-imm<65536) {
582 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
583 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
584 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
585 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
588 int shift = (ffs(imm) - 1) & ~1;
589 int imm8 = imm & (0xff << shift);
590 genimm_checked(imm8,&armval);
591 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
592 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
599 else if(rs!=rt) emit_mov(rs,rt);
602 static void emit_addimm_ptr(u_int rs, uintptr_t imm, u_int rt)
604 emit_addimm(rs, imm, rt);
607 static void emit_addimm_and_set_flags3(u_int rs, int imm, u_int rt)
609 assert(imm>-65536&&imm<65536);
611 if (genimm(imm, &armval)) {
612 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rs],imm);
613 output_w32(0xe2900000|rd_rn_rm(rt,rs,0)|armval);
614 } else if (genimm(-imm, &armval)) {
615 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rs],imm);
616 output_w32(0xe2500000|rd_rn_rm(rt,rs,0)|armval);
617 } else if (rs != rt) {
618 emit_movimm(imm, rt);
619 emit_adds(rs, rt, rt);
620 } else if (imm < 0) {
621 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
622 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
623 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
624 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
626 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
627 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
628 output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
629 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
633 static void emit_addimm_and_set_flags(int imm, u_int rt)
635 emit_addimm_and_set_flags3(rt, imm, rt);
638 static void emit_addnop(u_int r)
641 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
642 output_w32(0xe2800000|rd_rn_rm(r,r,0));
645 static void emit_andimm(int rs,int imm,int rt)
650 }else if(genimm(imm,&armval)) {
651 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
652 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
653 }else if(genimm(~imm,&armval)) {
654 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
655 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
656 }else if(imm==65535) {
658 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
659 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
660 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
661 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
663 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
664 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
667 assert(imm>0&&imm<65535);
669 assem_debug("mov r14,#%d\n",imm&0xFF00);
670 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
671 assem_debug("add r14,r14,#%d\n",imm&0xFF);
672 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
674 emit_movw(imm,HOST_TEMPREG);
676 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
677 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
681 static void emit_orimm(int rs,int imm,int rt)
685 if(rs!=rt) emit_mov(rs,rt);
686 }else if(genimm(imm,&armval)) {
687 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
688 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
690 assert(imm>0&&imm<65536);
691 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
692 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
693 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
694 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
698 static void emit_xorimm(int rs,int imm,int rt)
702 if(rs!=rt) emit_mov(rs,rt);
703 }else if(genimm(imm,&armval)) {
704 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
705 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
707 assert(imm>0&&imm<65536);
708 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
709 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
710 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
711 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
715 static void emit_shlimm(int rs,u_int imm,int rt)
720 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
721 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
724 static void emit_lsls_imm(int rs,int imm,int rt)
728 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
729 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
732 static unused void emit_lslpls_imm(int rs,int imm,int rt)
736 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
737 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
740 static void emit_shrimm(int rs,u_int imm,int rt)
744 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
745 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
748 static void emit_sarimm(int rs,u_int imm,int rt)
752 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
753 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
756 static void emit_rorimm(int rs,u_int imm,int rt)
760 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
761 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
764 static void emit_signextend16(int rs,int rt)
767 emit_shlimm(rs,16,rt);
768 emit_sarimm(rt,16,rt);
770 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
771 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
775 static void emit_signextend8(int rs,int rt)
778 emit_shlimm(rs,24,rt);
779 emit_sarimm(rt,24,rt);
781 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
782 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
786 static void emit_shl(u_int rs,u_int shift,u_int rt)
792 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
793 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
796 static void emit_shr(u_int rs,u_int shift,u_int rt)
801 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
802 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
805 static void emit_sar(u_int rs,u_int shift,u_int rt)
810 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
811 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
814 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
819 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
820 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
823 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
828 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
829 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
832 static void emit_cmpimm(int rs,int imm)
835 if(genimm(imm,&armval)) {
836 assem_debug("cmp %s,#%d\n",regname[rs],imm);
837 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
838 }else if(genimm(-imm,&armval)) {
839 assem_debug("cmn %s,#%d\n",regname[rs],imm);
840 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
843 emit_movimm(imm,HOST_TEMPREG);
844 assem_debug("cmp %s,r14\n",regname[rs]);
845 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
848 emit_movimm(-imm,HOST_TEMPREG);
849 assem_debug("cmn %s,r14\n",regname[rs]);
850 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
854 static void emit_cmovne_imm(int imm,int rt)
856 assem_debug("movne %s,#%d\n",regname[rt],imm);
858 genimm_checked(imm,&armval);
859 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
862 static void emit_cmovl_imm(int imm,int rt)
864 assem_debug("movlt %s,#%d\n",regname[rt],imm);
866 genimm_checked(imm,&armval);
867 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
870 static void emit_cmovb_imm(int imm,int rt)
872 assem_debug("movcc %s,#%d\n",regname[rt],imm);
874 genimm_checked(imm,&armval);
875 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
878 static void emit_cmovae_imm(int imm,int rt)
880 assem_debug("movcs %s,#%d\n",regname[rt],imm);
882 genimm_checked(imm,&armval);
883 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
886 static void emit_cmovs_imm(int imm,int rt)
888 assem_debug("movmi %s,#%d\n",regname[rt],imm);
890 genimm_checked(imm,&armval);
891 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
894 static unused void emit_cmovne_reg(int rs,int rt)
896 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
897 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
900 static void emit_cmovl_reg(int rs,int rt)
902 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
903 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
906 static void emit_cmovb_reg(int rs,int rt)
908 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
909 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
912 static void emit_cmovs_reg(int rs,int rt)
914 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
915 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
918 static void emit_slti32(int rs,int imm,int rt)
920 if(rs!=rt) emit_zeroreg(rt);
922 if(rs==rt) emit_movimm(0,rt);
923 emit_cmovl_imm(1,rt);
926 static void emit_sltiu32(int rs,int imm,int rt)
928 if(rs!=rt) emit_zeroreg(rt);
930 if(rs==rt) emit_movimm(0,rt);
931 emit_cmovb_imm(1,rt);
934 static void emit_cmp(int rs,int rt)
936 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
937 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
940 static void emit_cmpcs(int rs,int rt)
942 assem_debug("cmpcs %s,%s\n",regname[rs],regname[rt]);
943 output_w32(0x21500000|rd_rn_rm(0,rs,rt));
946 static void emit_set_gz32(int rs, int rt)
948 //assem_debug("set_gz32\n");
951 emit_cmovl_imm(0,rt);
954 static void emit_set_nz32(int rs, int rt)
956 //assem_debug("set_nz32\n");
957 if(rs!=rt) emit_movs(rs,rt);
958 else emit_test(rs,rs);
959 emit_cmovne_imm(1,rt);
962 static void emit_set_if_less32(int rs1, int rs2, int rt)
964 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
965 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
967 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
968 emit_cmovl_imm(1,rt);
971 static void emit_set_if_carry32(int rs1, int rs2, int rt)
973 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
974 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
976 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
977 emit_cmovb_imm(1,rt);
980 static int can_jump_or_call(const void *a)
982 intptr_t offset = (u_char *)a - out - 8;
983 return (-33554432 <= offset && offset < 33554432);
986 static void emit_call(const void *a_)
989 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
990 u_int offset=genjmp(a);
991 output_w32(0xeb000000|offset);
994 static void emit_jmp(const void *a_)
997 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
998 u_int offset=genjmp(a);
999 output_w32(0xea000000|offset);
1002 static void emit_jne(const void *a_)
1005 assem_debug("bne %x\n",a);
1006 u_int offset=genjmp(a);
1007 output_w32(0x1a000000|offset);
1010 static void emit_jeq(const void *a_)
1013 assem_debug("beq %x\n",a);
1014 u_int offset=genjmp(a);
1015 output_w32(0x0a000000|offset);
1018 static void emit_js(const void *a_)
1021 assem_debug("bmi %x\n",a);
1022 u_int offset=genjmp(a);
1023 output_w32(0x4a000000|offset);
1026 static void emit_jns(const void *a_)
1029 assem_debug("bpl %x\n",a);
1030 u_int offset=genjmp(a);
1031 output_w32(0x5a000000|offset);
1034 static void emit_jl(const void *a_)
1037 assem_debug("blt %x\n",a);
1038 u_int offset=genjmp(a);
1039 output_w32(0xba000000|offset);
1042 static void emit_jge(const void *a_)
1045 assem_debug("bge %x\n",a);
1046 u_int offset=genjmp(a);
1047 output_w32(0xaa000000|offset);
1050 static void emit_jo(const void *a_)
1053 assem_debug("bvs %x\n",a);
1054 u_int offset=genjmp(a);
1055 output_w32(0x6a000000|offset);
1058 static void emit_jno(const void *a_)
1061 assem_debug("bvc %x\n",a);
1062 u_int offset=genjmp(a);
1063 output_w32(0x7a000000|offset);
1066 static void emit_jc(const void *a_)
1069 assem_debug("bcs %x\n",a);
1070 u_int offset=genjmp(a);
1071 output_w32(0x2a000000|offset);
1074 static void emit_jcc(const void *a_)
1077 assem_debug("bcc %x\n",a);
1078 u_int offset=genjmp(a);
1079 output_w32(0x3a000000|offset);
1082 static void *emit_cbz(int rs, const void *a)
1091 static unused void emit_callreg(u_int r)
1094 assem_debug("blx %s\n",regname[r]);
1095 output_w32(0xe12fff30|r);
1098 static void emit_jmpreg(u_int r)
1100 assem_debug("mov pc,%s\n",regname[r]);
1101 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1104 static void emit_ret(void)
1109 static void emit_readword_indexed(int offset, int rs, int rt)
1111 assert(offset>-4096&&offset<4096);
1112 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1114 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1116 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1120 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1122 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1123 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1125 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1127 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1129 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1130 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1133 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1135 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1136 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1139 static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
1141 assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1142 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
1145 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1147 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1148 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1151 static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
1153 assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1154 output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
1157 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1159 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1160 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1163 static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
1165 assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1166 output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
1169 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1171 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1172 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1175 static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
1177 assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1178 output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
1181 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1183 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1184 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1187 static void emit_str_dualindexed(int rs1, int rs2, int rt)
1189 assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1190 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
1193 static void emit_strb_dualindexed(int rs1, int rs2, int rt)
1195 assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1196 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
1199 static void emit_strh_dualindexed(int rs1, int rs2, int rt)
1201 assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1202 output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
1205 static void emit_movsbl_indexed(int offset, int rs, int rt)
1207 assert(offset>-256&&offset<256);
1208 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1210 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1212 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1216 static void emit_movswl_indexed(int offset, int rs, int rt)
1218 assert(offset>-256&&offset<256);
1219 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1221 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1223 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1227 static void emit_movzbl_indexed(int offset, int rs, int rt)
1229 assert(offset>-4096&&offset<4096);
1230 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1232 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1234 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1238 static void emit_movzwl_indexed(int offset, int rs, int rt)
1240 assert(offset>-256&&offset<256);
1241 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1243 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1245 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1249 static void emit_ldrd(int offset, int rs, int rt)
1251 assert(offset>-256&&offset<256);
1252 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1254 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1256 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1260 static void emit_readword(void *addr, int rt)
1262 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1263 assert(offset<4096);
1264 assem_debug("ldr %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
1265 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1267 #define emit_readptr emit_readword
1269 static void emit_writeword_indexed(int rt, int offset, int rs)
1271 assert(offset>-4096&&offset<4096);
1272 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1274 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1276 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1280 static void emit_writehword_indexed(int rt, int offset, int rs)
1282 assert(offset>-256&&offset<256);
1283 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1285 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1287 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1291 static void emit_writebyte_indexed(int rt, int offset, int rs)
1293 assert(offset>-4096&&offset<4096);
1294 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1296 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1298 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1302 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1304 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1305 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1308 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1310 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1311 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1314 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1316 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1317 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1320 static void emit_writeword(int rt, void *addr)
1322 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1323 assert(offset<4096);
1324 assem_debug("str %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
1325 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1328 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1330 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1335 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1338 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1340 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1345 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1348 static void emit_clz(int rs,int rt)
1350 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1351 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1354 static void emit_subcs(int rs1,int rs2,int rt)
1356 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1357 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1360 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1364 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1365 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1368 static void emit_shrne_imm(int rs,u_int imm,int rt)
1372 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1373 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1376 static void emit_negmi(int rs, int rt)
1378 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1379 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1382 static void emit_negsmi(int rs, int rt)
1384 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1385 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1388 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1390 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1391 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1394 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1396 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1397 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1400 static void emit_teq(int rs, int rt)
1402 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1403 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1406 static unused void emit_rsbimm(int rs, int imm, int rt)
1409 genimm_checked(imm,&armval);
1410 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1411 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1414 // Conditionally select one of two immediates, optimizing for small code size
1415 // This will only be called if HAVE_CMOV_IMM is defined
1416 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1419 if(genimm(imm2-imm1,&armval)) {
1420 emit_movimm(imm1,rt);
1421 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1422 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1423 }else if(genimm(imm1-imm2,&armval)) {
1424 emit_movimm(imm1,rt);
1425 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1426 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1430 emit_movimm(imm1,rt);
1431 add_literal((int)out,imm2);
1432 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1433 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1435 emit_movw(imm1&0x0000FFFF,rt);
1436 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1437 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1438 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1440 emit_movt(imm1&0xFFFF0000,rt);
1441 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1442 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1443 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1449 // special case for checking invalid_code
1450 static void emit_ldrb_indexedsr12_reg(int base, int r, int rt)
1452 assem_debug("ldrb %s,%s,%s lsr #12\n",regname[rt],regname[base],regname[r]);
1453 output_w32(0xe7d00000|rd_rn_rm(rt,base,r)|0x620);
1456 static void emit_callne(int a)
1458 assem_debug("blne %x\n",a);
1459 u_int offset=genjmp(a);
1460 output_w32(0x1b000000|offset);
1463 // Used to preload hash table entries
1464 static unused void emit_prefetchreg(int r)
1466 assem_debug("pld %s\n",regname[r]);
1467 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1470 // Special case for mini_ht
1471 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1473 assert(offset<4096);
1474 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1475 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1478 static void emit_orrne_imm(int rs,int imm,int rt)
1481 genimm_checked(imm,&armval);
1482 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1483 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1486 static unused void emit_addpl_imm(int rs,int imm,int rt)
1489 genimm_checked(imm,&armval);
1490 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1491 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1494 static void emit_jno_unlikely(int a)
1497 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1498 output_w32(0x72800000|rd_rn_rm(15,15,0));
1501 static void save_regs_all(u_int reglist)
1504 if(!reglist) return;
1505 assem_debug("stmia fp,{");
1508 assem_debug("r%d,",i);
1510 output_w32(0xe88b0000|reglist);
1513 static void restore_regs_all(u_int reglist)
1516 if(!reglist) return;
1517 assem_debug("ldmia fp,{");
1520 assem_debug("r%d,",i);
1522 output_w32(0xe89b0000|reglist);
1525 // Save registers before function call
1526 static void save_regs(u_int reglist)
1528 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1529 save_regs_all(reglist);
1532 // Restore registers after function call
1533 static void restore_regs(u_int reglist)
1535 reglist&=CALLER_SAVE_REGS;
1536 restore_regs_all(reglist);
1539 /* Stubs/epilogue */
1541 static void literal_pool(int n)
1543 if(!literalcount) return;
1545 if((int)out-literals[0][0]<4096-n) return;
1549 for(i=0;i<literalcount;i++)
1551 u_int l_addr=(u_int)out;
1554 if(literals[j][1]==literals[i][1]) {
1555 //printf("dup %08x\n",literals[i][1]);
1556 l_addr=literals[j][0];
1560 ptr=(u_int *)literals[i][0];
1561 u_int offset=l_addr-(u_int)ptr-8;
1562 assert(offset<4096);
1563 assert(!(offset&3));
1565 if(l_addr==(u_int)out) {
1566 literals[i][0]=l_addr; // remember for dupes
1567 output_w32(literals[i][1]);
1573 static void literal_pool_jumpover(int n)
1575 if(!literalcount) return;
1577 if((int)out-literals[0][0]<4096-n) return;
1582 set_jump_target(jaddr, out);
1585 // parsed by get_pointer, find_extjump_insn
1586 static void emit_extjump(u_char *addr, u_int target)
1588 u_char *ptr=(u_char *)addr;
1589 assert((ptr[3]&0x0e)==0xa);
1592 emit_loadlp(target,0);
1593 emit_loadlp((u_int)addr,1);
1594 assert(ndrc->translation_cache <= addr &&
1595 addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
1596 emit_far_jump(dyna_linker);
1599 static void check_extjump2(void *src)
1602 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1606 // put rt_val into rt, potentially making use of rs with value rs_val
1607 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1611 if(genimm(rt_val,&armval)) {
1612 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1613 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1616 if(genimm(~rt_val,&armval)) {
1617 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1618 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1622 if(genimm(diff,&armval)) {
1623 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1624 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1626 }else if(genimm(-diff,&armval)) {
1627 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1628 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1631 emit_movimm(rt_val,rt);
1634 // return 1 if above function can do it's job cheaply
1635 static int is_similar_value(u_int v1,u_int v2)
1639 if(v1==v2) return 1;
1641 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1643 if(xs<0x100) return 1;
1644 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1646 if(xs<0x100) return 1;
1650 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1653 case LOADB_STUB: emit_signextend8(rs,rt); break;
1654 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1655 case LOADH_STUB: emit_signextend16(rs,rt); break;
1656 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1657 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1662 #include "pcsxmem.h"
1663 #include "pcsxmem_inline.c"
1665 static void do_readstub(int n)
1667 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1669 set_jump_target(stubs[n].addr, out);
1670 enum stub_type type=stubs[n].type;
1673 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1674 u_int reglist=stubs[n].e;
1675 const signed char *i_regmap=i_regs->regmap;
1677 if(dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1678 rt=get_reg(i_regmap,FTEMP);
1680 rt=get_reg(i_regmap,dops[i].rt1);
1683 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1684 void *restore_jump = NULL;
1686 for(r=0;r<=12;r++) {
1687 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1691 if(rt>=0&&dops[i].rt1!=0)
1698 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1700 emit_readword(&mem_rtab,temp);
1701 emit_shrimm(rs,12,temp2);
1702 emit_readword_dualindexedx4(temp,temp2,temp2);
1703 emit_lsls_imm(temp2,1,temp2);
1704 if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1706 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1707 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1708 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1709 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1710 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1716 emit_jcc(0); // jump to reg restore
1719 emit_jcc(stubs[n].retaddr); // return address
1724 if(type==LOADB_STUB||type==LOADBU_STUB)
1725 handler=jump_handler_read8;
1726 if(type==LOADH_STUB||type==LOADHU_STUB)
1727 handler=jump_handler_read16;
1728 if(type==LOADW_STUB)
1729 handler=jump_handler_read32;
1731 pass_args(rs,temp2);
1732 int cc=get_reg(i_regmap,CCREG);
1734 emit_loadreg(CCREG,2);
1735 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1736 emit_far_call(handler);
1737 if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1738 mov_loadtype_adj(type,0,rt);
1741 set_jump_target(restore_jump, out);
1742 restore_regs(reglist);
1743 emit_jmp(stubs[n].retaddr); // return address
1746 static void inline_readstub(enum stub_type type, int i, u_int addr,
1747 const signed char regmap[], int target, int adj, u_int reglist)
1749 int ra = cinfo[i].addr;
1750 int rt = get_reg(regmap,target);
1753 uintptr_t host_addr = 0;
1755 int cc=get_reg(regmap,CCREG);
1756 if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
1758 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1759 if (handler == NULL) {
1760 if(rt<0||dops[i].rt1==0)
1763 emit_movimm_from(addr,ra,host_addr,ra);
1765 case LOADB_STUB: emit_movsbl_indexed(0,ra,rt); break;
1766 case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
1767 case LOADH_STUB: emit_movswl_indexed(0,ra,rt); break;
1768 case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
1769 case LOADW_STUB: emit_readword_indexed(0,ra,rt); break;
1774 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1776 if(type==LOADB_STUB||type==LOADBU_STUB)
1777 handler=jump_handler_read8;
1778 if(type==LOADH_STUB||type==LOADHU_STUB)
1779 handler=jump_handler_read16;
1780 if(type==LOADW_STUB)
1781 handler=jump_handler_read32;
1784 // call a memhandler
1785 if(rt>=0&&dops[i].rt1!=0)
1789 emit_movimm(addr,0);
1793 emit_loadreg(CCREG,2);
1795 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1796 emit_addimm(cc<0?2:cc,adj,2);
1799 emit_readword(&last_count,3);
1800 emit_addimm(cc<0?2:cc,adj,2);
1802 emit_writeword(2,&psxRegs.cycle);
1805 emit_far_call(handler);
1807 if(rt>=0&&dops[i].rt1!=0) {
1809 case LOADB_STUB: emit_signextend8(0,rt); break;
1810 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1811 case LOADH_STUB: emit_signextend16(0,rt); break;
1812 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1813 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1817 restore_regs(reglist);
1820 static void do_writestub(int n)
1822 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1824 set_jump_target(stubs[n].addr, out);
1825 enum stub_type type=stubs[n].type;
1828 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1829 u_int reglist=stubs[n].e;
1830 const signed char *i_regmap=i_regs->regmap;
1832 if(dops[i].itype==C2LS) {
1833 rt=get_reg(i_regmap,r=FTEMP);
1835 rt=get_reg(i_regmap,r=dops[i].rs2);
1839 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1840 void *restore_jump = NULL;
1841 int reglist2=reglist|(1<<rs)|(1<<rt);
1842 for(rtmp=0;rtmp<=12;rtmp++) {
1843 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1850 for(rtmp=0;rtmp<=3;rtmp++)
1851 if(rtmp!=rs&&rtmp!=rt)
1854 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1856 emit_readword(&mem_wtab,temp);
1857 emit_shrimm(rs,12,temp2);
1858 emit_readword_dualindexedx4(temp,temp2,temp2);
1859 emit_lsls_imm(temp2,1,temp2);
1861 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1862 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1863 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1868 emit_jcc(0); // jump to reg restore
1871 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1877 case STOREB_STUB: handler=jump_handler_write8; break;
1878 case STOREH_STUB: handler=jump_handler_write16; break;
1879 case STOREW_STUB: handler=jump_handler_write32; break;
1886 int cc=get_reg(i_regmap,CCREG);
1888 emit_loadreg(CCREG,2);
1889 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1890 // returns new cycle_count
1891 emit_far_call(handler);
1892 emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
1894 emit_storereg(CCREG,2);
1896 set_jump_target(restore_jump, out);
1897 restore_regs(reglist);
1898 emit_jmp(stubs[n].retaddr);
1901 static void inline_writestub(enum stub_type type, int i, u_int addr,
1902 const signed char regmap[], int target, int adj, u_int reglist)
1904 int ra = cinfo[i].addr;
1905 int rt = get_reg(regmap, target);
1908 uintptr_t host_addr = 0;
1909 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1910 if (handler == NULL) {
1912 emit_movimm_from(addr,ra,host_addr,ra);
1914 case STOREB_STUB: emit_writebyte_indexed(rt,0,ra); break;
1915 case STOREH_STUB: emit_writehword_indexed(rt,0,ra); break;
1916 case STOREW_STUB: emit_writeword_indexed(rt,0,ra); break;
1922 // call a memhandler
1925 int cc=get_reg(regmap,CCREG);
1927 emit_loadreg(CCREG,2);
1928 emit_addimm(cc<0?2:cc,adj,2);
1929 emit_movimm((u_int)handler,3);
1930 // returns new cycle_count
1931 emit_far_call(jump_handler_write_h);
1932 emit_addimm(0,-adj,cc<0?2:cc);
1934 emit_storereg(CCREG,2);
1935 restore_regs(reglist);
1940 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
1942 save_regs_all(reglist);
1943 cop2_do_stall_check(op, i, i_regs, 0);
1946 emit_far_call(pcnt_gte_start);
1948 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
1951 static void c2op_epilogue(u_int op,u_int reglist)
1955 emit_far_call(pcnt_gte_end);
1957 restore_regs_all(reglist);
1960 static void c2op_call_MACtoIR(int lm,int need_flags)
1963 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
1965 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
1968 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
1970 emit_far_call(func);
1971 // func is C code and trashes r0
1972 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
1973 if(need_flags||need_ir)
1974 c2op_call_MACtoIR(lm,need_flags);
1975 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
1978 static void c2op_assemble(int i, const struct regstat *i_regs)
1980 u_int c2op = source[i] & 0x3f;
1981 u_int reglist_full = get_host_reglist(i_regs->regmap);
1982 u_int reglist = reglist_full & CALLER_SAVE_REGS;
1983 int need_flags, need_ir;
1985 if (gte_handlers[c2op]!=NULL) {
1986 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
1987 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
1988 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
1989 source[i],gte_unneeded[i+1],need_flags,need_ir);
1990 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
1992 int shift = (source[i] >> 19) & 1;
1993 int lm = (source[i] >> 10) & 1;
1998 int v = (source[i] >> 15) & 3;
1999 int cv = (source[i] >> 13) & 3;
2000 int mx = (source[i] >> 17) & 3;
2001 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2002 c2op_prologue(c2op,i,i_regs,reglist);
2003 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2007 emit_movzwl_indexed(9*4,0,4); // gteIR
2008 emit_movzwl_indexed(10*4,0,6);
2009 emit_movzwl_indexed(11*4,0,5);
2010 emit_orrshl_imm(6,16,4);
2013 emit_addimm(0,32*4+mx*8*4,6);
2015 emit_readword(&zeromem_ptr,6);
2017 emit_addimm(0,32*4+(cv*8+5)*4,7);
2019 emit_readword(&zeromem_ptr,7);
2021 emit_movimm(source[i],1); // opcode
2022 emit_far_call(gteMVMVA_part_neon);
2025 emit_far_call(gteMACtoIR_flags_neon);
2029 emit_far_call(gteMVMVA_part_cv3sh12_arm);
2031 emit_movimm(shift,1);
2032 emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
2034 if(need_flags||need_ir)
2035 c2op_call_MACtoIR(lm,need_flags);
2037 #else /* if not HAVE_ARMV5 */
2038 c2op_prologue(c2op,i,i_regs,reglist);
2039 emit_movimm(source[i],1); // opcode
2040 emit_writeword(1,&psxRegs.code);
2041 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2046 c2op_prologue(c2op,i,i_regs,reglist);
2047 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2048 if(need_flags||need_ir) {
2049 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2050 c2op_call_MACtoIR(lm,need_flags);
2054 c2op_prologue(c2op,i,i_regs,reglist);
2055 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2058 c2op_prologue(c2op,i,i_regs,reglist);
2059 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2062 c2op_prologue(c2op,i,i_regs,reglist);
2063 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2064 if(need_flags||need_ir) {
2065 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2066 c2op_call_MACtoIR(lm,need_flags);
2070 c2op_prologue(c2op,i,i_regs,reglist);
2071 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2074 c2op_prologue(c2op,i,i_regs,reglist);
2075 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2078 c2op_prologue(c2op,i,i_regs,reglist);
2079 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2083 c2op_prologue(c2op,i,i_regs,reglist);
2085 emit_movimm(source[i],1); // opcode
2086 emit_writeword(1,&psxRegs.code);
2088 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2091 c2op_epilogue(c2op,reglist);
2095 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2097 //value = value & 0x7ffff000;
2098 //if (value & 0x7f87e000) value |= 0x80000000;
2099 emit_shrimm(sl,12,temp);
2100 emit_shlimm(temp,12,temp);
2101 emit_testimm(temp,0x7f000000);
2102 emit_testeqimm(temp,0x00870000);
2103 emit_testeqimm(temp,0x0000e000);
2104 emit_orrne_imm(temp,0x80000000,temp);
2107 static void do_mfc2_31_one(u_int copr,signed char temp)
2109 emit_readword(®_cop2d[copr],temp);
2110 emit_lsls_imm(temp,16,temp);
2111 emit_cmovs_imm(0,temp);
2112 emit_cmpimm(temp,0xf80<<16);
2113 emit_andimm(temp,0xf80<<16,temp);
2114 emit_cmovae_imm(0xf80<<16,temp);
2117 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2120 host_tempreg_acquire();
2121 temp = HOST_TEMPREG;
2123 do_mfc2_31_one(9,temp);
2124 emit_shrimm(temp,7+16,tl);
2125 do_mfc2_31_one(10,temp);
2126 emit_orrshr_imm(temp,2+16,tl);
2127 do_mfc2_31_one(11,temp);
2128 emit_orrshr_imm(temp,-3+16,tl);
2129 emit_writeword(tl,®_cop2d[29]);
2130 if (temp == HOST_TEMPREG)
2131 host_tempreg_release();
2134 static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
2140 if(dops[i].rs1&&dops[i].rs2)
2142 switch (dops[i].opcode2)
2146 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2147 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2148 signed char hi=get_reg(i_regs->regmap,HIREG);
2149 signed char lo=get_reg(i_regs->regmap,LOREG);
2154 emit_smull(m1,m2,hi,lo);
2159 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2160 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2161 signed char hi=get_reg(i_regs->regmap,HIREG);
2162 signed char lo=get_reg(i_regs->regmap,LOREG);
2167 emit_umull(m1,m2,hi,lo);
2172 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2173 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2174 signed char quotient=get_reg(i_regs->regmap,LOREG);
2175 signed char remainder=get_reg(i_regs->regmap,HIREG);
2179 assert(quotient>=0);
2180 assert(remainder>=0);
2181 emit_movs(d1,remainder);
2182 emit_movimm(0xffffffff,quotient);
2183 emit_negmi(quotient,quotient); // .. quotient and ..
2184 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2185 emit_movs(d2,HOST_TEMPREG);
2187 emit_jeq(0); // Division by zero
2188 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2190 emit_clz(HOST_TEMPREG,quotient);
2191 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG); // shifted divisor
2193 emit_movimm(0,quotient);
2194 emit_addpl_imm(quotient,1,quotient);
2195 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2198 emit_orimm(quotient,1<<31,quotient);
2199 emit_shr(quotient,quotient,quotient);
2200 emit_cmp(remainder,HOST_TEMPREG);
2201 emit_subcs(remainder,HOST_TEMPREG,remainder);
2202 emit_adcs(quotient,quotient,quotient);
2203 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2204 emit_jcc(out-16); // -4
2206 emit_negmi(quotient,quotient);
2207 set_jump_target(jaddr_div0, out);
2209 emit_negmi(remainder,remainder);
2214 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2215 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2216 signed char quotient=get_reg(i_regs->regmap,LOREG);
2217 signed char remainder=get_reg(i_regs->regmap,HIREG);
2221 assert(quotient>=0);
2222 assert(remainder>=0);
2223 emit_mov(d1,remainder);
2224 emit_movimm(0xffffffff,quotient); // div0 case
2227 emit_jeq(0); // Division by zero
2229 emit_clz(d2,HOST_TEMPREG);
2230 emit_movimm(1<<31,quotient);
2231 emit_shl(d2,HOST_TEMPREG,d2);
2233 emit_movimm(0,HOST_TEMPREG);
2234 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2235 emit_lslpls_imm(d2,1,d2);
2237 emit_movimm(1<<31,quotient);
2239 emit_shr(quotient,HOST_TEMPREG,quotient);
2240 emit_cmp(remainder,d2);
2241 emit_subcs(remainder,d2,remainder);
2242 emit_adcs(quotient,quotient,quotient);
2243 emit_shrcc_imm(d2,1,d2);
2244 emit_jcc(out-16); // -4
2245 set_jump_target(jaddr_div0, out);
2252 signed char hr=get_reg(i_regs->regmap,HIREG);
2253 signed char lr=get_reg(i_regs->regmap,LOREG);
2254 if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs2==0) // div 0
2257 signed char numerator = get_reg(i_regs->regmap, dops[i].rs1);
2258 assert(numerator >= 0);
2261 emit_movs(numerator, hr);
2263 if (dops[i].opcode2 == 0x1A) { // DIV
2264 emit_movimm(0xffffffff, lr);
2268 emit_movimm(~0, lr);
2272 if (hr >= 0) emit_zeroreg(hr);
2273 if (lr >= 0) emit_movimm(~0,lr);
2276 else if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs1==0)
2278 signed char denominator = get_reg(i_regs->regmap, dops[i].rs2);
2279 assert(denominator >= 0);
2280 if (hr >= 0) emit_zeroreg(hr);
2283 emit_test(denominator, denominator);
2289 // Multiply by zero is zero.
2290 if (hr >= 0) emit_zeroreg(hr);
2291 if (lr >= 0) emit_zeroreg(lr);
2295 #define multdiv_assemble multdiv_assemble_arm
2297 static void do_jump_vaddr(int rs)
2299 emit_far_jump(jump_vaddr_reg[rs]);
2302 static void do_preload_rhash(int r) {
2303 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2304 // register. On ARM the hash can be done with a single instruction (below)
2307 static void do_preload_rhtbl(int ht) {
2308 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2311 static void do_rhash(int rs,int rh) {
2312 emit_andimm(rs,0xf8,rh);
2315 static void do_miniht_load(int ht,int rh) {
2316 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2317 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2320 static void do_miniht_jump(int rs,int rh,int ht) {
2322 emit_ldreq_indexed(ht,4,15);
2323 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2331 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2333 emit_movimm(return_address,rt); // PC into link register
2334 add_to_linker(out,return_address,1);
2335 emit_pcreladdr(temp);
2336 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2337 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2339 emit_movw(return_address&0x0000FFFF,rt);
2340 add_to_linker(out,return_address,1);
2341 emit_pcreladdr(temp);
2342 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2343 emit_movt(return_address&0xFFFF0000,rt);
2344 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2348 // CPU-architecture-specific initialization
2349 static void arch_init(void)
2351 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2352 struct tramp_insns *ops = ndrc->tramp.ops;
2354 assert(!(diff & 3));
2355 assert(diff < 0x1000);
2356 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2357 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2358 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2359 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2362 // vim:shiftwidth=2:expandtab