1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
30 #define unused __attribute__((unused))
33 #pragma GCC diagnostic ignored "-Wunused-function"
34 #pragma GCC diagnostic ignored "-Wunused-variable"
35 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
38 void indirect_jump_indexed();
51 void jump_vaddr_r10();
52 void jump_vaddr_r12();
54 void * const jump_vaddr_reg[16] = {
73 void invalidate_addr_r0();
74 void invalidate_addr_r1();
75 void invalidate_addr_r2();
76 void invalidate_addr_r3();
77 void invalidate_addr_r4();
78 void invalidate_addr_r5();
79 void invalidate_addr_r6();
80 void invalidate_addr_r7();
81 void invalidate_addr_r8();
82 void invalidate_addr_r9();
83 void invalidate_addr_r10();
84 void invalidate_addr_r12();
86 const u_int invalidate_addr_reg[16] = {
87 (int)invalidate_addr_r0,
88 (int)invalidate_addr_r1,
89 (int)invalidate_addr_r2,
90 (int)invalidate_addr_r3,
91 (int)invalidate_addr_r4,
92 (int)invalidate_addr_r5,
93 (int)invalidate_addr_r6,
94 (int)invalidate_addr_r7,
95 (int)invalidate_addr_r8,
96 (int)invalidate_addr_r9,
97 (int)invalidate_addr_r10,
99 (int)invalidate_addr_r12,
106 static void set_jump_target(void *addr, void *target_)
108 u_int target = (u_int)target_;
110 u_int *ptr2=(u_int *)ptr;
112 assert((target-(u_int)ptr2-8)<1024);
113 assert(((uintptr_t)addr&3)==0);
114 assert((target&3)==0);
115 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
116 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
118 else if(ptr[3]==0x72) {
119 // generated by emit_jno_unlikely
120 if((target-(u_int)ptr2-8)<1024) {
121 assert(((uintptr_t)addr&3)==0);
122 assert((target&3)==0);
123 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
125 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
126 assert(((uintptr_t)addr&3)==0);
127 assert((target&3)==0);
128 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
130 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
133 assert((ptr[3]&0x0e)==0xa);
134 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
138 // This optionally copies the instruction from the target of the branch into
139 // the space before the branch. Works, but the difference in speed is
140 // usually insignificant.
142 static void set_jump_target_fillslot(int addr,u_int target,int copy)
144 u_char *ptr=(u_char *)addr;
145 u_int *ptr2=(u_int *)ptr;
146 assert(!copy||ptr2[-1]==0xe28dd000);
149 assert((target-(u_int)ptr2-8)<4096);
150 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
153 assert((ptr[3]&0x0e)==0xa);
154 u_int target_insn=*(u_int *)target;
155 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
158 if((target_insn&0x0c100000)==0x04100000) { // Load
161 if(target_insn&0x08000000) {
165 ptr2[-1]=target_insn;
168 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
174 static void add_literal(int addr,int val)
176 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
177 literals[literalcount][0]=addr;
178 literals[literalcount][1]=val;
182 // from a pointer to external jump stub (which was produced by emit_extjump2)
183 // find where the jumping insn is
184 static void *find_extjump_insn(void *stub)
186 int *ptr=(int *)(stub+4);
187 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
188 u_int offset=*ptr&0xfff;
189 void **l_ptr=(void *)ptr+offset+8;
193 // find where external branch is liked to using addr of it's stub:
194 // get address that insn one after stub loads (dyna_linker arg1),
195 // treat it as a pointer to branch insn,
196 // return addr where that branch jumps to
197 static void *get_pointer(void *stub)
199 //printf("get_pointer(%x)\n",(int)stub);
200 int *i_ptr=find_extjump_insn(stub);
201 assert((*i_ptr&0x0f000000)==0x0a000000); // b
202 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
205 // Find the "clean" entry point from a "dirty" entry point
206 // by skipping past the call to verify_code
207 static void *get_clean_addr(void *addr)
209 signed int *ptr = addr;
215 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
216 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
218 if((*ptr&0xFF000000)==0xea000000) {
219 return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
224 static int verify_dirty(const u_int *ptr)
228 // get from literal pool
229 assert((*ptr&0xFFFF0000)==0xe59f0000);
231 u_int source=*(u_int*)((void *)ptr+offset+8);
233 assert((*ptr&0xFFFF0000)==0xe59f0000);
235 u_int copy=*(u_int*)((void *)ptr+offset+8);
237 assert((*ptr&0xFFFF0000)==0xe59f0000);
239 u_int len=*(u_int*)((void *)ptr+offset+8);
244 assert((*ptr&0xFFF00000)==0xe3000000);
245 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
246 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
247 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
250 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
251 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
252 //printf("verify_dirty: %x %x %x\n",source,copy,len);
253 return !memcmp((void *)source,(void *)copy,len);
256 // This doesn't necessarily find all clean entry points, just
257 // guarantees that it's not dirty
258 static int isclean(void *addr)
261 u_int *ptr=((u_int *)addr)+4;
263 u_int *ptr=((u_int *)addr)+6;
265 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
266 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
267 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
271 // get source that block at addr was compiled from (host pointers)
272 static void get_bounds(void *addr, u_char **start, u_char **end)
277 // get from literal pool
278 assert((*ptr&0xFFFF0000)==0xe59f0000);
280 u_int source=*(u_int*)((void *)ptr+offset+8);
282 //assert((*ptr&0xFFFF0000)==0xe59f0000);
284 //u_int copy=*(u_int*)((void *)ptr+offset+8);
286 assert((*ptr&0xFFFF0000)==0xe59f0000);
288 u_int len=*(u_int*)((void *)ptr+offset+8);
293 assert((*ptr&0xFFF00000)==0xe3000000);
294 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
295 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
296 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
299 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
300 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
301 *start=(u_char *)source;
302 *end=(u_char *)source+len;
305 // Allocate a specific ARM register.
306 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
311 // see if it's already allocated (and dealloc it)
312 for(n=0;n<HOST_REGS;n++)
314 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
315 dirty=(cur->dirty>>n)&1;
321 cur->dirty&=~(1<<hr);
322 cur->dirty|=dirty<<hr;
323 cur->isconst&=~(1<<hr);
326 // Alloc cycle count into dedicated register
327 static void alloc_cc(struct regstat *cur,int i)
329 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
334 static unused char regname[16][4] = {
352 static void output_w32(u_int word)
354 *((u_int *)out)=word;
358 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
363 return((rn<<16)|(rd<<12)|rm);
366 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
371 assert((shift&1)==0);
372 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
375 static u_int genimm(u_int imm,u_int *encoded)
383 *encoded=((i&30)<<7)|imm;
386 imm=(imm>>2)|(imm<<30);i-=2;
391 static void genimm_checked(u_int imm,u_int *encoded)
393 u_int ret=genimm(imm,encoded);
398 static u_int genjmp(u_int addr)
400 if (addr < 3) return 0; // a branch that will be patched later
401 int offset = addr-(int)out-8;
402 if (offset < -33554432 || offset >= 33554432) {
403 SysPrintf("genjmp: out of range: %08x\n", offset);
407 return ((u_int)offset>>2)&0xffffff;
410 static unused void emit_breakpoint(void)
412 assem_debug("bkpt #0\n");
413 //output_w32(0xe1200070);
414 output_w32(0xe7f001f0);
417 static void emit_mov(int rs,int rt)
419 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
420 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
423 static void emit_movs(int rs,int rt)
425 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
426 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
429 static void emit_add(int rs1,int rs2,int rt)
431 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
432 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
435 static void emit_adds(int rs1,int rs2,int rt)
437 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
438 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
440 #define emit_adds_ptr emit_adds
442 static void emit_adcs(int rs1,int rs2,int rt)
444 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
445 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
448 static void emit_neg(int rs, int rt)
450 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
451 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
454 static void emit_sub(int rs1,int rs2,int rt)
456 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
457 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
460 static void emit_zeroreg(int rt)
462 assem_debug("mov %s,#0\n",regname[rt]);
463 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
466 static void emit_loadlp(u_int imm,u_int rt)
468 add_literal((int)out,imm);
469 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
470 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
474 static void emit_movw(u_int imm,u_int rt)
477 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
478 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
481 static void emit_movt(u_int imm,u_int rt)
483 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
484 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
488 static void emit_movimm(u_int imm,u_int rt)
491 if(genimm(imm,&armval)) {
492 assem_debug("mov %s,#%d\n",regname[rt],imm);
493 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
494 }else if(genimm(~imm,&armval)) {
495 assem_debug("mvn %s,#%d\n",regname[rt],imm);
496 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
497 }else if(imm<65536) {
499 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
500 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
501 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
502 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
510 emit_movw(imm&0x0000FFFF,rt);
511 emit_movt(imm&0xFFFF0000,rt);
516 static void emit_pcreladdr(u_int rt)
518 assem_debug("add %s,pc,#?\n",regname[rt]);
519 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
522 static void emit_loadreg(int r, int hr)
524 assert(hr != EXCLUDE_REG);
530 //case HIREG: addr = &hi; break;
531 //case LOREG: addr = &lo; break;
532 case CCREG: addr = &cycle_count; break;
533 case CSREG: addr = &Status; break;
534 case INVCP: addr = &invc_ptr; break;
535 case ROREG: addr = &ram_offset; break;
538 addr = &psxRegs.GPR.r[r];
541 u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
543 assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
544 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
548 static void emit_storereg(int r, int hr)
550 assert(hr != EXCLUDE_REG);
551 int addr = (int)&psxRegs.GPR.r[r];
553 //case HIREG: addr = &hi; break;
554 //case LOREG: addr = &lo; break;
555 case CCREG: addr = (int)&cycle_count; break;
556 default: assert(r < 34); break;
558 u_int offset = addr-(u_int)&dynarec_local;
560 assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
561 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
564 static void emit_test(int rs, int rt)
566 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
567 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
570 static void emit_testimm(int rs,int imm)
573 assem_debug("tst %s,#%d\n",regname[rs],imm);
574 genimm_checked(imm,&armval);
575 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
578 static void emit_testeqimm(int rs,int imm)
581 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
582 genimm_checked(imm,&armval);
583 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
586 static void emit_not(int rs,int rt)
588 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
589 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
592 static void emit_and(u_int rs1,u_int rs2,u_int rt)
594 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
595 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
598 static void emit_or(u_int rs1,u_int rs2,u_int rt)
600 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
601 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
604 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
609 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
610 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
613 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
618 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
619 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
622 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
624 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
625 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
628 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
630 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
631 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
634 static void emit_addimm(u_int rs,int imm,u_int rt)
640 if(genimm(imm,&armval)) {
641 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
642 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
643 }else if(genimm(-imm,&armval)) {
644 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
645 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
647 }else if(rt!=rs&&(u_int)imm<65536) {
648 emit_movw(imm&0x0000ffff,rt);
650 }else if(rt!=rs&&(u_int)-imm<65536) {
651 emit_movw(-imm&0x0000ffff,rt);
654 }else if((u_int)-imm<65536) {
655 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
656 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
657 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
658 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
661 int shift = (ffs(imm) - 1) & ~1;
662 int imm8 = imm & (0xff << shift);
663 genimm_checked(imm8,&armval);
664 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
665 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
672 else if(rs!=rt) emit_mov(rs,rt);
675 static void emit_addimm_and_set_flags(int imm,int rt)
677 assert(imm>-65536&&imm<65536);
679 if(genimm(imm,&armval)) {
680 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
681 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
682 }else if(genimm(-imm,&armval)) {
683 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
684 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
686 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
687 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
688 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
689 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
691 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
692 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
693 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
694 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
698 static void emit_addnop(u_int r)
701 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
702 output_w32(0xe2800000|rd_rn_rm(r,r,0));
705 static void emit_andimm(int rs,int imm,int rt)
710 }else if(genimm(imm,&armval)) {
711 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
712 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
713 }else if(genimm(~imm,&armval)) {
714 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
715 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
716 }else if(imm==65535) {
718 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
719 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
720 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
721 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
723 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
724 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
727 assert(imm>0&&imm<65535);
729 assem_debug("mov r14,#%d\n",imm&0xFF00);
730 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
731 assem_debug("add r14,r14,#%d\n",imm&0xFF);
732 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
734 emit_movw(imm,HOST_TEMPREG);
736 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
737 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
741 static void emit_orimm(int rs,int imm,int rt)
745 if(rs!=rt) emit_mov(rs,rt);
746 }else if(genimm(imm,&armval)) {
747 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
748 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
750 assert(imm>0&&imm<65536);
751 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
752 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
753 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
754 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
758 static void emit_xorimm(int rs,int imm,int rt)
762 if(rs!=rt) emit_mov(rs,rt);
763 }else if(genimm(imm,&armval)) {
764 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
765 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
767 assert(imm>0&&imm<65536);
768 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
769 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
770 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
771 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
775 static void emit_shlimm(int rs,u_int imm,int rt)
780 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
781 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
784 static void emit_lsls_imm(int rs,int imm,int rt)
788 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
789 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
792 static unused void emit_lslpls_imm(int rs,int imm,int rt)
796 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
797 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
800 static void emit_shrimm(int rs,u_int imm,int rt)
804 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
805 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
808 static void emit_sarimm(int rs,u_int imm,int rt)
812 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
813 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
816 static void emit_rorimm(int rs,u_int imm,int rt)
820 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
821 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
824 static void emit_signextend16(int rs,int rt)
827 emit_shlimm(rs,16,rt);
828 emit_sarimm(rt,16,rt);
830 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
831 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
835 static void emit_signextend8(int rs,int rt)
838 emit_shlimm(rs,24,rt);
839 emit_sarimm(rt,24,rt);
841 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
842 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
846 static void emit_shl(u_int rs,u_int shift,u_int rt)
852 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
853 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
856 static void emit_shr(u_int rs,u_int shift,u_int rt)
861 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
862 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
865 static void emit_sar(u_int rs,u_int shift,u_int rt)
870 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
871 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
874 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
879 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
880 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
883 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
888 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
889 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
892 static void emit_cmpimm(int rs,int imm)
895 if(genimm(imm,&armval)) {
896 assem_debug("cmp %s,#%d\n",regname[rs],imm);
897 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
898 }else if(genimm(-imm,&armval)) {
899 assem_debug("cmn %s,#%d\n",regname[rs],imm);
900 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
903 emit_movimm(imm,HOST_TEMPREG);
904 assem_debug("cmp %s,r14\n",regname[rs]);
905 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
908 emit_movimm(-imm,HOST_TEMPREG);
909 assem_debug("cmn %s,r14\n",regname[rs]);
910 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
914 static void emit_cmovne_imm(int imm,int rt)
916 assem_debug("movne %s,#%d\n",regname[rt],imm);
918 genimm_checked(imm,&armval);
919 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
922 static void emit_cmovl_imm(int imm,int rt)
924 assem_debug("movlt %s,#%d\n",regname[rt],imm);
926 genimm_checked(imm,&armval);
927 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
930 static void emit_cmovb_imm(int imm,int rt)
932 assem_debug("movcc %s,#%d\n",regname[rt],imm);
934 genimm_checked(imm,&armval);
935 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
938 static void emit_cmovae_imm(int imm,int rt)
940 assem_debug("movcs %s,#%d\n",regname[rt],imm);
942 genimm_checked(imm,&armval);
943 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
946 static void emit_cmovs_imm(int imm,int rt)
948 assem_debug("movmi %s,#%d\n",regname[rt],imm);
950 genimm_checked(imm,&armval);
951 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
954 static void emit_cmovne_reg(int rs,int rt)
956 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
957 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
960 static void emit_cmovl_reg(int rs,int rt)
962 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
963 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
966 static void emit_cmovb_reg(int rs,int rt)
968 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
969 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
972 static void emit_cmovs_reg(int rs,int rt)
974 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
975 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
978 static void emit_slti32(int rs,int imm,int rt)
980 if(rs!=rt) emit_zeroreg(rt);
982 if(rs==rt) emit_movimm(0,rt);
983 emit_cmovl_imm(1,rt);
986 static void emit_sltiu32(int rs,int imm,int rt)
988 if(rs!=rt) emit_zeroreg(rt);
990 if(rs==rt) emit_movimm(0,rt);
991 emit_cmovb_imm(1,rt);
994 static void emit_cmp(int rs,int rt)
996 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
997 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
1000 static void emit_set_gz32(int rs, int rt)
1002 //assem_debug("set_gz32\n");
1005 emit_cmovl_imm(0,rt);
1008 static void emit_set_nz32(int rs, int rt)
1010 //assem_debug("set_nz32\n");
1011 if(rs!=rt) emit_movs(rs,rt);
1012 else emit_test(rs,rs);
1013 emit_cmovne_imm(1,rt);
1016 static void emit_set_if_less32(int rs1, int rs2, int rt)
1018 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1019 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1021 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1022 emit_cmovl_imm(1,rt);
1025 static void emit_set_if_carry32(int rs1, int rs2, int rt)
1027 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1028 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1030 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1031 emit_cmovb_imm(1,rt);
1034 static int can_jump_or_call(const void *a)
1036 intptr_t offset = (u_char *)a - out - 8;
1037 return (-33554432 <= offset && offset < 33554432);
1040 static void emit_call(const void *a_)
1043 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1044 u_int offset=genjmp(a);
1045 output_w32(0xeb000000|offset);
1048 static void emit_jmp(const void *a_)
1051 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1052 u_int offset=genjmp(a);
1053 output_w32(0xea000000|offset);
1056 static void emit_jne(const void *a_)
1059 assem_debug("bne %x\n",a);
1060 u_int offset=genjmp(a);
1061 output_w32(0x1a000000|offset);
1064 static void emit_jeq(const void *a_)
1067 assem_debug("beq %x\n",a);
1068 u_int offset=genjmp(a);
1069 output_w32(0x0a000000|offset);
1072 static void emit_js(const void *a_)
1075 assem_debug("bmi %x\n",a);
1076 u_int offset=genjmp(a);
1077 output_w32(0x4a000000|offset);
1080 static void emit_jns(const void *a_)
1083 assem_debug("bpl %x\n",a);
1084 u_int offset=genjmp(a);
1085 output_w32(0x5a000000|offset);
1088 static void emit_jl(const void *a_)
1091 assem_debug("blt %x\n",a);
1092 u_int offset=genjmp(a);
1093 output_w32(0xba000000|offset);
1096 static void emit_jge(const void *a_)
1099 assem_debug("bge %x\n",a);
1100 u_int offset=genjmp(a);
1101 output_w32(0xaa000000|offset);
1104 static void emit_jno(const void *a_)
1107 assem_debug("bvc %x\n",a);
1108 u_int offset=genjmp(a);
1109 output_w32(0x7a000000|offset);
1112 static void emit_jc(const void *a_)
1115 assem_debug("bcs %x\n",a);
1116 u_int offset=genjmp(a);
1117 output_w32(0x2a000000|offset);
1120 static void emit_jcc(const void *a_)
1123 assem_debug("bcc %x\n",a);
1124 u_int offset=genjmp(a);
1125 output_w32(0x3a000000|offset);
1128 static unused void emit_callreg(u_int r)
1131 assem_debug("blx %s\n",regname[r]);
1132 output_w32(0xe12fff30|r);
1135 static void emit_jmpreg(u_int r)
1137 assem_debug("mov pc,%s\n",regname[r]);
1138 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1141 static void emit_ret(void)
1146 static void emit_readword_indexed(int offset, int rs, int rt)
1148 assert(offset>-4096&&offset<4096);
1149 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1151 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1153 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1157 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1159 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1160 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1162 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1164 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1166 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1167 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1170 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1172 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1173 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1176 static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
1178 assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1179 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
1182 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1184 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1185 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1188 static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
1190 assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1191 output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
1194 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1196 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1197 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1200 static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
1202 assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1203 output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
1206 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1208 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1209 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1212 static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
1214 assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1215 output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
1218 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1220 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1221 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1224 static void emit_str_dualindexed(int rs1, int rs2, int rt)
1226 assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1227 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
1230 static void emit_strb_dualindexed(int rs1, int rs2, int rt)
1232 assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1233 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
1236 static void emit_strh_dualindexed(int rs1, int rs2, int rt)
1238 assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1239 output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
1242 static void emit_movsbl_indexed(int offset, int rs, int rt)
1244 assert(offset>-256&&offset<256);
1245 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1247 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1249 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1253 static void emit_movswl_indexed(int offset, int rs, int rt)
1255 assert(offset>-256&&offset<256);
1256 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1258 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1260 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1264 static void emit_movzbl_indexed(int offset, int rs, int rt)
1266 assert(offset>-4096&&offset<4096);
1267 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1269 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1271 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1275 static void emit_movzwl_indexed(int offset, int rs, int rt)
1277 assert(offset>-256&&offset<256);
1278 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1280 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1282 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1286 static void emit_ldrd(int offset, int rs, int rt)
1288 assert(offset>-256&&offset<256);
1289 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1291 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1293 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1297 static void emit_readword(void *addr, int rt)
1299 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1300 assert(offset<4096);
1301 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1302 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1304 #define emit_readptr emit_readword
1306 static void emit_writeword_indexed(int rt, int offset, int rs)
1308 assert(offset>-4096&&offset<4096);
1309 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1311 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1313 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1317 static void emit_writehword_indexed(int rt, int offset, int rs)
1319 assert(offset>-256&&offset<256);
1320 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1322 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1324 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1328 static void emit_writebyte_indexed(int rt, int offset, int rs)
1330 assert(offset>-4096&&offset<4096);
1331 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1333 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1335 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1339 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1341 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1342 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1345 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1347 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1348 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1351 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1353 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1354 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1357 static void emit_writeword(int rt, void *addr)
1359 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1360 assert(offset<4096);
1361 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1362 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1365 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1367 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1372 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1375 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1377 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1382 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1385 static void emit_clz(int rs,int rt)
1387 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1388 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1391 static void emit_subcs(int rs1,int rs2,int rt)
1393 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1394 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1397 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1401 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1402 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1405 static void emit_shrne_imm(int rs,u_int imm,int rt)
1409 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1410 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1413 static void emit_negmi(int rs, int rt)
1415 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1416 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1419 static void emit_negsmi(int rs, int rt)
1421 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1422 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1425 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1427 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1428 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1431 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1433 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1434 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1437 static void emit_teq(int rs, int rt)
1439 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1440 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1443 static unused void emit_rsbimm(int rs, int imm, int rt)
1446 genimm_checked(imm,&armval);
1447 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1448 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1451 // Conditionally select one of two immediates, optimizing for small code size
1452 // This will only be called if HAVE_CMOV_IMM is defined
1453 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1456 if(genimm(imm2-imm1,&armval)) {
1457 emit_movimm(imm1,rt);
1458 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1459 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1460 }else if(genimm(imm1-imm2,&armval)) {
1461 emit_movimm(imm1,rt);
1462 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1463 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1467 emit_movimm(imm1,rt);
1468 add_literal((int)out,imm2);
1469 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1470 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1472 emit_movw(imm1&0x0000FFFF,rt);
1473 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1474 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1475 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1477 emit_movt(imm1&0xFFFF0000,rt);
1478 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1479 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1480 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1486 // special case for checking invalid_code
1487 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1489 assert(imm<128&&imm>=0);
1491 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1492 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1493 emit_cmpimm(HOST_TEMPREG,imm);
1496 static void emit_callne(int a)
1498 assem_debug("blne %x\n",a);
1499 u_int offset=genjmp(a);
1500 output_w32(0x1b000000|offset);
1503 // Used to preload hash table entries
1504 static unused void emit_prefetchreg(int r)
1506 assem_debug("pld %s\n",regname[r]);
1507 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1510 // Special case for mini_ht
1511 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1513 assert(offset<4096);
1514 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1515 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1518 static void emit_orrne_imm(int rs,int imm,int rt)
1521 genimm_checked(imm,&armval);
1522 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1523 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1526 static unused void emit_addpl_imm(int rs,int imm,int rt)
1529 genimm_checked(imm,&armval);
1530 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1531 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1534 static void emit_jno_unlikely(int a)
1537 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1538 output_w32(0x72800000|rd_rn_rm(15,15,0));
1541 static void save_regs_all(u_int reglist)
1544 if(!reglist) return;
1545 assem_debug("stmia fp,{");
1548 assem_debug("r%d,",i);
1550 output_w32(0xe88b0000|reglist);
1553 static void restore_regs_all(u_int reglist)
1556 if(!reglist) return;
1557 assem_debug("ldmia fp,{");
1560 assem_debug("r%d,",i);
1562 output_w32(0xe89b0000|reglist);
1565 // Save registers before function call
1566 static void save_regs(u_int reglist)
1568 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1569 save_regs_all(reglist);
1572 // Restore registers after function call
1573 static void restore_regs(u_int reglist)
1575 reglist&=CALLER_SAVE_REGS;
1576 restore_regs_all(reglist);
1579 /* Stubs/epilogue */
1581 static void literal_pool(int n)
1583 if(!literalcount) return;
1585 if((int)out-literals[0][0]<4096-n) return;
1589 for(i=0;i<literalcount;i++)
1591 u_int l_addr=(u_int)out;
1594 if(literals[j][1]==literals[i][1]) {
1595 //printf("dup %08x\n",literals[i][1]);
1596 l_addr=literals[j][0];
1600 ptr=(u_int *)literals[i][0];
1601 u_int offset=l_addr-(u_int)ptr-8;
1602 assert(offset<4096);
1603 assert(!(offset&3));
1605 if(l_addr==(u_int)out) {
1606 literals[i][0]=l_addr; // remember for dupes
1607 output_w32(literals[i][1]);
1613 static void literal_pool_jumpover(int n)
1615 if(!literalcount) return;
1617 if((int)out-literals[0][0]<4096-n) return;
1622 set_jump_target(jaddr, out);
1625 // parsed by get_pointer, find_extjump_insn
1626 static void emit_extjump2(u_char *addr, u_int target, void *linker)
1628 u_char *ptr=(u_char *)addr;
1629 assert((ptr[3]&0x0e)==0xa);
1632 emit_loadlp(target,0);
1633 emit_loadlp((u_int)addr,1);
1634 assert(ndrc->translation_cache <= addr &&
1635 addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
1636 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
1638 #ifdef DEBUG_CYCLE_COUNT
1639 emit_readword(&last_count,ECX);
1640 emit_add(HOST_CCREG,ECX,HOST_CCREG);
1641 emit_readword(&next_interupt,ECX);
1642 emit_writeword(HOST_CCREG,&Count);
1643 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
1644 emit_writeword(ECX,&last_count);
1647 emit_far_jump(linker);
1650 static void check_extjump2(void *src)
1653 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1657 // put rt_val into rt, potentially making use of rs with value rs_val
1658 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1662 if(genimm(rt_val,&armval)) {
1663 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1664 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1667 if(genimm(~rt_val,&armval)) {
1668 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1669 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1673 if(genimm(diff,&armval)) {
1674 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1675 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1677 }else if(genimm(-diff,&armval)) {
1678 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1679 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1682 emit_movimm(rt_val,rt);
1685 // return 1 if above function can do it's job cheaply
1686 static int is_similar_value(u_int v1,u_int v2)
1690 if(v1==v2) return 1;
1692 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1694 if(xs<0x100) return 1;
1695 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1697 if(xs<0x100) return 1;
1701 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1704 case LOADB_STUB: emit_signextend8(rs,rt); break;
1705 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1706 case LOADH_STUB: emit_signextend16(rs,rt); break;
1707 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1708 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1713 #include "pcsxmem.h"
1714 #include "pcsxmem_inline.c"
1716 static void do_readstub(int n)
1718 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1720 set_jump_target(stubs[n].addr, out);
1721 enum stub_type type=stubs[n].type;
1724 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1725 u_int reglist=stubs[n].e;
1726 const signed char *i_regmap=i_regs->regmap;
1728 if(dops[i].itype==C1LS||dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1729 rt=get_reg(i_regmap,FTEMP);
1731 rt=get_reg(i_regmap,dops[i].rt1);
1734 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1735 void *restore_jump = NULL;
1737 for(r=0;r<=12;r++) {
1738 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1742 if(rt>=0&&dops[i].rt1!=0)
1749 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1751 emit_readword(&mem_rtab,temp);
1752 emit_shrimm(rs,12,temp2);
1753 emit_readword_dualindexedx4(temp,temp2,temp2);
1754 emit_lsls_imm(temp2,1,temp2);
1755 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1757 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1758 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1759 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1760 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1761 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1767 emit_jcc(0); // jump to reg restore
1770 emit_jcc(stubs[n].retaddr); // return address
1775 if(type==LOADB_STUB||type==LOADBU_STUB)
1776 handler=jump_handler_read8;
1777 if(type==LOADH_STUB||type==LOADHU_STUB)
1778 handler=jump_handler_read16;
1779 if(type==LOADW_STUB)
1780 handler=jump_handler_read32;
1782 pass_args(rs,temp2);
1783 int cc=get_reg(i_regmap,CCREG);
1785 emit_loadreg(CCREG,2);
1786 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1787 emit_far_call(handler);
1788 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1789 mov_loadtype_adj(type,0,rt);
1792 set_jump_target(restore_jump, out);
1793 restore_regs(reglist);
1794 emit_jmp(stubs[n].retaddr); // return address
1797 static void inline_readstub(enum stub_type type, int i, u_int addr,
1798 const signed char regmap[], int target, int adj, u_int reglist)
1800 int rs=get_reg(regmap,target);
1801 int rt=get_reg(regmap,target);
1802 if(rs<0) rs=get_reg_temp(regmap);
1805 uintptr_t host_addr = 0;
1807 int cc=get_reg(regmap,CCREG);
1808 if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
1810 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1811 if (handler == NULL) {
1812 if(rt<0||dops[i].rt1==0)
1815 emit_movimm_from(addr,rs,host_addr,rs);
1817 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1818 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1819 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1820 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1821 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1826 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1828 if(type==LOADB_STUB||type==LOADBU_STUB)
1829 handler=jump_handler_read8;
1830 if(type==LOADH_STUB||type==LOADHU_STUB)
1831 handler=jump_handler_read16;
1832 if(type==LOADW_STUB)
1833 handler=jump_handler_read32;
1836 // call a memhandler
1837 if(rt>=0&&dops[i].rt1!=0)
1841 emit_movimm(addr,0);
1845 emit_loadreg(CCREG,2);
1847 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1848 emit_addimm(cc<0?2:cc,adj,2);
1851 emit_readword(&last_count,3);
1852 emit_addimm(cc<0?2:cc,adj,2);
1854 emit_writeword(2,&Count);
1857 emit_far_call(handler);
1859 if(rt>=0&&dops[i].rt1!=0) {
1861 case LOADB_STUB: emit_signextend8(0,rt); break;
1862 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1863 case LOADH_STUB: emit_signextend16(0,rt); break;
1864 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1865 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1869 restore_regs(reglist);
1872 static void do_writestub(int n)
1874 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1876 set_jump_target(stubs[n].addr, out);
1877 enum stub_type type=stubs[n].type;
1880 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1881 u_int reglist=stubs[n].e;
1882 const signed char *i_regmap=i_regs->regmap;
1884 if(dops[i].itype==C1LS||dops[i].itype==C2LS) {
1885 rt=get_reg(i_regmap,r=FTEMP);
1887 rt=get_reg(i_regmap,r=dops[i].rs2);
1891 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1892 void *restore_jump = NULL;
1893 int reglist2=reglist|(1<<rs)|(1<<rt);
1894 for(rtmp=0;rtmp<=12;rtmp++) {
1895 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1902 for(rtmp=0;rtmp<=3;rtmp++)
1903 if(rtmp!=rs&&rtmp!=rt)
1906 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1908 emit_readword(&mem_wtab,temp);
1909 emit_shrimm(rs,12,temp2);
1910 emit_readword_dualindexedx4(temp,temp2,temp2);
1911 emit_lsls_imm(temp2,1,temp2);
1913 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1914 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1915 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1920 emit_jcc(0); // jump to reg restore
1923 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1929 case STOREB_STUB: handler=jump_handler_write8; break;
1930 case STOREH_STUB: handler=jump_handler_write16; break;
1931 case STOREW_STUB: handler=jump_handler_write32; break;
1938 int cc=get_reg(i_regmap,CCREG);
1940 emit_loadreg(CCREG,2);
1941 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1942 // returns new cycle_count
1943 emit_far_call(handler);
1944 emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
1946 emit_storereg(CCREG,2);
1948 set_jump_target(restore_jump, out);
1949 restore_regs(reglist);
1950 emit_jmp(stubs[n].retaddr);
1953 static void inline_writestub(enum stub_type type, int i, u_int addr,
1954 const signed char regmap[], int target, int adj, u_int reglist)
1956 int rs=get_reg_temp(regmap);
1957 int rt=get_reg(regmap,target);
1960 uintptr_t host_addr = 0;
1961 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1962 if (handler == NULL) {
1964 emit_movimm_from(addr,rs,host_addr,rs);
1966 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1967 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1968 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1974 // call a memhandler
1977 int cc=get_reg(regmap,CCREG);
1979 emit_loadreg(CCREG,2);
1980 emit_addimm(cc<0?2:cc,adj,2);
1981 emit_movimm((u_int)handler,3);
1982 // returns new cycle_count
1983 emit_far_call(jump_handler_write_h);
1984 emit_addimm(0,-adj,cc<0?2:cc);
1986 emit_storereg(CCREG,2);
1987 restore_regs(reglist);
1990 // this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
1991 static void do_dirty_stub_emit_args(u_int arg0, u_int source_len)
1994 emit_loadlp((int)source, 1);
1995 emit_loadlp((int)copy, 2);
1996 emit_loadlp(source_len, 3);
1998 emit_movw(((u_int)source)&0x0000FFFF, 1);
1999 emit_movw(((u_int)copy)&0x0000FFFF, 2);
2000 emit_movt(((u_int)source)&0xFFFF0000, 1);
2001 emit_movt(((u_int)copy)&0xFFFF0000, 2);
2002 emit_movw(source_len, 3);
2004 emit_movimm(arg0, 0);
2007 static void *do_dirty_stub(int i, u_int source_len)
2009 assem_debug("do_dirty_stub %x\n",start+i*4);
2010 do_dirty_stub_emit_args(start + i*4, source_len);
2011 emit_far_call(verify_code);
2015 entry = instr_addr[i];
2016 emit_jmp(instr_addr[i]);
2022 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
2024 save_regs_all(reglist);
2025 cop2_do_stall_check(op, i, i_regs, 0);
2028 emit_far_call(pcnt_gte_start);
2030 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
2033 static void c2op_epilogue(u_int op,u_int reglist)
2037 emit_far_call(pcnt_gte_end);
2039 restore_regs_all(reglist);
2042 static void c2op_call_MACtoIR(int lm,int need_flags)
2045 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
2047 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
2050 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
2052 emit_far_call(func);
2053 // func is C code and trashes r0
2054 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2055 if(need_flags||need_ir)
2056 c2op_call_MACtoIR(lm,need_flags);
2057 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
2060 static void c2op_assemble(int i, const struct regstat *i_regs)
2062 u_int c2op = source[i] & 0x3f;
2063 u_int reglist_full = get_host_reglist(i_regs->regmap);
2064 u_int reglist = reglist_full & CALLER_SAVE_REGS;
2065 int need_flags, need_ir;
2067 if (gte_handlers[c2op]!=NULL) {
2068 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
2069 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
2070 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
2071 source[i],gte_unneeded[i+1],need_flags,need_ir);
2072 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
2074 int shift = (source[i] >> 19) & 1;
2075 int lm = (source[i] >> 10) & 1;
2080 int v = (source[i] >> 15) & 3;
2081 int cv = (source[i] >> 13) & 3;
2082 int mx = (source[i] >> 17) & 3;
2083 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2084 c2op_prologue(c2op,i,i_regs,reglist);
2085 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2089 emit_movzwl_indexed(9*4,0,4); // gteIR
2090 emit_movzwl_indexed(10*4,0,6);
2091 emit_movzwl_indexed(11*4,0,5);
2092 emit_orrshl_imm(6,16,4);
2095 emit_addimm(0,32*4+mx*8*4,6);
2097 emit_readword(&zeromem_ptr,6);
2099 emit_addimm(0,32*4+(cv*8+5)*4,7);
2101 emit_readword(&zeromem_ptr,7);
2103 emit_movimm(source[i],1); // opcode
2104 emit_far_call(gteMVMVA_part_neon);
2107 emit_far_call(gteMACtoIR_flags_neon);
2111 emit_far_call(gteMVMVA_part_cv3sh12_arm);
2113 emit_movimm(shift,1);
2114 emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
2116 if(need_flags||need_ir)
2117 c2op_call_MACtoIR(lm,need_flags);
2119 #else /* if not HAVE_ARMV5 */
2120 c2op_prologue(c2op,i,i_regs,reglist);
2121 emit_movimm(source[i],1); // opcode
2122 emit_writeword(1,&psxRegs.code);
2123 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2128 c2op_prologue(c2op,i,i_regs,reglist);
2129 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2130 if(need_flags||need_ir) {
2131 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2132 c2op_call_MACtoIR(lm,need_flags);
2136 c2op_prologue(c2op,i,i_regs,reglist);
2137 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2140 c2op_prologue(c2op,i,i_regs,reglist);
2141 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2144 c2op_prologue(c2op,i,i_regs,reglist);
2145 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2146 if(need_flags||need_ir) {
2147 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2148 c2op_call_MACtoIR(lm,need_flags);
2152 c2op_prologue(c2op,i,i_regs,reglist);
2153 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2156 c2op_prologue(c2op,i,i_regs,reglist);
2157 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2160 c2op_prologue(c2op,i,i_regs,reglist);
2161 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2165 c2op_prologue(c2op,i,i_regs,reglist);
2167 emit_movimm(source[i],1); // opcode
2168 emit_writeword(1,&psxRegs.code);
2170 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2173 c2op_epilogue(c2op,reglist);
2177 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2179 //value = value & 0x7ffff000;
2180 //if (value & 0x7f87e000) value |= 0x80000000;
2181 emit_shrimm(sl,12,temp);
2182 emit_shlimm(temp,12,temp);
2183 emit_testimm(temp,0x7f000000);
2184 emit_testeqimm(temp,0x00870000);
2185 emit_testeqimm(temp,0x0000e000);
2186 emit_orrne_imm(temp,0x80000000,temp);
2189 static void do_mfc2_31_one(u_int copr,signed char temp)
2191 emit_readword(®_cop2d[copr],temp);
2192 emit_lsls_imm(temp,16,temp);
2193 emit_cmovs_imm(0,temp);
2194 emit_cmpimm(temp,0xf80<<16);
2195 emit_andimm(temp,0xf80<<16,temp);
2196 emit_cmovae_imm(0xf80<<16,temp);
2199 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2202 host_tempreg_acquire();
2203 temp = HOST_TEMPREG;
2205 do_mfc2_31_one(9,temp);
2206 emit_shrimm(temp,7+16,tl);
2207 do_mfc2_31_one(10,temp);
2208 emit_orrshr_imm(temp,2+16,tl);
2209 do_mfc2_31_one(11,temp);
2210 emit_orrshr_imm(temp,-3+16,tl);
2211 emit_writeword(tl,®_cop2d[29]);
2212 if (temp == HOST_TEMPREG)
2213 host_tempreg_release();
2216 static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
2223 // case 0x1D: DMULTU
2226 if(dops[i].rs1&&dops[i].rs2)
2228 if((dops[i].opcode2&4)==0) // 32-bit
2230 if(dops[i].opcode2==0x18) // MULT
2232 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2233 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2234 signed char hi=get_reg(i_regs->regmap,HIREG);
2235 signed char lo=get_reg(i_regs->regmap,LOREG);
2240 emit_smull(m1,m2,hi,lo);
2242 if(dops[i].opcode2==0x19) // MULTU
2244 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2245 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2246 signed char hi=get_reg(i_regs->regmap,HIREG);
2247 signed char lo=get_reg(i_regs->regmap,LOREG);
2252 emit_umull(m1,m2,hi,lo);
2254 if(dops[i].opcode2==0x1A) // DIV
2256 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2257 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2260 signed char quotient=get_reg(i_regs->regmap,LOREG);
2261 signed char remainder=get_reg(i_regs->regmap,HIREG);
2262 assert(quotient>=0);
2263 assert(remainder>=0);
2264 emit_movs(d1,remainder);
2265 emit_movimm(0xffffffff,quotient);
2266 emit_negmi(quotient,quotient); // .. quotient and ..
2267 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2268 emit_movs(d2,HOST_TEMPREG);
2269 emit_jeq(out+52); // Division by zero
2270 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2272 emit_clz(HOST_TEMPREG,quotient);
2273 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2275 emit_movimm(0,quotient);
2276 emit_addpl_imm(quotient,1,quotient);
2277 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2280 emit_orimm(quotient,1<<31,quotient);
2281 emit_shr(quotient,quotient,quotient);
2282 emit_cmp(remainder,HOST_TEMPREG);
2283 emit_subcs(remainder,HOST_TEMPREG,remainder);
2284 emit_adcs(quotient,quotient,quotient);
2285 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2286 emit_jcc(out-16); // -4
2288 emit_negmi(quotient,quotient);
2290 emit_negmi(remainder,remainder);
2292 if(dops[i].opcode2==0x1B) // DIVU
2294 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2295 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2298 signed char quotient=get_reg(i_regs->regmap,LOREG);
2299 signed char remainder=get_reg(i_regs->regmap,HIREG);
2300 assert(quotient>=0);
2301 assert(remainder>=0);
2302 emit_mov(d1,remainder);
2303 emit_movimm(0xffffffff,quotient); // div0 case
2305 emit_jeq(out+40); // Division by zero
2307 emit_clz(d2,HOST_TEMPREG);
2308 emit_movimm(1<<31,quotient);
2309 emit_shl(d2,HOST_TEMPREG,d2);
2311 emit_movimm(0,HOST_TEMPREG);
2312 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2313 emit_lslpls_imm(d2,1,d2);
2315 emit_movimm(1<<31,quotient);
2317 emit_shr(quotient,HOST_TEMPREG,quotient);
2318 emit_cmp(remainder,d2);
2319 emit_subcs(remainder,d2,remainder);
2320 emit_adcs(quotient,quotient,quotient);
2321 emit_shrcc_imm(d2,1,d2);
2322 emit_jcc(out-16); // -4
2330 // Multiply by zero is zero.
2331 // MIPS does not have a divide by zero exception.
2332 // The result is undefined, we return zero.
2333 signed char hr=get_reg(i_regs->regmap,HIREG);
2334 signed char lr=get_reg(i_regs->regmap,LOREG);
2335 if(hr>=0) emit_zeroreg(hr);
2336 if(lr>=0) emit_zeroreg(lr);
2339 #define multdiv_assemble multdiv_assemble_arm
2341 static void do_jump_vaddr(int rs)
2343 emit_far_jump(jump_vaddr_reg[rs]);
2346 static void do_preload_rhash(int r) {
2347 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2348 // register. On ARM the hash can be done with a single instruction (below)
2351 static void do_preload_rhtbl(int ht) {
2352 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2355 static void do_rhash(int rs,int rh) {
2356 emit_andimm(rs,0xf8,rh);
2359 static void do_miniht_load(int ht,int rh) {
2360 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2361 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2364 static void do_miniht_jump(int rs,int rh,int ht) {
2366 emit_ldreq_indexed(ht,4,15);
2367 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2375 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2377 emit_movimm(return_address,rt); // PC into link register
2378 add_to_linker(out,return_address,1);
2379 emit_pcreladdr(temp);
2380 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2381 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2383 emit_movw(return_address&0x0000FFFF,rt);
2384 add_to_linker(out,return_address,1);
2385 emit_pcreladdr(temp);
2386 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2387 emit_movt(return_address&0xFFFF0000,rt);
2388 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2392 // CPU-architecture-specific initialization
2393 static void arch_init(void)
2395 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2396 struct tramp_insns *ops = ndrc->tramp.ops;
2398 assert(!(diff & 3));
2399 assert(diff < 0x1000);
2400 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2401 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2402 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2403 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2406 // vim:shiftwidth=2:expandtab