1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2011 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
37 .global pending_exception
45 .global restore_candidate
52 .global inv_code_start
58 .type dynarec_local, %object
59 .size dynarec_local, dynarec_local_end-dynarec_local
61 .space dynarec_local_end-dynarec_local
62 next_interupt = dynarec_local + 64
63 .type next_interupt, %object
64 .size next_interupt, 4
65 cycle_count = next_interupt + 4
66 .type cycle_count, %object
68 last_count = cycle_count + 4
69 .type last_count, %object
71 pending_exception = last_count + 4
72 .type pending_exception, %object
73 .size pending_exception, 4
74 stop = pending_exception + 4
78 .type invc_ptr, %object
80 address = invc_ptr + 4
81 .type address, %object
86 .type psxRegs, %object
87 .size psxRegs, psxRegs_end-psxRegs
98 .type reg_cop0, %object
100 reg_cop2d = reg_cop0 + 128
101 .type reg_cop2d, %object
103 reg_cop2c = reg_cop2d + 128
104 .type reg_cop2c, %object
116 interrupt = cycle + 4
117 .type interrupt, %object
119 intCycle = interrupt + 4
120 .type intCycle, %object
122 psxRegs_end = intCycle + 256
127 rcnts_end = rcnts + 7*4*4
130 .type mem_rtab, %object
132 mem_wtab = mem_rtab + 4
133 .type mem_wtab, %object
135 psxH_ptr = mem_wtab + 4
136 .type psxH_ptr, %object
138 zeromem_ptr = psxH_ptr + 4
139 .type zeromem_ptr, %object
141 inv_code_start = zeromem_ptr + 4
142 .type inv_code_start, %object
143 .size inv_code_start, 4
144 inv_code_end = inv_code_start + 4
145 .type inv_code_end, %object
146 .size inv_code_end, 4
147 branch_target = inv_code_end + 4
148 .type branch_target, %object
149 .size branch_target, 4
150 align0 = branch_target + 4 /* unused/alignment */
151 .type align0, %object
153 mini_ht = align0 + 16
154 .type mini_ht, %object
156 restore_candidate = mini_ht + 256
157 .type restore_candidate, %object
158 .size restore_candidate, 512
159 dynarec_local_end = restore_candidate + 512
176 .macro load_varadr reg var
177 #if defined(__ARM_ARCH_7A__) && !defined(__PIC__)
178 movw \reg, #:lower16:\var
179 movt \reg, #:upper16:\var
185 .macro mov_16 reg imm
186 #ifdef __ARM_ARCH_7A__
189 mov \reg, #(\imm & 0x00ff)
190 orr \reg, #(\imm & 0xff00)
194 .macro mov_24 reg imm
195 #ifdef __ARM_ARCH_7A__
196 movw \reg, #(\imm & 0xffff)
197 movt \reg, #(\imm >> 16)
199 mov \reg, #(\imm & 0x0000ff)
200 orr \reg, #(\imm & 0x00ff00)
201 orr \reg, #(\imm & 0xff0000)
205 .macro dyna_linker_main
206 /* r0 = virtual target address */
207 /* r1 = instruction to patch */
221 ldr r5, [r3, r2, lsl #2]
223 add r6, r1, r12, asr #6
238 moveq pc, r4 /* Stale i-cache */
240 b 1b /* jump_in may have dupes, continue search */
243 beq 3f /* r0 not in jump_in */
249 and r1, r7, #0xff000000
252 add r1, r1, r2, lsr #8
256 /* hash_table lookup */
259 eor r4, r0, r0, lsl #16
265 ldr r5, [r3, r2, lsl #2]
272 /* jump_dirty lookup */
282 /* hash_table insert */
296 .type dyna_linker, %function
298 /* r0 = virtual target address */
299 /* r1 = instruction to patch */
304 bl new_recompile_block
312 .size dyna_linker, .-dyna_linker
313 .global exec_pagefault
314 .type exec_pagefault, %function
316 /* r0 = instruction pointer */
317 /* r1 = fault address */
319 ldr r3, [fp, #reg_cop0+48-dynarec_local] /* Status */
321 ldr r4, [fp, #reg_cop0+16-dynarec_local] /* Context */
322 bic r6, r6, #0x0F800000
323 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
325 str r1, [fp, #reg_cop0+32-dynarec_local] /* BadVAddr */
327 str r3, [fp, #reg_cop0+48-dynarec_local] /* Status */
328 and r5, r6, r1, lsr #9
329 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
330 and r1, r1, r6, lsl #9
331 str r1, [fp, #reg_cop0+40-dynarec_local] /* EntryHi */
333 str r4, [fp, #reg_cop0+16-dynarec_local] /* Context */
337 .size exec_pagefault, .-exec_pagefault
339 /* Special dynamic linker for the case where a page fault
340 may occur in a branch delay slot */
341 .global dyna_linker_ds
342 .type dyna_linker_ds, %function
344 /* r0 = virtual target address */
345 /* r1 = instruction to patch */
352 bl new_recompile_block
359 mov r2, #0x80000008 /* High bit set indicates pagefault in delay slot */
362 .size dyna_linker_ds, .-dyna_linker_ds
371 .global jump_vaddr_r0
372 .type jump_vaddr_r0, %function
374 eor r2, r0, r0, lsl #16
376 .size jump_vaddr_r0, .-jump_vaddr_r0
377 .global jump_vaddr_r1
378 .type jump_vaddr_r1, %function
380 eor r2, r1, r1, lsl #16
383 .size jump_vaddr_r1, .-jump_vaddr_r1
384 .global jump_vaddr_r2
385 .type jump_vaddr_r2, %function
388 eor r2, r2, r2, lsl #16
390 .size jump_vaddr_r2, .-jump_vaddr_r2
391 .global jump_vaddr_r3
392 .type jump_vaddr_r3, %function
394 eor r2, r3, r3, lsl #16
397 .size jump_vaddr_r3, .-jump_vaddr_r3
398 .global jump_vaddr_r4
399 .type jump_vaddr_r4, %function
401 eor r2, r4, r4, lsl #16
404 .size jump_vaddr_r4, .-jump_vaddr_r4
405 .global jump_vaddr_r5
406 .type jump_vaddr_r5, %function
408 eor r2, r5, r5, lsl #16
411 .size jump_vaddr_r5, .-jump_vaddr_r5
412 .global jump_vaddr_r6
413 .type jump_vaddr_r6, %function
415 eor r2, r6, r6, lsl #16
418 .size jump_vaddr_r6, .-jump_vaddr_r6
419 .global jump_vaddr_r8
420 .type jump_vaddr_r8, %function
422 eor r2, r8, r8, lsl #16
425 .size jump_vaddr_r8, .-jump_vaddr_r8
426 .global jump_vaddr_r9
427 .type jump_vaddr_r9, %function
429 eor r2, r9, r9, lsl #16
432 .size jump_vaddr_r9, .-jump_vaddr_r9
433 .global jump_vaddr_r10
434 .type jump_vaddr_r10, %function
436 eor r2, r10, r10, lsl #16
439 .size jump_vaddr_r10, .-jump_vaddr_r10
440 .global jump_vaddr_r12
441 .type jump_vaddr_r12, %function
443 eor r2, r12, r12, lsl #16
446 .size jump_vaddr_r12, .-jump_vaddr_r12
447 .global jump_vaddr_r7
448 .type jump_vaddr_r7, %function
450 eor r2, r7, r7, lsl #16
452 .size jump_vaddr_r7, .-jump_vaddr_r7
454 .type jump_vaddr, %function
458 and r2, r3, r2, lsr #12
465 str r10, [fp, #cycle_count-dynarec_local]
467 ldr r10, [fp, #cycle_count-dynarec_local]
469 .size jump_vaddr, .-jump_vaddr
472 .global verify_code_ds
473 .type verify_code_ds, %function
475 str r8, [fp, #branch_target-dynarec_local]
476 .size verify_code_ds, .-verify_code_ds
477 .global verify_code_vm
478 .type verify_code_vm, %function
481 .type verify_code, %function
510 ldr r8, [fp, #branch_target-dynarec_local]
515 .size verify_code, .-verify_code
516 .size verify_code_vm, .-verify_code_vm
520 .type cc_interrupt, %function
522 ldr r0, [fp, #last_count-dynarec_local]
526 str r1, [fp, #pending_exception-dynarec_local]
527 and r2, r2, r10, lsr #17
528 add r3, fp, #restore_candidate-dynarec_local
529 str r10, [fp, #cycle-dynarec_local] /* PCSX cycles */
530 @@ str r10, [fp, #reg_cop0+36-dynarec_local] /* Count */
538 ldr r10, [fp, #cycle-dynarec_local]
539 ldr r0, [fp, #next_interupt-dynarec_local]
540 ldr r1, [fp, #pending_exception-dynarec_local]
541 ldr r2, [fp, #stop-dynarec_local]
542 str r0, [fp, #last_count-dynarec_local]
545 ldmnefd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
549 ldr r0, [fp, #pcaddr-dynarec_local]
553 /* Move 'dirty' blocks to the 'clean' list */
564 .size cc_interrupt, .-cc_interrupt
568 .type do_interrupt, %function
570 ldr r0, [fp, #pcaddr-dynarec_local]
574 .size do_interrupt, .-do_interrupt
578 .type fp_exception, %function
582 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
584 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
587 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
588 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
592 .size fp_exception, .-fp_exception
594 .global fp_exception_ds
595 .type fp_exception_ds, %function
597 mov r2, #0x90000000 /* Set high bit if delay slot */
599 .size fp_exception_ds, .-fp_exception_ds
603 .type jump_syscall, %function
605 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
607 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
610 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
611 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
615 .size jump_syscall, .-jump_syscall
619 .global jump_syscall_hle
620 .type jump_syscall_hle, %function
622 str r0, [fp, #pcaddr-dynarec_local] /* PC must be set to EPC for psxException */
623 ldr r2, [fp, #last_count-dynarec_local]
624 mov r1, #0 /* in delay slot */
626 mov r0, #0x20 /* cause */
627 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
630 /* note: psxException might do recorsive recompiler call from it's HLE code,
631 * so be ready for this */
633 ldr r1, [fp, #next_interupt-dynarec_local]
634 ldr r10, [fp, #cycle-dynarec_local]
635 ldr r0, [fp, #pcaddr-dynarec_local]
637 str r1, [fp, #last_count-dynarec_local]
640 .size jump_syscall_hle, .-jump_syscall_hle
644 .type jump_hlecall, %function
646 ldr r2, [fp, #last_count-dynarec_local]
647 str r0, [fp, #pcaddr-dynarec_local]
650 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
652 .size jump_hlecall, .-jump_hlecall
656 .type jump_intcall, %function
658 ldr r2, [fp, #last_count-dynarec_local]
659 str r0, [fp, #pcaddr-dynarec_local]
662 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
664 .size jump_hlecall, .-jump_hlecall
668 .global new_dyna_leave
669 .type new_dyna_leave, %function
670 ldr r0, [fp, #last_count-dynarec_local]
673 str r10, [fp, #cycle-dynarec_local]
674 ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
675 .size new_dyna_leave, .-new_dyna_leave
678 .global invalidate_addr_r0
679 .type invalidate_addr_r0, %function
681 stmia fp, {r0, r1, r2, r3, r12, lr}
682 b invalidate_addr_call
683 .size invalidate_addr_r0, .-invalidate_addr_r0
685 .global invalidate_addr_r1
686 .type invalidate_addr_r1, %function
688 stmia fp, {r0, r1, r2, r3, r12, lr}
690 b invalidate_addr_call
691 .size invalidate_addr_r1, .-invalidate_addr_r1
693 .global invalidate_addr_r2
694 .type invalidate_addr_r2, %function
696 stmia fp, {r0, r1, r2, r3, r12, lr}
698 b invalidate_addr_call
699 .size invalidate_addr_r2, .-invalidate_addr_r2
701 .global invalidate_addr_r3
702 .type invalidate_addr_r3, %function
704 stmia fp, {r0, r1, r2, r3, r12, lr}
706 b invalidate_addr_call
707 .size invalidate_addr_r3, .-invalidate_addr_r3
709 .global invalidate_addr_r4
710 .type invalidate_addr_r4, %function
712 stmia fp, {r0, r1, r2, r3, r12, lr}
714 b invalidate_addr_call
715 .size invalidate_addr_r4, .-invalidate_addr_r4
717 .global invalidate_addr_r5
718 .type invalidate_addr_r5, %function
720 stmia fp, {r0, r1, r2, r3, r12, lr}
722 b invalidate_addr_call
723 .size invalidate_addr_r5, .-invalidate_addr_r5
725 .global invalidate_addr_r6
726 .type invalidate_addr_r6, %function
728 stmia fp, {r0, r1, r2, r3, r12, lr}
730 b invalidate_addr_call
731 .size invalidate_addr_r6, .-invalidate_addr_r6
733 .global invalidate_addr_r7
734 .type invalidate_addr_r7, %function
736 stmia fp, {r0, r1, r2, r3, r12, lr}
738 b invalidate_addr_call
739 .size invalidate_addr_r7, .-invalidate_addr_r7
741 .global invalidate_addr_r8
742 .type invalidate_addr_r8, %function
744 stmia fp, {r0, r1, r2, r3, r12, lr}
746 b invalidate_addr_call
747 .size invalidate_addr_r8, .-invalidate_addr_r8
749 .global invalidate_addr_r9
750 .type invalidate_addr_r9, %function
752 stmia fp, {r0, r1, r2, r3, r12, lr}
754 b invalidate_addr_call
755 .size invalidate_addr_r9, .-invalidate_addr_r9
757 .global invalidate_addr_r10
758 .type invalidate_addr_r10, %function
760 stmia fp, {r0, r1, r2, r3, r12, lr}
762 b invalidate_addr_call
763 .size invalidate_addr_r10, .-invalidate_addr_r10
765 .global invalidate_addr_r12
766 .type invalidate_addr_r12, %function
768 stmia fp, {r0, r1, r2, r3, r12, lr}
770 .size invalidate_addr_r12, .-invalidate_addr_r12
772 .global invalidate_addr_call
773 .type invalidate_addr_call, %function
774 invalidate_addr_call:
775 ldr r12, [fp, #inv_code_start-dynarec_local]
776 ldr lr, [fp, #inv_code_end-dynarec_local]
780 ldmia fp, {r0, r1, r2, r3, r12, pc}
781 .size invalidate_addr_call, .-invalidate_addr_call
784 .global new_dyna_start
785 .type new_dyna_start, %function
787 /* ip is stored to conform EABI alignment */
788 stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
789 load_varadr fp, dynarec_local
790 ldr r0, [fp, #pcaddr-dynarec_local]
792 ldr r1, [fp, #next_interupt-dynarec_local]
793 ldr r10, [fp, #cycle-dynarec_local]
794 str r1, [fp, #last_count-dynarec_local]
797 .size new_dyna_start, .-new_dyna_start
799 /* --------------------------------------- */
802 .global jump_handler_read8
803 .global jump_handler_read16
804 .global jump_handler_read32
805 .global jump_handler_write8
806 .global jump_handler_write16
807 .global jump_handler_write32
808 .global jump_handler_write_h
809 .global jump_handle_swl
810 .global jump_handle_swr
811 .global rcnt0_read_count_m0
812 .global rcnt0_read_count_m1
813 .global rcnt1_read_count_m0
814 .global rcnt1_read_count_m1
815 .global rcnt2_read_count_m0
816 .global rcnt2_read_count_m1
819 .macro pcsx_read_mem readop tab_shift
820 /* r0 = address, r1 = handler_tab, r2 = cycles */
822 lsr r3, #(20+\tab_shift)
823 ldr r12, [fp, #last_count-dynarec_local]
824 ldr r1, [r1, r3, lsl #2]
831 \readop r0, [r1, r3, lsl #\tab_shift]
834 str r2, [fp, #cycle-dynarec_local]
839 add r1, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
840 pcsx_read_mem ldrccb, 0
843 add r1, #0x1000/4*4 @ shift to r16 part
844 pcsx_read_mem ldrcch, 1
847 pcsx_read_mem ldrcc, 2
850 .macro pcsx_write_mem wrtop tab_shift
851 /* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
853 lsr r12, #(20+\tab_shift)
854 ldr r3, [r3, r12, lsl #2]
855 str r0, [fp, #address-dynarec_local] @ some handlers still need it..
857 mov r0, r2 @ cycle return in case of direct store
862 \wrtop r1, [r3, r12, lsl #\tab_shift]
865 ldr r12, [fp, #last_count-dynarec_local]
869 str r2, [fp, #cycle-dynarec_local]
872 ldr r0, [fp, #next_interupt-dynarec_local]
874 str r0, [fp, #last_count-dynarec_local]
880 add r3, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
881 pcsx_write_mem strccb, 0
883 jump_handler_write16:
884 add r3, #0x1000/4*4 @ shift to r16 part
885 pcsx_write_mem strcch, 1
887 jump_handler_write32:
888 pcsx_write_mem strcc, 2
890 jump_handler_write_h:
891 /* r0 = address, r1 = data, r2 = cycles, r3 = handler */
892 ldr r12, [fp, #last_count-dynarec_local]
893 str r0, [fp, #address-dynarec_local] @ some handlers still need it..
897 str r2, [fp, #cycle-dynarec_local]
900 ldr r0, [fp, #next_interupt-dynarec_local]
902 str r0, [fp, #last_count-dynarec_local]
907 /* r0 = address, r1 = data, r2 = cycles */
908 ldr r3, [fp, #mem_wtab-dynarec_local]
910 ldr r3, [r3, r12, lsl #2]
931 lsreq r12, r1, #24 @ 0
942 /* r0 = address, r1 = data, r2 = cycles */
943 ldr r3, [fp, #mem_wtab-dynarec_local]
945 ldr r3, [r3, r12, lsl #2]
967 .macro rcntx_read_mode0 num
968 /* r0 = address, r2 = cycles */
969 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*\num] @ cycleStart
986 /* r0 = address, r2 = cycles */
987 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*0] @ cycleStart
990 mul r0, r1, r2 @ /= 5
995 /* r0 = address, r2 = cycles */
996 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*1]
999 umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
1002 rcnt2_read_count_m1:
1003 /* r0 = address, r2 = cycles */
1004 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*2]
1005 mov r0, r2, lsl #16-3
1006 sub r0, r3, lsl #16-3
1010 @ vim:filetype=armasm