1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2011 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 /* .equiv HAVE_ARMV7, 1 */
36 .global pending_exception
44 .global restore_candidate
51 .global inv_code_start
57 .type dynarec_local, %object
58 .size dynarec_local, dynarec_local_end-dynarec_local
60 .space dynarec_local_end-dynarec_local
61 next_interupt = dynarec_local + 64
62 .type next_interupt, %object
63 .size next_interupt, 4
64 cycle_count = next_interupt + 4
65 .type cycle_count, %object
67 last_count = cycle_count + 4
68 .type last_count, %object
70 pending_exception = last_count + 4
71 .type pending_exception, %object
72 .size pending_exception, 4
73 stop = pending_exception + 4
77 .type invc_ptr, %object
79 address = invc_ptr + 4
80 .type address, %object
85 .type psxRegs, %object
86 .size psxRegs, psxRegs_end-psxRegs
97 .type reg_cop0, %object
99 reg_cop2d = reg_cop0 + 128
100 .type reg_cop2d, %object
102 reg_cop2c = reg_cop2d + 128
103 .type reg_cop2c, %object
115 interrupt = cycle + 4
116 .type interrupt, %object
118 intCycle = interrupt + 4
119 .type intCycle, %object
121 psxRegs_end = intCycle + 256
126 rcnts_end = rcnts + 7*4*4
129 .type mem_rtab, %object
131 mem_wtab = mem_rtab + 4
132 .type mem_wtab, %object
134 psxH_ptr = mem_wtab + 4
135 .type psxH_ptr, %object
137 zeromem_ptr = psxH_ptr + 4
138 .type zeromem_ptr, %object
140 inv_code_start = zeromem_ptr + 4
141 .type inv_code_start, %object
142 .size inv_code_start, 4
143 inv_code_end = inv_code_start + 4
144 .type inv_code_end, %object
145 .size inv_code_end, 4
146 branch_target = inv_code_end + 4
147 .type branch_target, %object
148 .size branch_target, 4
149 align0 = branch_target + 4 /* unused/alignment */
150 .type align0, %object
152 mini_ht = align0 + 16
153 .type mini_ht, %object
155 restore_candidate = mini_ht + 256
156 .type restore_candidate, %object
157 .size restore_candidate, 512
158 dynarec_local_end = restore_candidate + 512
168 .macro load_var_adr reg var
170 movw \reg, #:lower16:\var
171 movt \reg, #:upper16:\var
177 .macro mov_16 reg imm
181 mov \reg, #(\imm & 0x00ff)
182 orr \reg, #(\imm & 0xff00)
186 .macro mov_24 reg imm
188 movw \reg, #(\imm & 0xffff)
189 movt \reg, #(\imm >> 16)
191 mov \reg, #(\imm & 0x0000ff)
192 orr \reg, #(\imm & 0x00ff00)
193 orr \reg, #(\imm & 0xff0000)
197 .macro dyna_linker_main
198 /* r0 = virtual target address */
199 /* r1 = instruction to patch */
213 ldr r5, [r3, r2, lsl #2]
215 add r6, r1, r12, asr #6
230 moveq pc, r4 /* Stale i-cache */
232 b 1b /* jump_in may have dupes, continue search */
235 beq 3f /* r0 not in jump_in */
241 and r1, r7, #0xff000000
244 add r1, r1, r2, lsr #8
248 /* hash_table lookup */
251 eor r4, r0, r0, lsl #16
257 ldr r5, [r3, r2, lsl #2]
264 /* jump_dirty lookup */
274 /* hash_table insert */
288 .type dyna_linker, %function
290 /* r0 = virtual target address */
291 /* r1 = instruction to patch */
296 bl new_recompile_block
304 .size dyna_linker, .-dyna_linker
305 .global exec_pagefault
306 .type exec_pagefault, %function
308 /* r0 = instruction pointer */
309 /* r1 = fault address */
311 ldr r3, [fp, #reg_cop0+48-dynarec_local] /* Status */
313 ldr r4, [fp, #reg_cop0+16-dynarec_local] /* Context */
314 bic r6, r6, #0x0F800000
315 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
317 str r1, [fp, #reg_cop0+32-dynarec_local] /* BadVAddr */
319 str r3, [fp, #reg_cop0+48-dynarec_local] /* Status */
320 and r5, r6, r1, lsr #9
321 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
322 and r1, r1, r6, lsl #9
323 str r1, [fp, #reg_cop0+40-dynarec_local] /* EntryHi */
325 str r4, [fp, #reg_cop0+16-dynarec_local] /* Context */
329 .size exec_pagefault, .-exec_pagefault
331 /* Special dynamic linker for the case where a page fault
332 may occur in a branch delay slot */
333 .global dyna_linker_ds
334 .type dyna_linker_ds, %function
336 /* r0 = virtual target address */
337 /* r1 = instruction to patch */
344 bl new_recompile_block
351 mov r2, #0x80000008 /* High bit set indicates pagefault in delay slot */
354 .size dyna_linker_ds, .-dyna_linker_ds
363 .global jump_vaddr_r0
364 .type jump_vaddr_r0, %function
366 eor r2, r0, r0, lsl #16
368 .size jump_vaddr_r0, .-jump_vaddr_r0
369 .global jump_vaddr_r1
370 .type jump_vaddr_r1, %function
372 eor r2, r1, r1, lsl #16
375 .size jump_vaddr_r1, .-jump_vaddr_r1
376 .global jump_vaddr_r2
377 .type jump_vaddr_r2, %function
380 eor r2, r2, r2, lsl #16
382 .size jump_vaddr_r2, .-jump_vaddr_r2
383 .global jump_vaddr_r3
384 .type jump_vaddr_r3, %function
386 eor r2, r3, r3, lsl #16
389 .size jump_vaddr_r3, .-jump_vaddr_r3
390 .global jump_vaddr_r4
391 .type jump_vaddr_r4, %function
393 eor r2, r4, r4, lsl #16
396 .size jump_vaddr_r4, .-jump_vaddr_r4
397 .global jump_vaddr_r5
398 .type jump_vaddr_r5, %function
400 eor r2, r5, r5, lsl #16
403 .size jump_vaddr_r5, .-jump_vaddr_r5
404 .global jump_vaddr_r6
405 .type jump_vaddr_r6, %function
407 eor r2, r6, r6, lsl #16
410 .size jump_vaddr_r6, .-jump_vaddr_r6
411 .global jump_vaddr_r8
412 .type jump_vaddr_r8, %function
414 eor r2, r8, r8, lsl #16
417 .size jump_vaddr_r8, .-jump_vaddr_r8
418 .global jump_vaddr_r9
419 .type jump_vaddr_r9, %function
421 eor r2, r9, r9, lsl #16
424 .size jump_vaddr_r9, .-jump_vaddr_r9
425 .global jump_vaddr_r10
426 .type jump_vaddr_r10, %function
428 eor r2, r10, r10, lsl #16
431 .size jump_vaddr_r10, .-jump_vaddr_r10
432 .global jump_vaddr_r12
433 .type jump_vaddr_r12, %function
435 eor r2, r12, r12, lsl #16
438 .size jump_vaddr_r12, .-jump_vaddr_r12
439 .global jump_vaddr_r7
440 .type jump_vaddr_r7, %function
442 eor r2, r7, r7, lsl #16
444 .size jump_vaddr_r7, .-jump_vaddr_r7
446 .type jump_vaddr, %function
450 and r2, r3, r2, lsr #12
457 str r10, [fp, #cycle_count-dynarec_local]
459 ldr r10, [fp, #cycle_count-dynarec_local]
461 .size jump_vaddr, .-jump_vaddr
464 .global verify_code_ds
465 .type verify_code_ds, %function
467 str r8, [fp, #branch_target-dynarec_local]
468 .size verify_code_ds, .-verify_code_ds
469 .global verify_code_vm
470 .type verify_code_vm, %function
473 .type verify_code, %function
502 ldr r8, [fp, #branch_target-dynarec_local]
507 .size verify_code, .-verify_code
508 .size verify_code_vm, .-verify_code_vm
512 .type cc_interrupt, %function
514 ldr r0, [fp, #last_count-dynarec_local]
518 str r1, [fp, #pending_exception-dynarec_local]
519 and r2, r2, r10, lsr #17
520 add r3, fp, #restore_candidate-dynarec_local
521 str r10, [fp, #cycle-dynarec_local] /* PCSX cycles */
522 @@ str r10, [fp, #reg_cop0+36-dynarec_local] /* Count */
530 ldr r10, [fp, #cycle-dynarec_local]
531 ldr r0, [fp, #next_interupt-dynarec_local]
532 ldr r1, [fp, #pending_exception-dynarec_local]
533 ldr r2, [fp, #stop-dynarec_local]
534 str r0, [fp, #last_count-dynarec_local]
537 ldmnefd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
541 ldr r0, [fp, #pcaddr-dynarec_local]
545 /* Move 'dirty' blocks to the 'clean' list */
556 .size cc_interrupt, .-cc_interrupt
560 .type do_interrupt, %function
562 ldr r0, [fp, #pcaddr-dynarec_local]
566 .size do_interrupt, .-do_interrupt
570 .type fp_exception, %function
574 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
576 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
579 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
580 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
584 .size fp_exception, .-fp_exception
586 .global fp_exception_ds
587 .type fp_exception_ds, %function
589 mov r2, #0x90000000 /* Set high bit if delay slot */
591 .size fp_exception_ds, .-fp_exception_ds
595 .type jump_syscall, %function
597 ldr r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
599 str r0, [fp, #reg_cop0+56-dynarec_local] /* EPC */
602 str r1, [fp, #reg_cop0+48-dynarec_local] /* Status */
603 str r2, [fp, #reg_cop0+52-dynarec_local] /* Cause */
607 .size jump_syscall, .-jump_syscall
611 .global jump_syscall_hle
612 .type jump_syscall_hle, %function
614 str r0, [fp, #pcaddr-dynarec_local] /* PC must be set to EPC for psxException */
615 ldr r2, [fp, #last_count-dynarec_local]
616 mov r1, #0 /* in delay slot */
618 mov r0, #0x20 /* cause */
619 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
622 /* note: psxException might do recorsive recompiler call from it's HLE code,
623 * so be ready for this */
625 ldr r1, [fp, #next_interupt-dynarec_local]
626 ldr r10, [fp, #cycle-dynarec_local]
627 ldr r0, [fp, #pcaddr-dynarec_local]
629 str r1, [fp, #last_count-dynarec_local]
632 .size jump_syscall_hle, .-jump_syscall_hle
636 .type jump_hlecall, %function
638 ldr r2, [fp, #last_count-dynarec_local]
639 str r0, [fp, #pcaddr-dynarec_local]
642 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
644 .size jump_hlecall, .-jump_hlecall
648 .type jump_intcall, %function
650 ldr r2, [fp, #last_count-dynarec_local]
651 str r0, [fp, #pcaddr-dynarec_local]
654 str r2, [fp, #cycle-dynarec_local] /* PCSX cycle counter */
656 .size jump_hlecall, .-jump_hlecall
660 .global new_dyna_leave
661 .type new_dyna_leave, %function
662 ldr r0, [fp, #last_count-dynarec_local]
665 str r10, [fp, #cycle-dynarec_local]
666 ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
667 .size new_dyna_leave, .-new_dyna_leave
670 .global invalidate_addr_r0
671 .type invalidate_addr_r0, %function
673 stmia fp, {r0, r1, r2, r3, r12, lr}
674 b invalidate_addr_call
675 .size invalidate_addr_r0, .-invalidate_addr_r0
677 .global invalidate_addr_r1
678 .type invalidate_addr_r1, %function
680 stmia fp, {r0, r1, r2, r3, r12, lr}
682 b invalidate_addr_call
683 .size invalidate_addr_r1, .-invalidate_addr_r1
685 .global invalidate_addr_r2
686 .type invalidate_addr_r2, %function
688 stmia fp, {r0, r1, r2, r3, r12, lr}
690 b invalidate_addr_call
691 .size invalidate_addr_r2, .-invalidate_addr_r2
693 .global invalidate_addr_r3
694 .type invalidate_addr_r3, %function
696 stmia fp, {r0, r1, r2, r3, r12, lr}
698 b invalidate_addr_call
699 .size invalidate_addr_r3, .-invalidate_addr_r3
701 .global invalidate_addr_r4
702 .type invalidate_addr_r4, %function
704 stmia fp, {r0, r1, r2, r3, r12, lr}
706 b invalidate_addr_call
707 .size invalidate_addr_r4, .-invalidate_addr_r4
709 .global invalidate_addr_r5
710 .type invalidate_addr_r5, %function
712 stmia fp, {r0, r1, r2, r3, r12, lr}
714 b invalidate_addr_call
715 .size invalidate_addr_r5, .-invalidate_addr_r5
717 .global invalidate_addr_r6
718 .type invalidate_addr_r6, %function
720 stmia fp, {r0, r1, r2, r3, r12, lr}
722 b invalidate_addr_call
723 .size invalidate_addr_r6, .-invalidate_addr_r6
725 .global invalidate_addr_r7
726 .type invalidate_addr_r7, %function
728 stmia fp, {r0, r1, r2, r3, r12, lr}
730 b invalidate_addr_call
731 .size invalidate_addr_r7, .-invalidate_addr_r7
733 .global invalidate_addr_r8
734 .type invalidate_addr_r8, %function
736 stmia fp, {r0, r1, r2, r3, r12, lr}
738 b invalidate_addr_call
739 .size invalidate_addr_r8, .-invalidate_addr_r8
741 .global invalidate_addr_r9
742 .type invalidate_addr_r9, %function
744 stmia fp, {r0, r1, r2, r3, r12, lr}
746 b invalidate_addr_call
747 .size invalidate_addr_r9, .-invalidate_addr_r9
749 .global invalidate_addr_r10
750 .type invalidate_addr_r10, %function
752 stmia fp, {r0, r1, r2, r3, r12, lr}
754 b invalidate_addr_call
755 .size invalidate_addr_r10, .-invalidate_addr_r10
757 .global invalidate_addr_r12
758 .type invalidate_addr_r12, %function
760 stmia fp, {r0, r1, r2, r3, r12, lr}
762 .size invalidate_addr_r12, .-invalidate_addr_r12
764 .global invalidate_addr_call
765 .type invalidate_addr_call, %function
766 invalidate_addr_call:
767 ldr r12, [fp, #inv_code_start-dynarec_local]
768 ldr lr, [fp, #inv_code_end-dynarec_local]
772 ldmia fp, {r0, r1, r2, r3, r12, pc}
773 .size invalidate_addr_call, .-invalidate_addr_call
776 .global new_dyna_start
777 .type new_dyna_start, %function
779 /* ip is stored to conform EABI alignment */
780 stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
781 load_var_adr fp, dynarec_local
782 ldr r0, [fp, #pcaddr-dynarec_local]
784 ldr r1, [fp, #next_interupt-dynarec_local]
785 ldr r10, [fp, #cycle-dynarec_local]
786 str r1, [fp, #last_count-dynarec_local]
789 .size new_dyna_start, .-new_dyna_start
791 /* --------------------------------------- */
794 .global jump_handler_read8
795 .global jump_handler_read16
796 .global jump_handler_read32
797 .global jump_handler_write8
798 .global jump_handler_write16
799 .global jump_handler_write32
800 .global jump_handler_write_h
801 .global jump_handle_swl
802 .global jump_handle_swr
803 .global rcnt0_read_count_m0
804 .global rcnt0_read_count_m1
805 .global rcnt1_read_count_m0
806 .global rcnt1_read_count_m1
807 .global rcnt2_read_count_m0
808 .global rcnt2_read_count_m1
811 .macro pcsx_read_mem readop tab_shift
812 /* r0 = address, r1 = handler_tab, r2 = cycles */
814 lsr r3, #(20+\tab_shift)
815 ldr r12, [fp, #last_count-dynarec_local]
816 ldr r1, [r1, r3, lsl #2]
823 \readop r0, [r1, r3, lsl #\tab_shift]
826 str r2, [fp, #cycle-dynarec_local]
831 add r1, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
832 pcsx_read_mem ldrccb, 0
835 add r1, #0x1000/4*4 @ shift to r16 part
836 pcsx_read_mem ldrcch, 1
839 pcsx_read_mem ldrcc, 2
842 .macro pcsx_write_mem wrtop tab_shift
843 /* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
845 lsr r12, #(20+\tab_shift)
846 ldr r3, [r3, r12, lsl #2]
847 str r0, [fp, #address-dynarec_local] @ some handlers still need it..
849 mov r0, r2 @ cycle return in case of direct store
854 \wrtop r1, [r3, r12, lsl #\tab_shift]
857 ldr r12, [fp, #last_count-dynarec_local]
861 str r2, [fp, #cycle-dynarec_local]
864 ldr r0, [fp, #next_interupt-dynarec_local]
866 str r0, [fp, #last_count-dynarec_local]
872 add r3, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
873 pcsx_write_mem strccb, 0
875 jump_handler_write16:
876 add r3, #0x1000/4*4 @ shift to r16 part
877 pcsx_write_mem strcch, 1
879 jump_handler_write32:
880 pcsx_write_mem strcc, 2
882 jump_handler_write_h:
883 /* r0 = address, r1 = data, r2 = cycles, r3 = handler */
884 ldr r12, [fp, #last_count-dynarec_local]
885 str r0, [fp, #address-dynarec_local] @ some handlers still need it..
889 str r2, [fp, #cycle-dynarec_local]
892 ldr r0, [fp, #next_interupt-dynarec_local]
894 str r0, [fp, #last_count-dynarec_local]
899 /* r0 = address, r1 = data, r2 = cycles */
900 ldr r3, [fp, #mem_wtab-dynarec_local]
902 ldr r3, [r3, r12, lsl #2]
923 lsreq r12, r1, #24 @ 0
934 /* r0 = address, r1 = data, r2 = cycles */
935 ldr r3, [fp, #mem_wtab-dynarec_local]
937 ldr r3, [r3, r12, lsl #2]
959 .macro rcntx_read_mode0 num
960 /* r0 = address, r2 = cycles */
961 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*\num] @ cycleStart
978 /* r0 = address, r2 = cycles */
979 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*0] @ cycleStart
982 mul r0, r1, r2 @ /= 5
987 /* r0 = address, r2 = cycles */
988 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*1]
991 umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
995 /* r0 = address, r2 = cycles */
996 ldr r3, [fp, #rcnts-dynarec_local+6*4+7*4*2]
997 mov r0, r2, lsl #16-3
998 sub r0, r3, lsl #16-3
1002 @ vim:filetype=armasm