1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2021 notaz *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "assem_arm64.h"
25 #include "linkage_offsets.h"
28 #define dynarec_local ESYM(dynarec_local)
29 #define ndrc_add_jump_out ESYM(ndrc_add_jump_out)
30 #define ndrc_get_addr_ht ESYM(ndrc_get_addr_ht)
31 #define gen_interupt ESYM(gen_interupt)
32 #define gteCheckStallRaw ESYM(gteCheckStallRaw)
33 #define psxException ESYM(psxException)
34 #define execI ESYM(execI)
38 #error misligned pointers
44 EOBJECT(dynarec_local)
45 ESIZE(dynarec_local, LO_dynarec_local_size)
47 .space LO_dynarec_local_size
49 #define DRC_VAR_(name, vname, size_) \
50 vname = dynarec_local + LO_##name ASM_SEPARATOR \
53 ESIZE(vname, LO_dynarec_local_size)
55 #define DRC_VAR(name, size_) \
56 DRC_VAR_(name, ESYM(name), size_)
58 DRC_VAR(next_interupt, 4)
59 DRC_VAR(cycle_count, 4)
60 DRC_VAR(last_count, 4)
61 DRC_VAR(pending_exception, 4)
63 DRC_VAR(branch_target, 4)
66 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
72 DRC_VAR(reg_cop0, 128)
73 DRC_VAR(reg_cop2d, 128)
74 DRC_VAR(reg_cop2c, 128)
78 #DRC_VAR(interrupt, 4)
79 #DRC_VAR(intCycle, 256)
82 DRC_VAR(inv_code_start, 4)
83 DRC_VAR(inv_code_end, 4)
88 DRC_VAR(zeromem_ptr, 8)
89 DRC_VAR(scratch_buf_ptr, 8)
90 DRC_VAR(ram_offset, 8)
97 FUNCTION(dyna_linker):
98 /* r0 = virtual target address */
99 /* r1 = instruction to patch */
102 ESIZE(dyna_linker, .-dyna_linker)
105 FUNCTION(cc_interrupt):
106 ldr w0, [rFP, #LO_last_count]
108 str wzr, [rFP, #LO_pending_exception]
109 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
112 add x0, rFP, #LO_reg_cop0 /* CP0 */
115 ldr rCC, [rFP, #LO_cycle]
116 ldr w0, [rFP, #LO_next_interupt]
117 ldr w1, [rFP, #LO_pending_exception]
118 ldr w2, [rFP, #LO_stop]
119 str w0, [rFP, #LO_last_count]
121 cbnz w2, new_dyna_leave
125 ldr w0, [rFP, #LO_pcaddr]
128 ESIZE(cc_interrupt, .-cc_interrupt)
131 FUNCTION(jump_addrerror_ds): /* R3000E_AdEL / R3000E_AdES in w0 */
132 str w1, [rFP, #(LO_psxRegs + (34+8)*4)] /* BadVaddr */
135 FUNCTION(jump_addrerror):
136 str w1, [rFP, #(LO_psxRegs + (34+8)*4)] /* BadVaddr */
139 FUNCTION(jump_overflow_ds):
140 mov w0, #(12<<2) /* R3000E_Ov */
143 FUNCTION(jump_overflow):
147 FUNCTION(jump_break_ds):
148 mov w0, #(9<<2) /* R3000E_Bp */
151 FUNCTION(jump_break):
155 FUNCTION(jump_syscall_ds):
156 mov w0, #(8<<2) /* R3000E_Syscall */
159 FUNCTION(jump_syscall):
164 ldr w3, [rFP, #LO_last_count]
165 str w2, [rFP, #LO_pcaddr]
167 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
168 add x2, rFP, #LO_reg_cop0 /* CP0 */
171 /* note: psxException might do recursive recompiler call from it's HLE code,
172 * so be ready for this */
173 FUNCTION(jump_to_new_pc):
174 ldr w2, [rFP, #LO_stop]
175 ldr w1, [rFP, #LO_next_interupt]
176 ldr rCC, [rFP, #LO_cycle]
177 ldr w0, [rFP, #LO_pcaddr]
179 str w1, [rFP, #LO_last_count]
180 cbnz w2, new_dyna_leave
183 ESIZE(jump_to_new_pc, .-jump_to_new_pc)
185 /* stack must be aligned by 16, and include space for save_regs() use */
187 FUNCTION(new_dyna_start):
188 stp x29, x30, [sp, #-SSP_ALL]!
189 ldr w1, [x0, #LO_next_interupt]
190 ldr w2, [x0, #LO_cycle]
191 stp x19, x20, [sp, #16*1]
192 stp x21, x22, [sp, #16*2]
193 stp x23, x24, [sp, #16*3]
194 stp x25, x26, [sp, #16*4]
195 stp x27, x28, [sp, #16*5]
197 ldr w0, [rFP, #LO_pcaddr]
198 str w1, [rFP, #LO_last_count]
202 ESIZE(new_dyna_start, .-new_dyna_start)
205 FUNCTION(new_dyna_leave):
206 ldr w0, [rFP, #LO_last_count]
208 str rCC, [rFP, #LO_cycle]
209 ldp x19, x20, [sp, #16*1]
210 ldp x21, x22, [sp, #16*2]
211 ldp x23, x24, [sp, #16*3]
212 ldp x25, x26, [sp, #16*4]
213 ldp x27, x28, [sp, #16*5]
214 ldp x29, x30, [sp], #SSP_ALL
216 ESIZE(new_dyna_leave, .-new_dyna_leave)
218 /* --------------------------------------- */
222 .macro memhandler_pre
223 /* w0 = addr/data, x1 = rhandler, w2 = cycles, x3 = whandler */
224 ldr w4, [rFP, #LO_last_count]
226 str w4, [rFP, #LO_cycle]
229 .macro memhandler_post
230 ldr w0, [rFP, #LO_next_interupt]
231 ldr w2, [rFP, #LO_cycle] // memhandlers can modify cc, like dma
232 str w0, [rFP, #LO_last_count]
236 FUNCTION(do_memhandler_pre):
240 FUNCTION(do_memhandler_post):
244 .macro pcsx_read_mem readop tab_shift
245 /* w0 = address, x1 = handler_tab, w2 = cycles */
246 ubfm w4, w0, #\tab_shift, #11
247 ldr x3, [x1, w4, uxtw #3]
250 \readop w0, [x3, w4, uxtw #\tab_shift]
253 stp xzr, x30, [sp, #-16]!
258 FUNCTION(jump_handler_read8):
259 add x1, x1, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
260 pcsx_read_mem ldrb, 0
263 FUNCTION(jump_handler_read16):
264 add x1, x1, #0x1000/4*8 /* shift to r16 part */
265 pcsx_read_mem ldrh, 1
268 FUNCTION(jump_handler_read32):
272 ldp xzr, x30, [sp], #16
275 .macro pcsx_write_mem wrtop movop tab_shift
276 /* w0 = address, w1 = data, w2 = cycles, x3 = handler_tab */
277 ubfm w4, w0, #\tab_shift, #11
278 ldr x3, [x3, w4, uxtw #3]
281 mov w0, w2 /* cycle return */
282 \wrtop w1, [x3, w4, uxtw #\tab_shift]
285 stp xzr, x30, [sp, #-16]!
286 str w0, [rFP, #LO_address] /* some handlers still need it... */
292 FUNCTION(jump_handler_write8):
293 add x3, x3, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
294 pcsx_write_mem strb, uxtb, 0
297 FUNCTION(jump_handler_write16):
298 add x3, x3, #0x1000/4*8 /* shift to r16 part */
299 pcsx_write_mem strh, uxth, 1
302 FUNCTION(jump_handler_write32):
303 pcsx_write_mem str, mov, 2
307 ldp xzr, x30, [sp], #16
310 FUNCTION(jump_handle_swl):
311 /* w0 = address, w1 = data, w2 = cycles */
312 ldr x3, [rFP, #LO_mem_wtab]
313 orr w4, wzr, w0, lsr #12
314 ldr x3, [x3, w4, uxtw #3]
316 bcs jump_handle_swx_interp
319 tbz x3, #1, 10f // & 2
320 tbz x3, #0, 2f // & 1
331 tbz x3, #0, 0f // & 1
341 FUNCTION(jump_handle_swr):
342 /* w0 = address, w1 = data, w2 = cycles */
343 ldr x3, [rFP, #LO_mem_wtab]
344 orr w4, wzr, w0, lsr #12
345 ldr x3, [x3, w4, uxtw #3]
347 bcs jump_handle_swx_interp
350 tbz x3, #1, 10f // & 2
351 tbz x3, #0, 2f // & 1
359 tbz x3, #0, 0f // & 1
369 jump_handle_swx_interp: /* almost never happens */
370 ldr w3, [rFP, #LO_last_count]
371 add x0, rFP, #LO_psxRegs
373 str w2, [rFP, #LO_cycle] /* PCSX cycles */
377 FUNCTION(call_gteStall):
378 /* w0 = op_cycles, w1 = cycles */
379 ldr w2, [rFP, #LO_last_count]
380 str lr, [rFP, #LO_saved_lr]
382 str w1, [rFP, #LO_cycle]
383 add x1, rFP, #LO_psxRegs
385 ldr lr, [rFP, #LO_saved_lr]
391 FUNCTION(do_insn_cmp_arm64):
392 stp x2, x3, [sp, #(SSP_CALLEE_REGS + 2*8)]
393 stp x4, x5, [sp, #(SSP_CALLEE_REGS + 4*8)]
394 stp x6, x7, [sp, #(SSP_CALLEE_REGS + 6*8)]
395 stp x8, x9, [sp, #(SSP_CALLEE_REGS + 8*8)]
396 stp x10, x11, [sp, #(SSP_CALLEE_REGS + 10*8)]
397 stp x12, x13, [sp, #(SSP_CALLEE_REGS + 12*8)]
398 stp x14, x15, [sp, #(SSP_CALLEE_REGS + 14*8)]
399 stp x16, x17, [sp, #(SSP_CALLEE_REGS + 16*8)]
400 stp x18, x30, [sp, #(SSP_CALLEE_REGS + 18*8)]
402 ldp x2, x3, [sp, #(SSP_CALLEE_REGS + 2*8)]
403 ldp x4, x5, [sp, #(SSP_CALLEE_REGS + 4*8)]
404 ldp x6, x7, [sp, #(SSP_CALLEE_REGS + 6*8)]
405 ldp x8, x9, [sp, #(SSP_CALLEE_REGS + 8*8)]
406 ldp x10, x11, [sp, #(SSP_CALLEE_REGS + 10*8)]
407 ldp x12, x13, [sp, #(SSP_CALLEE_REGS + 12*8)]
408 ldp x14, x15, [sp, #(SSP_CALLEE_REGS + 14*8)]
409 ldp x16, x17, [sp, #(SSP_CALLEE_REGS + 16*8)]
410 ldp x18, x30, [sp, #(SSP_CALLEE_REGS + 18*8)]