1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2021 notaz *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "assem_arm64.h"
25 #include "linkage_offsets.h"
28 #error misligned pointers
34 .type dynarec_local, %object
35 .size dynarec_local, LO_dynarec_local_size
37 .space LO_dynarec_local_size
39 #define DRC_VAR_(name, vname, size_) \
40 vname = dynarec_local + LO_##name; \
42 .type vname, %object; \
45 #define DRC_VAR(name, size_) \
46 DRC_VAR_(name, ESYM(name), size_)
48 DRC_VAR(next_interupt, 4)
49 DRC_VAR(cycle_count, 4)
50 DRC_VAR(last_count, 4)
51 DRC_VAR(pending_exception, 4)
53 DRC_VAR(branch_target, 4)
56 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
62 DRC_VAR(reg_cop0, 128)
63 DRC_VAR(reg_cop2d, 128)
64 DRC_VAR(reg_cop2c, 128)
68 #DRC_VAR(interrupt, 4)
69 #DRC_VAR(intCycle, 256)
72 DRC_VAR(inv_code_start, 4)
73 DRC_VAR(inv_code_end, 4)
78 DRC_VAR(zeromem_ptr, 8)
79 DRC_VAR(scratch_buf_ptr, 8)
80 DRC_VAR(ram_offset, 8)
87 FUNCTION(dyna_linker):
88 /* r0 = virtual target address */
89 /* r1 = instruction to patch */
92 .size dyna_linker, .-dyna_linker
95 FUNCTION(cc_interrupt):
96 ldr w0, [rFP, #LO_last_count]
98 str wzr, [rFP, #LO_pending_exception]
99 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
100 # str rCC, [rFP, #LO_reg_cop0+36] /* Count */
103 add x0, rFP, #(LO_psxRegs + 34*4) /* CP0 */
106 ldr rCC, [rFP, #LO_cycle]
107 ldr w0, [rFP, #LO_next_interupt]
108 ldr w1, [rFP, #LO_pending_exception]
109 ldr w2, [rFP, #LO_stop]
110 str w0, [rFP, #LO_last_count]
112 cbnz w2, new_dyna_leave
116 ldr w0, [rFP, #LO_pcaddr]
119 .size cc_interrupt, .-cc_interrupt
122 FUNCTION(fp_exception):
125 ldr w1, [rFP, #LO_reg_cop0+48] /* Status */
127 str w0, [rFP, #LO_reg_cop0+56] /* EPC */
130 str w1, [rFP, #LO_reg_cop0+48] /* Status */
131 str w2, [rFP, #LO_reg_cop0+52] /* Cause */
135 .size fp_exception, .-fp_exception
137 FUNCTION(fp_exception_ds):
138 mov w2, #0x90000000 /* Set high bit if delay slot */
140 .size fp_exception_ds, .-fp_exception_ds
143 FUNCTION(jump_break_ds):
147 FUNCTION(jump_break):
151 FUNCTION(jump_syscall_ds):
155 FUNCTION(jump_syscall):
160 ldr w3, [rFP, #LO_last_count]
161 str w2, [rFP, #LO_pcaddr]
163 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
164 add x2, rFP, #(LO_psxRegs + 34*4) /* CP0 */
167 /* note: psxException might do recursive recompiler call from it's HLE code,
168 * so be ready for this */
169 FUNCTION(jump_to_new_pc):
170 ldr w1, [rFP, #LO_next_interupt]
171 ldr rCC, [rFP, #LO_cycle]
172 ldr w0, [rFP, #LO_pcaddr]
174 str w1, [rFP, #LO_last_count]
177 .size jump_to_new_pc, .-jump_to_new_pc
179 /* stack must be aligned by 16, and include space for save_regs() use */
181 FUNCTION(new_dyna_start):
182 stp x29, x30, [sp, #-SSP_ALL]!
183 ldr w1, [x0, #LO_next_interupt]
184 ldr w2, [x0, #LO_cycle]
185 stp x19, x20, [sp, #16*1]
186 stp x21, x22, [sp, #16*2]
187 stp x23, x24, [sp, #16*3]
188 stp x25, x26, [sp, #16*4]
189 stp x27, x28, [sp, #16*5]
191 ldr w0, [rFP, #LO_pcaddr]
192 str w1, [rFP, #LO_last_count]
196 .size new_dyna_start, .-new_dyna_start
199 FUNCTION(new_dyna_leave):
200 ldr w0, [rFP, #LO_last_count]
202 str rCC, [rFP, #LO_cycle]
203 ldp x19, x20, [sp, #16*1]
204 ldp x21, x22, [sp, #16*2]
205 ldp x23, x24, [sp, #16*3]
206 ldp x25, x26, [sp, #16*4]
207 ldp x27, x28, [sp, #16*5]
208 ldp x29, x30, [sp], #SSP_ALL
210 .size new_dyna_leave, .-new_dyna_leave
212 /* --------------------------------------- */
216 .macro memhandler_pre
217 /* w0 = adddr/data, x1 = rhandler, w2 = cycles, x3 = whandler */
218 ldr w4, [rFP, #LO_last_count]
220 str w4, [rFP, #LO_cycle]
223 .macro memhandler_post
224 ldr w0, [rFP, #LO_next_interupt]
225 ldr w2, [rFP, #LO_cycle] // memhandlers can modify cc, like dma
226 str w0, [rFP, #LO_last_count]
230 FUNCTION(do_memhandler_pre):
234 FUNCTION(do_memhandler_post):
238 .macro pcsx_read_mem readop tab_shift
239 /* w0 = address, x1 = handler_tab, w2 = cycles */
240 ubfm w4, w0, #\tab_shift, #11
241 ldr x3, [x1, w4, uxtw #3]
244 \readop w0, [x3, w4, uxtw #\tab_shift]
247 stp xzr, x30, [sp, #-16]!
252 FUNCTION(jump_handler_read8):
253 add x1, x1, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
254 pcsx_read_mem ldrb, 0
257 FUNCTION(jump_handler_read16):
258 add x1, x1, #0x1000/4*8 /* shift to r16 part */
259 pcsx_read_mem ldrh, 1
262 FUNCTION(jump_handler_read32):
266 ldp xzr, x30, [sp], #16
269 .macro pcsx_write_mem wrtop movop tab_shift
270 /* w0 = address, w1 = data, w2 = cycles, x3 = handler_tab */
271 ubfm w4, w0, #\tab_shift, #11
272 ldr x3, [x3, w4, uxtw #3]
275 mov w0, w2 /* cycle return */
276 \wrtop w1, [x3, w4, uxtw #\tab_shift]
279 stp xzr, x30, [sp, #-16]!
280 str w0, [rFP, #LO_address] /* some handlers still need it... */
286 FUNCTION(jump_handler_write8):
287 add x3, x3, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
288 pcsx_write_mem strb uxtb 0
291 FUNCTION(jump_handler_write16):
292 add x3, x3, #0x1000/4*8 /* shift to r16 part */
293 pcsx_write_mem strh uxth 1
296 FUNCTION(jump_handler_write32):
297 pcsx_write_mem str mov 2
301 ldp xzr, x30, [sp], #16
304 FUNCTION(jump_handle_swl):
305 /* w0 = address, w1 = data, w2 = cycles */
306 ldr x3, [rFP, #LO_mem_wtab]
307 orr w4, wzr, w0, lsr #12
308 ldr x3, [x3, w4, uxtw #3]
313 tbz x3, #1, 10f // & 2
314 tbz x3, #0, 2f // & 1
325 tbz x3, #0, 0f // & 1
339 FUNCTION(jump_handle_swr):
340 /* w0 = address, w1 = data, w2 = cycles */
341 ldr x3, [rFP, #LO_mem_wtab]
342 orr w4, wzr, w0, lsr #12
343 ldr x3, [x3, w4, uxtw #3]
348 tbz x3, #1, 10f // & 2
349 tbz x3, #0, 2f // & 1
357 tbz x3, #0, 0f // & 1
371 FUNCTION(call_gteStall):
372 /* w0 = op_cycles, w1 = cycles */
373 ldr w2, [rFP, #LO_last_count]
374 str lr, [rFP, #LO_saved_lr]
376 str w1, [rFP, #LO_cycle]
377 add x1, rFP, #LO_psxRegs
379 ldr lr, [rFP, #LO_saved_lr]