1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2021 notaz *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "assem_arm64.h"
25 #include "linkage_offsets.h"
28 #error misligned pointers
34 .type dynarec_local, %object
35 .size dynarec_local, LO_dynarec_local_size
37 .space LO_dynarec_local_size
39 #define DRC_VAR_(name, vname, size_) \
40 vname = dynarec_local + LO_##name; \
42 .type vname, %object; \
45 #define DRC_VAR(name, size_) \
46 DRC_VAR_(name, ESYM(name), size_)
48 DRC_VAR(next_interupt, 4)
49 DRC_VAR(cycle_count, 4)
50 DRC_VAR(last_count, 4)
51 DRC_VAR(pending_exception, 4)
53 DRC_VAR(branch_target, 4)
56 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
62 DRC_VAR(reg_cop0, 128)
63 DRC_VAR(reg_cop2d, 128)
64 DRC_VAR(reg_cop2c, 128)
68 #DRC_VAR(interrupt, 4)
69 #DRC_VAR(intCycle, 256)
72 DRC_VAR(inv_code_start, 4)
73 DRC_VAR(inv_code_end, 4)
78 DRC_VAR(zeromem_ptr, 8)
79 DRC_VAR(scratch_buf_ptr, 8)
80 DRC_VAR(ram_offset, 8)
87 FUNCTION(dyna_linker):
88 /* r0 = virtual target address */
89 /* r1 = instruction to patch */
92 .size dyna_linker, .-dyna_linker
95 FUNCTION(cc_interrupt):
96 ldr w0, [rFP, #LO_last_count]
98 str wzr, [rFP, #LO_pending_exception]
99 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
100 # str rCC, [rFP, #LO_reg_cop0+36] /* Count */
105 ldr rCC, [rFP, #LO_cycle]
106 ldr w0, [rFP, #LO_next_interupt]
107 ldr w1, [rFP, #LO_pending_exception]
108 ldr w2, [rFP, #LO_stop]
109 str w0, [rFP, #LO_last_count]
111 cbnz w2, new_dyna_leave
115 ldr w0, [rFP, #LO_pcaddr]
118 .size cc_interrupt, .-cc_interrupt
121 FUNCTION(fp_exception):
124 ldr w1, [rFP, #LO_reg_cop0+48] /* Status */
126 str w0, [rFP, #LO_reg_cop0+56] /* EPC */
129 str w1, [rFP, #LO_reg_cop0+48] /* Status */
130 str w2, [rFP, #LO_reg_cop0+52] /* Cause */
134 .size fp_exception, .-fp_exception
136 FUNCTION(fp_exception_ds):
137 mov w2, #0x90000000 /* Set high bit if delay slot */
139 .size fp_exception_ds, .-fp_exception_ds
142 FUNCTION(jump_break_ds):
146 FUNCTION(jump_break):
150 FUNCTION(jump_syscall_ds):
154 FUNCTION(jump_syscall):
159 ldr w3, [rFP, #LO_last_count]
160 str w2, [rFP, #LO_pcaddr]
162 str rCC, [rFP, #LO_cycle] /* PCSX cycles */
165 /* note: psxException might do recursive recompiler call from it's HLE code,
166 * so be ready for this */
167 FUNCTION(jump_to_new_pc):
168 ldr w1, [rFP, #LO_next_interupt]
169 ldr rCC, [rFP, #LO_cycle]
170 ldr w0, [rFP, #LO_pcaddr]
172 str w1, [rFP, #LO_last_count]
175 .size jump_to_new_pc, .-jump_to_new_pc
177 /* stack must be aligned by 16, and include space for save_regs() use */
179 FUNCTION(new_dyna_start):
180 stp x29, x30, [sp, #-SSP_ALL]!
181 ldr w1, [x0, #LO_next_interupt]
182 ldr w2, [x0, #LO_cycle]
183 stp x19, x20, [sp, #16*1]
184 stp x21, x22, [sp, #16*2]
185 stp x23, x24, [sp, #16*3]
186 stp x25, x26, [sp, #16*4]
187 stp x27, x28, [sp, #16*5]
189 ldr w0, [rFP, #LO_pcaddr]
190 str w1, [rFP, #LO_last_count]
194 .size new_dyna_start, .-new_dyna_start
197 FUNCTION(new_dyna_leave):
198 ldr w0, [rFP, #LO_last_count]
200 str rCC, [rFP, #LO_cycle]
201 ldp x19, x20, [sp, #16*1]
202 ldp x21, x22, [sp, #16*2]
203 ldp x23, x24, [sp, #16*3]
204 ldp x25, x26, [sp, #16*4]
205 ldp x27, x28, [sp, #16*5]
206 ldp x29, x30, [sp], #SSP_ALL
208 .size new_dyna_leave, .-new_dyna_leave
210 /* --------------------------------------- */
214 .macro memhandler_pre
215 /* w0 = adddr/data, x1 = rhandler, w2 = cycles, x3 = whandler */
216 ldr w4, [rFP, #LO_last_count]
218 str w4, [rFP, #LO_cycle]
221 .macro memhandler_post
222 ldr w0, [rFP, #LO_next_interupt]
223 ldr w2, [rFP, #LO_cycle] // memhandlers can modify cc, like dma
224 str w0, [rFP, #LO_last_count]
228 FUNCTION(do_memhandler_pre):
232 FUNCTION(do_memhandler_post):
236 .macro pcsx_read_mem readop tab_shift
237 /* w0 = address, x1 = handler_tab, w2 = cycles */
238 ubfm w4, w0, #\tab_shift, #11
239 ldr x3, [x1, w4, uxtw #3]
242 \readop w0, [x3, w4, uxtw #\tab_shift]
245 stp xzr, x30, [sp, #-16]!
250 FUNCTION(jump_handler_read8):
251 add x1, x1, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
252 pcsx_read_mem ldrb, 0
255 FUNCTION(jump_handler_read16):
256 add x1, x1, #0x1000/4*8 /* shift to r16 part */
257 pcsx_read_mem ldrh, 1
260 FUNCTION(jump_handler_read32):
264 ldp xzr, x30, [sp], #16
267 .macro pcsx_write_mem wrtop movop tab_shift
268 /* w0 = address, w1 = data, w2 = cycles, x3 = handler_tab */
269 ubfm w4, w0, #\tab_shift, #11
270 ldr x3, [x3, w4, uxtw #3]
273 mov w0, w2 /* cycle return */
274 \wrtop w1, [x3, w4, uxtw #\tab_shift]
277 stp xzr, x30, [sp, #-16]!
278 str w0, [rFP, #LO_address] /* some handlers still need it... */
284 FUNCTION(jump_handler_write8):
285 add x3, x3, #0x1000/4*8 + 0x1000/2*8 /* shift to r8 part */
286 pcsx_write_mem strb uxtb 0
289 FUNCTION(jump_handler_write16):
290 add x3, x3, #0x1000/4*8 /* shift to r16 part */
291 pcsx_write_mem strh uxth 1
294 FUNCTION(jump_handler_write32):
295 pcsx_write_mem str mov 2
299 ldp xzr, x30, [sp], #16
302 FUNCTION(jump_handle_swl):
303 /* w0 = address, w1 = data, w2 = cycles */
304 ldr x3, [rFP, #LO_mem_wtab]
305 orr w4, wzr, w0, lsr #12
306 ldr x3, [x3, w4, uxtw #3]
311 tbz x3, #1, 10f // & 2
312 tbz x3, #0, 2f // & 1
323 tbz x3, #0, 0f // & 1
337 FUNCTION(jump_handle_swr):
338 /* w0 = address, w1 = data, w2 = cycles */
339 ldr x3, [rFP, #LO_mem_wtab]
340 orr w4, wzr, w0, lsr #12
341 ldr x3, [x3, w4, uxtw #3]
346 tbz x3, #1, 10f // & 2
347 tbz x3, #0, 2f // & 1
355 tbz x3, #0, 0f // & 1
369 FUNCTION(call_gteStall):
370 /* w0 = op_cycles, w1 = cycles */
371 ldr w2, [rFP, #LO_last_count]
372 str lr, [rFP, #LO_saved_lr]
374 str w1, [rFP, #LO_cycle]
375 add x1, rFP, #LO_psxRegs
377 ldr lr, [rFP, #LO_saved_lr]