1 /***************************************************************************
2 * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
18 ***************************************************************************/
21 * PSX memory functions.
24 // TODO: Implement caches & cycle penalty.
27 #include "psxmem_map.h"
34 #ifdef USE_LIBRETRO_VFS
35 #include <streams/file_stream_transforms.h>
39 #define MAP_ANONYMOUS MAP_ANON
42 boolean writeok = TRUE;
47 void DebugCheckBP(u32 address, enum breakpoint_types type) {}
50 void *(*psxMapHook)(unsigned long addr, size_t size, int is_fixed,
52 void (*psxUnmapHook)(void *ptr, size_t size, enum psxMapTag tag);
54 void *psxMap(unsigned long addr, size_t size, int is_fixed,
58 #ifdef MAP_FIXED_NOREPLACE
59 int flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED_NOREPLACE;
61 int flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED;
64 int flags = MAP_PRIVATE | MAP_ANONYMOUS;
72 if (psxMapHook != NULL) {
73 ret = psxMapHook(addr, size, 0, tag);
78 /* avoid MAP_FIXED, it overrides existing mappings.. */
80 flags |= MAP_FIXED; */
83 ret = mmap(req, size, PROT_READ | PROT_WRITE, flags, -1, 0);
84 if (ret == MAP_FAILED)
88 if (addr != 0 && ret != (void *)addr) {
89 SysMessage("psxMap: warning: wanted to map @%08x, got %p\n",
93 psxUnmap(ret, size, tag);
97 if (((addr ^ (unsigned long)ret) & ~0xff000000l) && try_ < 2)
99 psxUnmap(ret, size, tag);
101 // try to use similarly aligned memory instead
102 // (recompiler needs this)
103 mask = try_ ? 0xffff : 0xffffff;
104 addr = ((unsigned long)ret + mask) & ~mask;
113 void psxUnmap(void *ptr, size_t size, enum psxMapTag tag)
115 if (psxUnmapHook != NULL) {
116 psxUnmapHook(ptr, size, tag);
124 s8 *psxM = NULL; // Kernel & User Memory (2 Meg)
125 s8 *psxP = NULL; // Parallel Port (64K)
126 s8 *psxR = NULL; // BIOS ROM (512K)
127 s8 *psxH = NULL; // Scratch Pad (1K) & Hardware Registers (8K)
129 u8 **psxMemWLUT = NULL;
130 u8 **psxMemRLUT = NULL;
132 /* Playstation Memory Map (from Playstation doc by Joshua Walker)
133 0x0000_0000-0x0000_ffff Kernel (64K)
134 0x0001_0000-0x001f_ffff User Memory (1.9 Meg)
136 0x1f00_0000-0x1f00_ffff Parallel Port (64K)
138 0x1f80_0000-0x1f80_03ff Scratch Pad (1024 bytes)
140 0x1f80_1000-0x1f80_2fff Hardware Registers (8K)
142 0x1fc0_0000-0x1fc7_ffff BIOS (512K)
144 0x8000_0000-0x801f_ffff Kernel and User Memory Mirror (2 Meg) Cached
145 0x9fc0_0000-0x9fc7_ffff BIOS Mirror (512K) Cached
147 0xa000_0000-0xa01f_ffff Kernel and User Memory Mirror (2 Meg) Uncached
148 0xbfc0_0000-0xbfc7_ffff BIOS Mirror (512K) Uncached
154 psxMemRLUT = (u8 **)malloc(0x10000 * sizeof(void *));
155 psxMemWLUT = (u8 **)malloc(0x10000 * sizeof(void *));
156 memset(psxMemRLUT, 0, 0x10000 * sizeof(void *));
157 memset(psxMemWLUT, 0, 0x10000 * sizeof(void *));
160 psxM = psxMap(0x30000000, 0x00210000, 1, MAP_TAG_RAM);
162 psxM = psxMap(0x70000000, 0x00210000, 1, MAP_TAG_RAM);
165 psxM = psxMap(0x80000000, 0x00210000, 1, MAP_TAG_RAM);
169 psxM = psxMap(0x77000000, 0x00210000, 0, MAP_TAG_RAM);
172 SysMessage(_("mapping main RAM failed"));
176 psxP = &psxM[0x200000];
178 psxH = psxMap(0x4f800000, 0x10000, 0, MAP_TAG_OTHER);
180 psxH = psxMap(0x8f800000, 0x10000, 0, MAP_TAG_OTHER);
182 psxR = psxMap(0x4fc00000, 0x80000, 0, MAP_TAG_OTHER);
184 psxR = psxMap(0x8fc00000, 0x80000, 0, MAP_TAG_OTHER);
186 psxH = psxMap(0x1f800000, 0x10000, 0, MAP_TAG_OTHER);
187 psxR = psxMap(0x1fc00000, 0x80000, 0, MAP_TAG_OTHER);
190 if (psxMemRLUT == NULL || psxMemWLUT == NULL ||
191 psxR == NULL || psxP == NULL || psxH == NULL) {
192 SysMessage(_("Error allocating memory!"));
198 for (i = 0; i < 0x80; i++) psxMemRLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16];
200 memcpy(psxMemRLUT + 0x8000, psxMemRLUT, 0x80 * sizeof(void *));
201 memcpy(psxMemRLUT + 0xa000, psxMemRLUT, 0x80 * sizeof(void *));
203 psxMemRLUT[0x1f00] = (u8 *)psxP;
204 psxMemRLUT[0x1f80] = (u8 *)psxH;
206 for (i = 0; i < 0x08; i++) psxMemRLUT[i + 0x1fc0] = (u8 *)&psxR[i << 16];
208 memcpy(psxMemRLUT + 0x9fc0, psxMemRLUT + 0x1fc0, 0x08 * sizeof(void *));
209 memcpy(psxMemRLUT + 0xbfc0, psxMemRLUT + 0x1fc0, 0x08 * sizeof(void *));
212 for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16];
214 memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
215 memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
217 psxMemWLUT[0x1f00] = (u8 *)psxP;
218 psxMemWLUT[0x1f80] = (u8 *)psxH;
227 memset(psxM, 0, 0x00200000);
228 memset(psxP, 0xff, 0x00010000);
232 if (strcmp(Config.Bios, "HLE") != 0) {
233 sprintf(bios, "%s/%s", Config.BiosDir, Config.Bios);
234 f = fopen(bios, "rb");
237 SysMessage(_("Could not open BIOS:\"%s\". Enabling HLE Bios!\n"), bios);
238 memset(psxR, 0, 0x80000);
240 if (fread(psxR, 1, 0x80000, f) == 0x80000) {
243 SysMessage(_("The selected BIOS:\"%s\" is of wrong size. Enabling HLE Bios!\n"), bios);
250 void psxMemShutdown() {
251 psxUnmap(psxM, 0x00210000, MAP_TAG_RAM); psxM = NULL;
252 psxUnmap(psxH, 0x10000, MAP_TAG_OTHER); psxH = NULL;
253 psxUnmap(psxR, 0x80000, MAP_TAG_OTHER); psxR = NULL;
255 free(psxMemRLUT); psxMemRLUT = NULL;
256 free(psxMemWLUT); psxMemWLUT = NULL;
259 u8 psxMemRead8(u32 mem) {
264 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
265 if ((mem & 0xffff) < 0x400)
268 return psxHwRead8(mem);
270 p = (char *)(psxMemRLUT[t]);
273 DebugCheckBP((mem & 0xffffff) | 0x80000000, R1);
274 return *(u8 *)(p + (mem & 0xffff));
277 PSXMEM_LOG("err lb %8.8lx\n", mem);
284 u16 psxMemRead16(u32 mem) {
289 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
290 if ((mem & 0xffff) < 0x400)
293 return psxHwRead16(mem);
295 p = (char *)(psxMemRLUT[t]);
298 DebugCheckBP((mem & 0xffffff) | 0x80000000, R2);
299 return SWAPu16(*(u16 *)(p + (mem & 0xffff)));
302 PSXMEM_LOG("err lh %8.8lx\n", mem);
309 u32 psxMemRead32(u32 mem) {
314 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
315 if ((mem & 0xffff) < 0x400)
318 return psxHwRead32(mem);
320 p = (char *)(psxMemRLUT[t]);
323 DebugCheckBP((mem & 0xffffff) | 0x80000000, R4);
324 return SWAPu32(*(u32 *)(p + (mem & 0xffff)));
327 if (writeok) { PSXMEM_LOG("err lw %8.8lx\n", mem); }
334 void psxMemWrite8(u32 mem, u8 value) {
339 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
340 if ((mem & 0xffff) < 0x400)
343 psxHwWrite8(mem, value);
345 p = (char *)(psxMemWLUT[t]);
348 DebugCheckBP((mem & 0xffffff) | 0x80000000, W1);
349 *(u8 *)(p + (mem & 0xffff)) = value;
351 psxCpu->Clear((mem & (~3)), 1);
355 PSXMEM_LOG("err sb %8.8lx\n", mem);
361 void psxMemWrite16(u32 mem, u16 value) {
366 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
367 if ((mem & 0xffff) < 0x400)
368 psxHu16ref(mem) = SWAPu16(value);
370 psxHwWrite16(mem, value);
372 p = (char *)(psxMemWLUT[t]);
375 DebugCheckBP((mem & 0xffffff) | 0x80000000, W2);
376 *(u16 *)(p + (mem & 0xffff)) = SWAPu16(value);
378 psxCpu->Clear((mem & (~3)), 1);
382 PSXMEM_LOG("err sh %8.8lx\n", mem);
388 void psxMemWrite32(u32 mem, u32 value) {
390 #if defined(ICACHE_EMULATION)
391 /* Stores in PS1 code during cache isolation invalidate cachelines.
392 * It is assumed that cache-flush routines write to the lowest 4KB of
393 * address space for Icache, or 1KB for Dcache/scratchpad.
394 * Originally, stores had to check 'writeok' in psxRegs struct before
395 * writing to RAM. To eliminate this necessity, we could simply patch the
396 * BIOS 0x44 FlushCache() A0 jumptable entry. Unfortunately, this won't
397 * work for some games that use less-buggy non-BIOS cache-flush routines
398 * like '007 Tomorrow Never Dies', often provided by SN-systems, the PS1
399 * toolchain provider.
400 * Instead, we backup the lowest 64KB PS1 RAM when the cache is isolated.
401 * All stores write to RAM regardless of cache state. Thus, cache-flush
402 * routines temporarily trash the lowest 4KB of PS1 RAM. Fortunately, they
403 * ran in a 'critical section' with interrupts disabled, so there's little
404 * worry of PS1 code ever reading the trashed contents.
405 * We point the relevant portions of psxMemRLUT[] to the 64KB backup while
406 * cache is isolated. This is in case the dynarec needs to recompile some
407 * code during isolation. As long as it reads code using psxMemRLUT[] ptrs,
408 * it should never see trashed RAM contents.
410 * -senquack, mips dynarec team, 2017
412 static u32 mem_bak[0x10000/4];
415 u32 m = mem & 0xffff;
416 // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
418 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
420 psxHu32ref(mem) = SWAPu32(value);
422 psxHwWrite32(mem, value);
424 p = (char *)(psxMemWLUT[t]);
427 DebugCheckBP((mem & 0xffffff) | 0x80000000, W4);
428 *(u32 *)(p + (mem & 0xffff)) = SWAPu32(value);
430 psxCpu->Clear(mem, 1);
433 if (mem != 0xfffe0130) {
436 psxCpu->Clear(mem, 1);
440 if (writeok) { PSXMEM_LOG("err sw %8.8lx\n", mem); }
446 case 0x800: case 0x804:
447 if (writeok == FALSE) break;
449 memset(psxMemWLUT + 0x0000, 0, 0x80 * sizeof(void *));
450 memset(psxMemWLUT + 0x8000, 0, 0x80 * sizeof(void *));
451 memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(void *));
452 #ifdef ICACHE_EMULATION
453 /* Cache is now isolated, pending cache-flush sequence:
454 * Backup lower 64KB of PS1 RAM, adjust psxMemRLUT[].
456 memcpy((void*)mem_bak, (void*)psxM, sizeof(mem_bak));
457 psxMemRLUT[0x0000] = psxMemRLUT[0x0020] = psxMemRLUT[0x0040] = psxMemRLUT[0x0060] = (u8 *)mem_bak;
458 psxMemRLUT[0x8000] = psxMemRLUT[0x8020] = psxMemRLUT[0x8040] = psxMemRLUT[0x8060] = (u8 *)mem_bak;
459 psxMemRLUT[0xa000] = psxMemRLUT[0xa020] = psxMemRLUT[0xa040] = psxMemRLUT[0xa060] = (u8 *)mem_bak;
460 psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_ISOLATED, NULL);
463 case 0x00: case 0x1e988:
464 if (writeok == TRUE) break;
466 for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16];
467 memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
468 memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
469 #ifdef ICACHE_EMULATION
470 /* Cache is now unisolated:
471 * Restore lower 64KB RAM contents and psxMemRLUT[].
473 memcpy((void*)psxM, (void*)mem_bak, sizeof(mem_bak));
474 psxMemRLUT[0x0000] = psxMemRLUT[0x0020] = psxMemRLUT[0x0040] = psxMemRLUT[0x0060] = (u8 *)psxM;
475 psxMemRLUT[0x8000] = psxMemRLUT[0x8020] = psxMemRLUT[0x8040] = psxMemRLUT[0x8060] = (u8 *)psxM;
476 psxMemRLUT[0xa000] = psxMemRLUT[0xa020] = psxMemRLUT[0xa040] = psxMemRLUT[0xa060] = (u8 *)psxM;
477 /* Dynarecs might take this opportunity to flush their code cache */
478 psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
483 PSXMEM_LOG("unk %8.8lx = %x\n", mem, value);
492 void *psxMemPointer(u32 mem) {
497 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
498 if ((mem & 0xffff) < 0x400)
499 return (void *)&psxH[mem];
503 p = (char *)(psxMemWLUT[t]);
505 return (void *)(p + (mem & 0xffff));