libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28
  29 R3000Acpu *psxCpu = NULL;
  30
  31 int psxInit() {
  32         SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__);
  33
  34 #if defined(NEW_DYNAREC) || defined(LIGHTREC)
  35         if (Config.Cpu == CPU_INTERPRETER) {
  36                 psxCpu = &psxInt;
  37         } else psxCpu = &psxRec;
  38 #else
  39         psxCpu = &psxInt;
  40 #endif
  41
  42         Log = 0;
  43
  44         if (psxMemInit() == -1) return -1;
  45
  46         return psxCpu->Init();
  47 }
  48
  49 void psxReset() {
  50         psxMemReset();
  51
  52         memset(&psxRegs, 0x00, sizeof(psxRegs));
  53
  54         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  55
  56         psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
  57         psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
  58
  59         psxCpu->Reset();
  60
  61         psxHwReset();
  62         psxBiosInit();
  63
  64         if (!Config.HLE)
  65                 psxExecuteBios();
  66
  67 #ifdef EMU_LOG
  68         EMU_LOG("*BIOS END*\n");
  69 #endif
  70         Log = 0;
  71 }
  72
  73 void psxShutdown() {
  74         psxMemShutdown();
  75         psxBiosShutdown();
  76
  77         psxCpu->Shutdown();
  78 }
  79
  80 void psxException(u32 code, u32 bd) {
  81         if (!Config.HLE && ((((psxRegs.code = PSXMu32(psxRegs.pc)) >> 24) & 0xfe) == 0x4a)) {
  82                 // "hokuto no ken" / "Crash Bandicot 2" ...
  83                 // BIOS does not allow to return to GTE instructions
  84                 // (just skips it, supposedly because it's scheduled already)
  85                 // so we execute it here
  86                 extern void (*psxCP2[64])(void *cp2regs);
  87                 psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2D);
  88         }
  89
  90         // Set the Cause
  91         psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;
  92
  93         // Set the EPC & PC
  94         if (bd) {
  95 #ifdef PSXCPU_LOG
  96                 PSXCPU_LOG("bd set!!!\n");
  97 #endif
  98                 SysPrintf("bd set!!!\n");
  99                 psxRegs.CP0.n.Cause |= 0x80000000;
 100                 psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
 101         } else
 102                 psxRegs.CP0.n.EPC = (psxRegs.pc);
 103
 104         if (psxRegs.CP0.n.Status & 0x400000)
 105                 psxRegs.pc = 0xbfc00180;
 106         else
 107                 psxRegs.pc = 0x80000080;
 108
 109         // Set the Status
 110         psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
 111                                                   ((psxRegs.CP0.n.Status & 0xf) << 2);
 112
 113         if (Config.HLE) psxBiosException();
 114 }
 115
 116 void psxBranchTest() {
 117         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 118                 psxRcntUpdate();
 119
 120         if (psxRegs.interrupt) {
 121                 if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
 122                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
 123                                 psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 124                                 sioInterrupt();
 125                         }
 126                 }
 127                 if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
 128                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
 129                                 psxRegs.interrupt &= ~(1 << PSXINT_CDR);
 130                                 cdrInterrupt();
 131                         }
 132                 }
 133                 if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
 134                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
 135                                 psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
 136                                 cdrReadInterrupt();
 137                         }
 138                 }
 139                 if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
 140                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
 141                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
 142                                 gpuInterrupt();
 143                         }
 144                 }
 145                 if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
 146                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
 147                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
 148                                 mdec1Interrupt();
 149                         }
 150                 }
 151                 if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
 152                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
 153                                 psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
 154                                 spuInterrupt();
 155                         }
 156                 }
 157                 if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
 158                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
 159                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
 160                                 mdec0Interrupt();
 161                         }
 162                 }
 163                 if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
 164                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
 165                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
 166                                 gpuotcInterrupt();
 167                         }
 168                 }
 169                 if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
 170                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
 171                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
 172                                 cdrDmaInterrupt();
 173                         }
 174                 }
 175                 if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
 176                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
 177                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
 178                                 cdrPlayInterrupt();
 179                         }
 180                 }
 181                 if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
 182                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
 183                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
 184                                 cdrLidSeekInterrupt();
 185                         }
 186                 }
 187                 if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
 188                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
 189                                 psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
 190                                 spuUpdate();
 191                         }
 192                 }
 193         }
 194
 195         if (psxHu32(0x1070) & psxHu32(0x1074)) {
 196                 if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
 197 #ifdef PSXCPU_LOG
 198                         PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
 199 #endif
 200 //                      SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
 201                         psxException(0x400, 0);
 202                 }
 203         }
 204 }
 205
 206 void psxJumpTest() {
 207         if (!Config.HLE && Config.PsxOut) {
 208                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 209                 switch (psxRegs.pc & 0x1fffff) {
 210                         case 0xa0:
 211 #ifdef PSXBIOS_LOG
 212                                 if (call != 0x28 && call != 0xe) {
 213                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 214 #endif
 215                                 if (biosA0[call])
 216                                         biosA0[call]();
 217                                 break;
 218                         case 0xb0:
 219 #ifdef PSXBIOS_LOG
 220                                 if (call != 0x17 && call != 0xb) {
 221                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 222 #endif
 223                                 if (biosB0[call])
 224                                         biosB0[call]();
 225                                 break;
 226                         case 0xc0:
 227 #ifdef PSXBIOS_LOG
 228                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 229 #endif
 230                                 if (biosC0[call])
 231                                         biosC0[call]();
 232                                 break;
 233                 }
 234         }
 235 }
 236
 237 void psxExecuteBios() {
 238         while (psxRegs.pc != 0x80030000)
 239                 psxCpu->ExecuteBlock();
 240 }
 241