11 #include "../psxdma.h"
13 #include "../psxmem.h"
14 #include "../r3000a.h"
15 #include "../new_dynarec/events.h"
17 #include "../frontend/main.h"
22 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
23 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
26 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
28 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
29 # define LE32TOH(x) __builtin_bswap32(x)
30 # define HTOLE32(x) __builtin_bswap32(x)
31 # define LE16TOH(x) __builtin_bswap16(x)
32 # define HTOLE16(x) __builtin_bswap16(x)
34 # define LE32TOH(x) (x)
35 # define HTOLE32(x) (x)
36 # define LE16TOH(x) (x)
37 # define HTOLE16(x) (x)
41 # define likely(x) __builtin_expect(!!(x),1)
42 # define unlikely(x) __builtin_expect(!!(x),0)
44 # define likely(x) (x)
45 # define unlikely(x) (x)
51 static struct lightrec_state *lightrec_state;
53 static char *name = "retroarch.exe";
55 static bool use_lightrec_interpreter;
56 static bool use_pcsx_interpreter;
57 static bool block_stepping;
84 static void (*cp2_ops[])(struct psxCP2Regs *) = {
85 [OP_CP2_RTPS] = gteRTPS,
86 [OP_CP2_RTPS] = gteRTPS,
87 [OP_CP2_NCLIP] = gteNCLIP,
89 [OP_CP2_DPCS] = gteDPCS,
90 [OP_CP2_INTPL] = gteINTPL,
91 [OP_CP2_MVMVA] = gteMVMVA,
92 [OP_CP2_NCDS] = gteNCDS,
93 [OP_CP2_CDP] = gteCDP,
94 [OP_CP2_NCDT] = gteNCDT,
95 [OP_CP2_NCCS] = gteNCCS,
97 [OP_CP2_NCS] = gteNCS,
98 [OP_CP2_NCT] = gteNCT,
99 [OP_CP2_SQR] = gteSQR,
100 [OP_CP2_DCPL] = gteDCPL,
101 [OP_CP2_DPCT] = gteDPCT,
102 [OP_CP2_AVSZ3] = gteAVSZ3,
103 [OP_CP2_AVSZ4] = gteAVSZ4,
104 [OP_CP2_RTPT] = gteRTPT,
105 [OP_CP2_GPF] = gteGPF,
106 [OP_CP2_GPL] = gteGPL,
107 [OP_CP2_NCCT] = gteNCCT,
110 static char cache_buf[64 * 1024];
112 static void cop2_op(struct lightrec_state *state, u32 func)
114 struct lightrec_registers *regs = lightrec_get_registers(state);
118 if (unlikely(!cp2_ops[func & 0x3f])) {
119 fprintf(stderr, "Invalid CP2 function %u\n", func);
121 /* This works because regs->cp2c comes right after regs->cp2d,
122 * so it can be cast to a pcsxCP2Regs pointer. */
123 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
127 static bool has_interrupt(void)
129 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
131 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
132 (regs->cp0[12] & 0x401) == 0x401) ||
133 (regs->cp0[12] & regs->cp0[13] & 0x0300);
136 static void lightrec_restore_state(struct lightrec_state *state)
138 lightrec_reset_cycle_count(state, psxRegs.cycle);
140 if (block_stepping || has_interrupt())
141 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
143 lightrec_set_target_cycle_count(state, next_interupt);
146 static void hw_write_byte(struct lightrec_state *state,
147 u32 op, void *host, u32 mem, u8 val)
149 psxRegs.cycle = lightrec_current_cycle_count(state);
151 psxHwWrite8(mem, val);
153 lightrec_restore_state(state);
156 static void hw_write_half(struct lightrec_state *state,
157 u32 op, void *host, u32 mem, u16 val)
159 psxRegs.cycle = lightrec_current_cycle_count(state);
161 psxHwWrite16(mem, val);
163 lightrec_restore_state(state);
166 static void hw_write_word(struct lightrec_state *state,
167 u32 op, void *host, u32 mem, u32 val)
169 psxRegs.cycle = lightrec_current_cycle_count(state);
171 psxHwWrite32(mem, val);
173 lightrec_restore_state(state);
176 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
180 psxRegs.cycle = lightrec_current_cycle_count(state);
182 val = psxHwRead8(mem);
184 lightrec_restore_state(state);
189 static u16 hw_read_half(struct lightrec_state *state,
190 u32 op, void *host, u32 mem)
194 psxRegs.cycle = lightrec_current_cycle_count(state);
196 val = psxHwRead16(mem);
198 lightrec_restore_state(state);
203 static u32 hw_read_word(struct lightrec_state *state,
204 u32 op, void *host, u32 mem)
208 psxRegs.cycle = lightrec_current_cycle_count(state);
210 val = psxHwRead32(mem);
212 lightrec_restore_state(state);
217 static struct lightrec_mem_map_ops hw_regs_ops = {
226 static u32 cache_ctrl;
228 static void cache_ctrl_write_word(struct lightrec_state *state,
229 u32 op, void *host, u32 mem, u32 val)
234 static u32 cache_ctrl_read_word(struct lightrec_state *state,
235 u32 op, void *host, u32 mem)
240 static struct lightrec_mem_map_ops cache_ctrl_ops = {
241 .sw = cache_ctrl_write_word,
242 .lw = cache_ctrl_read_word,
245 static struct lightrec_mem_map lightrec_map[] = {
246 [PSX_MAP_KERNEL_USER_RAM] = {
247 /* Kernel and user memory */
256 [PSX_MAP_SCRATCH_PAD] = {
261 [PSX_MAP_PARALLEL_PORT] = {
266 [PSX_MAP_HW_REGISTERS] = {
267 /* Hardware registers */
272 [PSX_MAP_CACHE_CONTROL] = {
276 .ops = &cache_ctrl_ops,
279 /* Mirrors of the kernel/user memory */
280 [PSX_MAP_MIRROR1] = {
283 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
285 [PSX_MAP_MIRROR2] = {
288 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
290 [PSX_MAP_MIRROR3] = {
293 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
295 [PSX_MAP_CODE_BUFFER] = {
296 .length = CODE_BUFFER_SIZE,
300 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
303 memcpy(psxM, cache_buf, sizeof(cache_buf));
305 memcpy(cache_buf, psxM, sizeof(cache_buf));
308 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
348 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
379 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
384 static const struct lightrec_ops lightrec_ops = {
386 .enable_ram = lightrec_enable_ram,
387 .hw_direct = lightrec_can_hw_direct,
390 static int lightrec_plugin_init(void)
392 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
393 lightrec_map[PSX_MAP_BIOS].address = psxR;
394 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
395 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
396 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
398 if (LIGHTREC_CUSTOM_MAP) {
399 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
400 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
401 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
402 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
405 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
407 lightrec_state = lightrec_init(name,
408 lightrec_map, ARRAY_SIZE(lightrec_map),
411 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
415 // (uintptr_t) psxH);
418 signal(SIGPIPE, exit);
423 extern void intExecuteBlock();
425 static void lightrec_plugin_execute_internal(bool block_only)
427 struct lightrec_registers *regs;
430 regs = lightrec_get_registers(lightrec_state);
431 gen_interupt((psxCP0Regs *)regs->cp0);
433 // step during early boot so that 0x80030000 fastboot hack works
434 block_stepping = block_only;
436 next_interupt = psxRegs.cycle;
438 if (use_pcsx_interpreter) {
441 lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
443 if (unlikely(use_lightrec_interpreter)) {
444 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
448 psxRegs.pc = lightrec_execute(lightrec_state,
449 psxRegs.pc, next_interupt);
452 psxRegs.cycle = lightrec_current_cycle_count(lightrec_state);
454 flags = lightrec_exit_flags(lightrec_state);
456 if (flags & LIGHTREC_EXIT_SEGFAULT) {
457 fprintf(stderr, "Exiting at cycle 0x%08x\n",
462 if (flags & LIGHTREC_EXIT_SYSCALL)
463 psxException(0x20, 0, (psxCP0Regs *)regs->cp0);
466 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
467 /* Handle software interrupts */
468 regs->cp0[13] &= ~0x7c;
469 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
473 static void lightrec_plugin_execute(void)
478 lightrec_plugin_execute_internal(false);
481 static void lightrec_plugin_execute_block(void)
483 lightrec_plugin_execute_internal(true);
486 static void lightrec_plugin_clear(u32 addr, u32 size)
488 if (addr == 0 && size == UINT32_MAX)
489 lightrec_invalidate_all(lightrec_state);
491 /* size * 4: PCSX uses DMA units */
492 lightrec_invalidate(lightrec_state, addr, size * 4);
495 static void lightrec_plugin_sync_regs_to_pcsx(void);
496 static void lightrec_plugin_sync_regs_from_pcsx(void);
498 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
502 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
503 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
504 /* not used, lightrec calls lightrec_enable_ram() instead */
506 case R3000ACPU_NOTIFY_BEFORE_SAVE:
507 lightrec_plugin_sync_regs_to_pcsx();
509 case R3000ACPU_NOTIFY_AFTER_LOAD:
510 lightrec_plugin_sync_regs_from_pcsx();
515 static void lightrec_plugin_apply_config()
519 static void lightrec_plugin_shutdown(void)
521 lightrec_destroy(lightrec_state);
524 static void lightrec_plugin_reset(void)
526 struct lightrec_registers *regs;
528 regs = lightrec_get_registers(lightrec_state);
530 /* Invalidate all blocks */
531 lightrec_invalidate_all(lightrec_state);
533 /* Reset registers */
534 memset(regs, 0, sizeof(*regs));
536 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
537 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
540 static void lightrec_plugin_sync_regs_from_pcsx(void)
542 struct lightrec_registers *regs;
544 regs = lightrec_get_registers(lightrec_state);
545 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
546 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
547 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
549 lightrec_invalidate_all(lightrec_state);
552 static void lightrec_plugin_sync_regs_to_pcsx(void)
554 struct lightrec_registers *regs;
556 regs = lightrec_get_registers(lightrec_state);
557 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
558 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
559 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
564 lightrec_plugin_init,
565 lightrec_plugin_reset,
566 lightrec_plugin_execute,
567 lightrec_plugin_execute_block,
568 lightrec_plugin_clear,
569 lightrec_plugin_notify,
570 lightrec_plugin_apply_config,
571 lightrec_plugin_shutdown,