1 #include "../pico_int.h"
2 #include "../sound/ym2612.h"
4 struct Pico32x Pico32x;
7 static void sh2_irq_cb(int id, int level)
10 elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
13 void p32x_update_irls(void)
15 int irqs, mlvl = 0, slvl = 0;
18 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
24 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
29 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
30 sh2_irl_irq(&msh2, mlvl);
31 sh2_irl_irq(&ssh2, slvl);
34 p32x_poll_event(mlvl | (slvl << 1), 0);
37 void Pico32xStartup(void)
39 elprintf(EL_STATUS|EL_32X, "32X startup");
44 msh2.irq_callback = sh2_irq_cb;
46 ssh2.irq_callback = sh2_irq_cb;
51 Pico32x.vdp_regs[0] |= P32XV_nPAL;
53 PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
54 PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
59 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
60 void p32x_reset_sh2s(void)
62 elprintf(EL_32X, "sh2 reset");
67 // if we don't have BIOS set, perform it's work here.
69 if (p32x_bios_m == NULL) {
70 unsigned int idl_src, idl_dst, idl_size; // initial data load
74 idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
75 idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
76 idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
77 if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
78 idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
79 elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
80 idl_src, idl_dst, idl_size);
83 memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
86 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
87 sh2_set_gbr(0, 0x20004000);
91 Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
92 // program will set M_OK
96 if (p32x_bios_s == NULL) {
100 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
101 sh2_set_gbr(1, 0x20004000);
103 // program will set S_OK
107 void Pico32xInit(void)
111 void PicoPower32x(void)
113 memset(&Pico32x, 0, sizeof(Pico32x));
115 Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
116 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
117 Pico32x.sh2_regs[0] = P32XS2_ADEN;
120 void PicoUnload32x(void)
122 if (Pico32xMem != NULL)
128 PicoAHW &= ~PAHW_32X;
131 void PicoReset32x(void)
133 if (PicoAHW & PAHW_32X) {
134 Pico32x.sh2irqs |= P32XI_VRES;
136 p32x_poll_event(3, 0);
140 static void p32x_start_blank(void)
143 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
145 // FB swap waits until vblank
146 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
147 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
148 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
149 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
152 Pico32x.sh2irqs |= P32XI_VINT;
154 p32x_poll_event(3, 1);
157 static __inline void run_m68k(int cyc)
159 #if defined(EMU_C68K)
160 PicoCpuCM68k.cycles = cyc;
161 CycloneRun(&PicoCpuCM68k);
162 SekCycleCnt += cyc - PicoCpuCM68k.cycles;
163 #elif defined(EMU_M68K)
164 SekCycleCnt += m68k_execute(cyc);
165 #elif defined(EMU_F68K)
166 SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
170 // ~1463.8, but due to cache misses and slow mem
171 // it's much lower than that
172 //#define SH2_LINE_CYCLES 735
173 #define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
176 #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
179 SekCycleAim += m68k_cycles; \
180 while (SekCycleCnt < SekCycleAim) { \
181 slice = SekCycleCnt; \
182 run_m68k(SekCycleAim - SekCycleCnt); \
183 if (!(Pico32x.regs[0] & P32XS_nRES)) \
184 continue; /* SH2s reseting */ \
185 slice = SekCycleCnt - slice; /* real count from 68k */ \
186 if (SekCycleCnt < SekCycleAim) \
187 elprintf(EL_32X, "slice %d", slice); \
188 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
189 sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
190 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
191 sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
196 #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
199 for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
200 run_m68k(STEP_68K); \
201 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
202 sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
203 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
204 sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
207 i = (m68k_cycles) - i; \
209 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
210 sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
211 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
212 sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
215 #define CPUS_RUN CPUS_RUN_SIMPLE
216 //#define CPUS_RUN CPUS_RUN_LOCKSTEP
218 #include "../pico_cmn.c"
220 void PicoFrame32x(void)
222 pwm_frame_smp_cnt = 0;
224 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
225 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
226 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
228 p32x_poll_event(3, 1);
232 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);