1 #include "../pico_int.h"
2 #include "../sound/ym2612.h"
4 struct Pico32x Pico32x;
7 static void sh2_irq_cb(int id, int level)
10 elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
13 void p32x_update_irls(void)
15 int irqs, mlvl = 0, slvl = 0;
18 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
24 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
29 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
30 sh2_irl_irq(&msh2, mlvl);
31 sh2_irl_irq(&ssh2, slvl);
34 p32x_poll_event(mlvl | (slvl << 1), 0);
37 void Pico32xStartup(void)
39 elprintf(EL_STATUS|EL_32X, "32X startup");
43 msh2.irq_callback = sh2_irq_cb;
45 ssh2.irq_callback = sh2_irq_cb;
50 Pico32x.vdp_regs[0] |= P32XV_nPAL;
52 PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
53 PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
58 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
59 void p32x_reset_sh2s(void)
61 elprintf(EL_32X, "sh2 reset");
66 // if we don't have BIOS set, perform it's work here.
68 if (p32x_bios_m == NULL) {
69 unsigned int idl_src, idl_dst, idl_size; // initial data load
73 idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
74 idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
75 idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
76 if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
77 idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
78 elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
79 idl_src, idl_dst, idl_size);
82 memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
85 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
86 sh2_set_gbr(0, 0x20004000);
90 Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
91 // program will set M_OK
95 if (p32x_bios_s == NULL) {
99 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
100 sh2_set_gbr(1, 0x20004000);
102 // program will set S_OK
106 void Pico32xInit(void)
110 void PicoPower32x(void)
112 memset(&Pico32x, 0, sizeof(Pico32x));
114 Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
115 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
116 Pico32x.sh2_regs[0] = P32XS2_ADEN;
119 void PicoUnload32x(void)
121 if (Pico32xMem != NULL)
125 PicoAHW &= ~PAHW_32X;
128 void PicoReset32x(void)
130 if (PicoAHW & PAHW_32X) {
131 Pico32x.sh2irqs |= P32XI_VRES;
133 p32x_poll_event(3, 0);
137 static void p32x_start_blank(void)
140 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
142 // FB swap waits until vblank
143 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
144 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
145 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
146 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
149 Pico32x.sh2irqs |= P32XI_VINT;
151 p32x_poll_event(3, 1);
154 static __inline void run_m68k(int cyc)
156 #if defined(EMU_C68K)
157 PicoCpuCM68k.cycles = cyc;
158 CycloneRun(&PicoCpuCM68k);
159 SekCycleCnt += cyc - PicoCpuCM68k.cycles;
160 #elif defined(EMU_M68K)
161 SekCycleCnt += m68k_execute(cyc);
162 #elif defined(EMU_F68K)
163 SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
167 // ~1463.8, but due to cache misses and slow mem
168 // it's much lower than that
169 //#define SH2_LINE_CYCLES 735
170 #define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
173 #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
176 SekCycleAim += m68k_cycles; \
177 while (SekCycleCnt < SekCycleAim) { \
178 slice = SekCycleCnt; \
179 run_m68k(SekCycleAim - SekCycleCnt); \
180 if (!(Pico32x.regs[0] & P32XS_nRES)) \
181 continue; /* SH2s reseting */ \
182 slice = SekCycleCnt - slice; /* real count from 68k */ \
183 if (SekCycleCnt < SekCycleAim) \
184 elprintf(EL_32X, "slice %d", slice); \
185 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
186 sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
187 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
188 sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
193 #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
196 for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
197 run_m68k(STEP_68K); \
198 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
199 sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
200 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
201 sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
204 i = (m68k_cycles) - i; \
206 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
207 sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
208 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
209 sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
212 #define CPUS_RUN CPUS_RUN_SIMPLE
213 //#define CPUS_RUN CPUS_RUN_LOCKSTEP
215 #include "../pico_cmn.c"
217 void PicoFrame32x(void)
219 pwm_frame_smp_cnt = 0;
221 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
222 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
223 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
225 p32x_poll_event(3, 1);
229 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);