1 #include "../pico_int.h"
4 static const char str_mars[] = "MARS";
6 struct Pico32xMem *Pico32xMem;
8 static void bank_switch(int b);
10 #define MSB8(x) ((x) >> 8)
13 #define POLL_THRESHOLD 6
16 int addr, pc, cnt, flag;
18 static struct poll_det m68k_poll, sh2_poll[2];
20 static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp)
22 int ret = 0, flag = pd->flag;
27 if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) {
29 if (pd->cnt > POLL_THRESHOLD) {
30 if (!(Pico32x.emu_flags & flag)) {
31 elprintf(EL_32X, "%s poll addr %08x @ %06x",
32 flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
35 Pico32x.emu_flags |= flag;
46 static int p32x_poll_undetect(struct poll_det *pd, int is_vdp)
48 int ret = 0, flag = pd->flag;
51 if (pd->cnt > POLL_THRESHOLD)
53 pd->addr = pd->cnt = 0;
54 Pico32x.emu_flags &= ~flag;
58 void p32x_poll_event(int is_vdp)
60 p32x_poll_undetect(&sh2_poll[0], is_vdp);
61 p32x_poll_undetect(&sh2_poll[1], is_vdp);
68 static const u16 comm_fakevals[] = {
69 0x4d5f, 0x4f4b, // M_OK
70 0x535f, 0x4f4b, // S_OK
71 0x4D41, 0x5346, // MASF - Brutal Unleashed
72 0x5331, 0x4d31, // Darxide
75 0x0000, 0x0000, // eq for doom
76 0x0002, // Mortal Kombat
80 static u32 sh2_comm_faker(u32 a)
83 if (a == 0x28 && !p32x_csum_faked) {
85 return *(unsigned short *)(Pico.rom + 0x18e);
87 if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
89 return comm_fakevals[f++];
95 unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
96 unsigned int chcr0; // chan ctl
97 unsigned int sar1, dar1, tcr1; // same for chan 1
103 static void dma_68k2sh2_do(void)
105 unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
108 if (dmac0->tcr0 != *dreqlen)
109 elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
111 for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
112 extern void p32x_sh2_write16(u32 a, u32 d, int id);
113 elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
114 p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
120 Pico32x.dmac_ptr = 0; // HACK
121 Pico32x.regs[6 / 2] &= ~P32XS_FULL;
123 Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
124 if (dmac0->tcr0 == 0)
125 dmac0->chcr0 |= 2; // DMA has ended normally
128 // ------------------------------------------------------------------
131 static u32 p32x_reg_read16(u32 a)
136 if ((a & 0x30) == 0x20)
137 return sh2_comm_faker(a);
139 if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekPc, 0)) {
144 // fake only slave for now
145 if (a == 0x24 || a == 0x26)
146 return sh2_comm_faker(a);
148 if ((a & 0x30) == 0x30)
149 return p32x_pwm_read16(a);
151 return Pico32x.regs[a / 2];
154 static void p32x_reg_write8(u32 a, u32 d)
156 u16 *r = Pico32x.regs;
159 if (a == 1 && !(r[0] & 1)) {
169 case 0: // adapter ctl
170 r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
173 if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
174 Pico32x.sh2irqi[0] |= P32XI_CMD;
177 if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
178 Pico32x.sh2irqi[1] |= P32XI_CMD;
190 r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV));
195 static void p32x_reg_write16(u32 a, u32 d)
197 u16 *r = Pico32x.regs;
201 case 0x00: // adapter ctl
202 r[0] = (r[0] & 0x83) | (d & P32XS_FM);
204 case 0x10: // DREQ len
207 case 0x12: // FIFO reg
208 if (!(r[6 / 2] & P32XS_68S)) {
209 elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
212 if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
213 Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
214 if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
216 if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
217 r[6 / 2] |= P32XS_FULL;
223 if ((a & 0x38) == 0x08) {
228 else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
230 if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0))
231 // if some SH2 is busy waiting, it needs to see the result ASAP
236 else if ((a & 0x30) == 0x30) {
237 p32x_pwm_write16(a, d);
241 p32x_reg_write8(a + 1, d);
244 // ------------------------------------------------------------------
246 static u32 p32x_vdp_read16(u32 a)
250 return Pico32x.vdp_regs[a / 2];
253 static void p32x_vdp_write8(u32 a, u32 d)
255 u16 *r = Pico32x.vdp_regs;
258 // for FEN checks between writes
261 // TODO: verify what's writeable
264 // priority inversion is handled in palette
265 if ((r[0] ^ d) & P32XV_PRI)
266 Pico32x.dirty_pal = 1;
267 r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
271 Pico32x.pending_fb = d;
272 // if we are blanking and FS bit is changing
273 if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
275 Pico32xSwapDRAM(d ^ 1);
276 elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
282 static void p32x_vdp_write16(u32 a, u32 d)
284 p32x_vdp_write8(a | 1, d);
287 // ------------------------------------------------------------------
290 static u32 p32x_sh2reg_read16(u32 a, int cpuid)
292 u16 *r = Pico32x.regs;
296 case 0x00: // adapter/irq ctl
297 return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid];
298 case 0x10: // DREQ len
303 if ((a & 0x38) == 0x08)
306 if ((a & 0x30) == 0x20) {
307 if (p32x_poll_detect(&sh2_poll[cpuid], a, sh2_pc(cpuid), 0))
311 if ((a & 0x30) == 0x30) {
312 sh2_poll[cpuid].cnt = 0;
313 return p32x_pwm_read16(a);
319 static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
323 Pico32x.sh2irq_mask[cpuid] = d & 0x0f;
328 static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
333 if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
334 Pico32x.regs[a / 2] = d;
335 p32x_poll_undetect(&m68k_poll, 0);
336 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
340 else if ((a & 0x30) == 0x30) {
341 p32x_pwm_write16(a, d);
346 case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
347 case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
348 case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
349 case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
350 case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
353 p32x_sh2reg_write8(a | 1, d, cpuid);
360 static u32 sh2_peripheral_read(u32 a, int id)
364 d = Pico32xMem->sh2_peri_regs[0][a / 4];
366 elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
370 static void sh2_peripheral_write(u32 a, u32 d, int id)
372 unsigned int *r = Pico32xMem->sh2_peri_regs[0];
373 elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
378 if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
379 elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
380 dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
381 dmac0->tcr0 &= 0xffffff;
382 // DREQ is only sent after first 4 words are written.
383 // we do multiple of 4 words to avoid messing up alignment
384 if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
385 elprintf(EL_32X, "68k -> sh2 DMA");
391 // ------------------------------------------------------------------
392 // default 32x handlers
393 u32 PicoRead8_32x(u32 a)
396 if ((a & 0xffc0) == 0x5100) { // a15100
397 d = p32x_reg_read16(a);
401 if (!(Pico32x.regs[0] & 1))
404 if ((a & 0xfff0) == 0x5180) { // a15180
405 d = p32x_vdp_read16(a);
409 if ((a & 0xfe00) == 0x5200) { // a15200
410 d = Pico32xMem->pal[(a & 0x1ff) / 2];
415 if ((a & 0xfffc) == 0x30ec) { // a130ec
420 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
430 elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
434 u32 PicoRead16_32x(u32 a)
437 if ((a & 0xffc0) == 0x5100) { // a15100
438 d = p32x_reg_read16(a);
442 if (!(Pico32x.regs[0] & 1))
445 if ((a & 0xfff0) == 0x5180) { // a15180
446 d = p32x_vdp_read16(a);
450 if ((a & 0xfe00) == 0x5200) { // a15200
451 d = Pico32xMem->pal[(a & 0x1ff) / 2];
456 if ((a & 0xfffc) == 0x30ec) { // a130ec
457 d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
461 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
465 elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
469 void PicoWrite8_32x(u32 a, u32 d)
471 if ((a & 0xfc00) == 0x5000)
472 elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
474 if ((a & 0xffc0) == 0x5100) { // a15100
475 p32x_reg_write8(a, d);
479 if (!(Pico32x.regs[0] & 1))
482 if ((a & 0xfff0) == 0x5180) { // a15180
483 p32x_vdp_write8(a, d);
488 if ((a & 0xfe00) == 0x5200) { // a15200
489 elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
490 ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
491 Pico32x.dirty_pal = 1;
496 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
499 void PicoWrite16_32x(u32 a, u32 d)
501 if ((a & 0xfc00) == 0x5000)
502 elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
504 if ((a & 0xffc0) == 0x5100) { // a15100
505 p32x_reg_write16(a, d);
509 if (!(Pico32x.regs[0] & 1))
512 if ((a & 0xfff0) == 0x5180) { // a15180
513 p32x_vdp_write16(a, d);
517 if ((a & 0xfe00) == 0x5200) { // a15200
518 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
519 Pico32x.dirty_pal = 1;
524 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
527 // hint vector is writeable
528 static void PicoWrite8_hint(u32 a, u32 d)
530 if ((a & 0xfffc) == 0x0070) {
531 Pico32xMem->m68k_rom[a ^ 1] = d;
535 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
538 static void PicoWrite16_hint(u32 a, u32 d)
540 if ((a & 0xfffc) == 0x0070) {
541 ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
545 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
548 void Pico32xSwapDRAM(int b)
550 cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
551 cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
552 cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
553 cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
556 static void bank_switch(int b)
558 unsigned int rs, bank;
561 if (bank >= Pico.romsize) {
562 elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
566 // 32X ROM (unbanked, XXX: consider mirroring?)
567 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
571 cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
572 cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
574 elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
577 // -----------------------------------------------------------------
579 // -----------------------------------------------------------------
581 u32 p32x_sh2_read8(u32 a, int id)
585 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
586 return Pico32xMem->sh2_rom_m[a ^ 1];
587 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
588 return Pico32xMem->sh2_rom_s[a ^ 1];
590 if ((a & 0x0ffc0000) == 0x06000000)
591 return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
593 if ((a & 0x0fc00000) == 0x02000000)
594 if ((a & 0x003fffff) < Pico.romsize)
595 return Pico.rom[(a & 0x3fffff) ^ 1];
597 if ((a & ~0xfff) == 0xc0000000)
598 return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
600 if ((a & 0x0fffff00) == 0x4000) {
601 d = p32x_sh2reg_read16(a, id);
605 if ((a & 0x0fffff00) == 0x4100) {
606 d = p32x_vdp_read16(a);
607 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
612 if ((a & 0x0fffff00) == 0x4200) {
613 d = Pico32xMem->pal[(a & 0x1ff) / 2];
617 elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
618 id ? 's' : 'm', a, d, sh2_pc(id));
627 elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
628 id ? 's' : 'm', a, d, sh2_pc(id));
632 u32 p32x_sh2_read16(u32 a, int id)
636 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
637 return *(u16 *)(Pico32xMem->sh2_rom_m + a);
638 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
639 return *(u16 *)(Pico32xMem->sh2_rom_s + a);
641 if ((a & 0x0ffc0000) == 0x06000000)
642 return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
644 if ((a & 0x0fc00000) == 0x02000000)
645 if ((a & 0x003fffff) < Pico.romsize)
646 return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
648 if ((a & ~0xfff) == 0xc0000000)
649 return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
651 if ((a & 0x0fffff00) == 0x4000) {
652 d = p32x_sh2reg_read16(a, id);
656 if ((a & 0x0fffff00) == 0x4100) {
657 d = p32x_vdp_read16(a);
658 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
663 if ((a & 0x0fffff00) == 0x4200) {
664 d = Pico32xMem->pal[(a & 0x1ff) / 2];
668 elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
669 id ? 's' : 'm', a, d, sh2_pc(id));
673 elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
674 id ? 's' : 'm', a, d, sh2_pc(id));
678 u32 p32x_sh2_read32(u32 a, int id)
680 if ((a & 0xfffffe00) == 0xfffffe00)
681 return sh2_peripheral_read(a, id);
683 // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
684 return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id);
687 void p32x_sh2_write8(u32 a, u32 d, int id)
689 if ((a & 0x0ffffc00) == 0x4000)
690 elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
691 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
693 if ((a & 0x0ffc0000) == 0x06000000) {
694 Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
698 if ((a & 0x0ffe0000) == 0x04000000) {
699 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
700 dram[(a & 0x1ffff) ^ 1] = d;
704 if ((a & ~0xfff) == 0xc0000000) {
705 Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d;
709 if ((a & 0x0fffff00) == 0x4100) {
710 p32x_vdp_write8(a, d);
714 if ((a & 0x0fffff00) == 0x4000) {
715 p32x_sh2reg_write8(a, d, id);
719 elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
720 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
723 void p32x_sh2_write16(u32 a, u32 d, int id)
725 if ((a & 0x0ffffc00) == 0x4000)
726 elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
727 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
729 if ((a & 0x0ffc0000) == 0x06000000) {
730 ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
734 if ((a & ~0xfff) == 0xc0000000) {
735 ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d;
739 if ((a & 0x0ffe0000) == 0x04000000) {
740 Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d;
744 if ((a & 0x0fffff00) == 0x4100) {
745 p32x_vdp_write16(a, d);
749 if ((a & 0x0ffffe00) == 0x4200) {
750 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
751 Pico32x.dirty_pal = 1;
755 if ((a & 0x0fffff00) == 0x4000) {
756 p32x_sh2reg_write16(a, d, id);
760 elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
761 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
764 void p32x_sh2_write32(u32 a, u32 d, int id)
766 if ((a & 0xfffffe00) == 0xfffffe00) {
767 sh2_peripheral_write(a, d, id);
771 p32x_sh2_write16(a, d >> 16, id);
772 p32x_sh2_write16(a + 2, d, id);
775 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
776 void PicoMemSetup32x(void)
783 Pico32xMem = calloc(1, sizeof(*Pico32xMem));
784 if (Pico32xMem == NULL) {
785 elprintf(EL_STATUS, "OOM");
789 dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
792 ps = (unsigned short *)Pico32xMem->m68k_rom;
793 pl = (unsigned int *)Pico32xMem->m68k_rom;
794 for (i = 1; i < 0xc0/4; i++)
795 pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
798 for (i = 0xc0/2; i < 0x100/2; i++)
803 ps[0xc2/2] = 0x2700; // move #0x2700,sr
804 ps[0xfe/2] = 0x60fe; // jump to self
806 ps[0xfe/2] = 0x4e75; // rts
809 // fill remaining mem with ROM
810 memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
815 FILE *f = fopen("32X_M_BIOS.BIN", "rb");
818 printf("missing 32X_M_BIOS.BIN\n");
821 fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
823 f = fopen("32X_S_BIOS.BIN", "rb");
825 printf("missing 32X_S_BIOS.BIN\n");
828 fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f);
831 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
832 int t = Pico32xMem->sh2_rom_m[i];
833 Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
834 Pico32xMem->sh2_rom_m[i + 1] = t;
836 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) {
837 int t = Pico32xMem->sh2_rom_s[i];
838 Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1];
839 Pico32xMem->sh2_rom_s[i + 1] = t;
843 // cartridge area becomes unmapped
844 // XXX: we take the easy way and don't unmap ROM,
845 // so that we can avoid handling the RV bit.
846 // m68k_map_unmap(0x000000, 0x3fffff);
849 rs = sizeof(Pico32xMem->m68k_rom);
850 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
851 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
852 cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
853 cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
858 // 32X ROM (unbanked, XXX: consider mirroring?)
859 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
862 cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
863 cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
868 // setup poll detector
869 m68k_poll.flag = P32XF_68KPOLL;
870 sh2_poll[0].flag = P32XF_MSH2POLL;
871 sh2_poll[1].flag = P32XF_SSH2POLL;