1 #include "../pico_int.h"
4 static const char str_mars[] = "MARS";
6 struct Pico32xMem *Pico32xMem;
8 static void bank_switch(int b);
10 #define MSB8(x) ((x) >> 8)
13 #define POLL_THRESHOLD 6
18 static struct poll_det m68k_poll, msh2_poll;
20 static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag)
24 if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) {
26 if (pd->cnt > POLL_THRESHOLD) {
27 if (!(Pico32x.emu_flags & flag)) {
28 elprintf(EL_32X, "%s poll addr %08x @ %06x",
29 flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
32 Pico32x.emu_flags |= flag;
43 static int p32x_poll_undetect(struct poll_det *pd, int flag)
46 if (pd->cnt > POLL_THRESHOLD)
48 pd->addr = pd->cnt = 0;
49 Pico32x.emu_flags &= ~flag;
53 void p32x_poll_event(int is_vdp)
55 p32x_poll_undetect(&msh2_poll, is_vdp ? P32XF_MSH2VPOLL : P32XF_MSH2POLL);
62 static const u16 comm_fakevals[] = {
63 0x4d5f, 0x4f4b, // M_OK
64 0x535f, 0x4f4b, // S_OK
65 0x4D41, 0x5346, // MASF - Brutal Unleashed
66 0x5331, 0x4d31, // Darxide
69 0x0000, 0x0000, // eq for doom
70 0x0002, // Mortal Kombat
74 static u32 sh2_comm_faker(u32 a)
77 if (a == 0x28 && !p32x_csum_faked) {
79 return *(unsigned short *)(Pico.rom + 0x18e);
81 if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
83 return comm_fakevals[f++];
89 unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
90 unsigned int chcr0; // chan ctl
91 unsigned int sar1, dar1, tcr1; // same for chan 1
97 static void dma_68k2sh2_do(void)
99 unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
102 if (dmac0->tcr0 != *dreqlen)
103 elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
105 for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
106 extern void p32x_sh2_write16(u32 a, u32 d);
107 elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
108 p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i]);
114 Pico32x.dmac_ptr = 0; // HACK
115 Pico32x.regs[6 / 2] &= ~P32XS_FULL;
117 Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
118 if (dmac0->tcr0 == 0)
119 dmac0->chcr0 |= 2; // DMA has ended normally
120 p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
123 // ------------------------------------------------------------------
125 static u32 p32x_reg_read16(u32 a)
130 if ((a & 0x30) == 0x20)
131 return sh2_comm_faker(a);
133 if (p32x_poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) {
138 // fake only slave for now
139 if (a == 0x24 || a == 0x26)
140 return sh2_comm_faker(a);
143 return Pico32x.regs[a / 2];
146 static void p32x_reg_write8(u32 a, u32 d)
148 u16 *r = Pico32x.regs;
151 if (a == 1 && !(r[0] & 1)) {
161 case 0: // adapter ctl
162 r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
165 if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
166 Pico32x.sh2irqi[0] |= P32XI_CMD;
178 r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV));
183 static void p32x_reg_write16(u32 a, u32 d)
185 u16 *r = Pico32x.regs;
188 // for write loops with FIFO checks..
192 case 0x00: // adapter ctl
193 r[0] = (r[0] & 0x83) | (d & P32XS_FM);
195 case 0x10: // DREQ len
198 case 0x12: // FIFO reg
199 if (!(r[6 / 2] & P32XS_68S)) {
200 elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
203 if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
204 Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
205 if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
207 if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
208 r[6 / 2] |= P32XS_FULL;
214 if ((a & 0x38) == 0x08) {
219 else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
221 if (p32x_poll_undetect(&msh2_poll, P32XF_MSH2POLL))
222 // if SH2 is busy waiting, it needs to see the result ASAP
227 p32x_reg_write8(a + 1, d);
230 // ------------------------------------------------------------------
232 static u32 p32x_vdp_read16(u32 a)
236 return Pico32x.vdp_regs[a / 2];
239 static void p32x_vdp_write8(u32 a, u32 d)
241 u16 *r = Pico32x.vdp_regs;
244 // for FEN checks between writes
247 // TODO: verify what's writeable
250 // priority inversion is handled in palette
251 if ((r[0] ^ d) & P32XV_PRI)
252 Pico32x.dirty_pal = 1;
253 r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
257 Pico32x.pending_fb = d;
258 // if we are blanking and FS bit is changing
259 if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
261 Pico32xSwapDRAM(d ^ 1);
262 elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
268 static void p32x_vdp_write16(u32 a, u32 d)
270 p32x_vdp_write8(a | 1, d);
273 // ------------------------------------------------------------------
275 static u32 p32x_sh2reg_read16(u32 a)
277 u16 *r = Pico32x.regs;
281 case 0x00: // adapter/irq ctl
282 return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[0];
283 case 0x10: // DREQ len
287 // DREQ src, dst; comm port
288 if ((a & 0x38) == 0x08 || (a & 0x30) == 0x20)
294 static void p32x_sh2reg_write8(u32 a, u32 d)
298 Pico32x.sh2irq_mask[0] = d & 0x0f;
303 static void p32x_sh2reg_write16(u32 a, u32 d)
307 if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
308 Pico32x.regs[a/2] = d;
309 p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL);
314 case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
315 case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
316 case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
317 case 0x1a: Pico32x.sh2irqi[0] &= ~P32XI_CMD; goto irls;
318 case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
321 p32x_sh2reg_write8(a | 1, d);
328 static u32 sh2_peripheral_read(u32 a)
332 d = Pico32xMem->sh2_peri_regs[0][a / 4];
334 elprintf(EL_32X, "sh2 peri r32 [%08x] %08x @%06x", a, d, ash2_pc());
338 static void sh2_peripheral_write(u32 a, u32 d)
340 unsigned int *r = Pico32xMem->sh2_peri_regs[0];
341 elprintf(EL_32X, "sh2 peri w32 [%08x] %08x @%06x", a, d, ash2_pc());
346 if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
347 elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
348 dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, ash2_pc());
349 dmac0->tcr0 &= 0xffffff;
350 // DREQ is only sent after first 4 words are written.
351 // we do multiple of 4 words to avoid messing up alignment
352 if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
353 elprintf(EL_32X, "68k -> sh2 DMA");
359 // ------------------------------------------------------------------
360 // default 32x handlers
361 u32 PicoRead8_32x(u32 a)
364 if ((a & 0xffc0) == 0x5100) { // a15100
365 d = p32x_reg_read16(a);
369 if (!(Pico32x.regs[0] & 1))
372 if ((a & 0xfff0) == 0x5180) { // a15180
373 d = p32x_vdp_read16(a);
377 if ((a & 0xfe00) == 0x5200) { // a15200
378 d = Pico32xMem->pal[(a & 0x1ff) / 2];
383 if ((a & 0xfffc) == 0x30ec) { // a130ec
388 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
398 elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
402 u32 PicoRead16_32x(u32 a)
405 if ((a & 0xffc0) == 0x5100) { // a15100
406 d = p32x_reg_read16(a);
410 if (!(Pico32x.regs[0] & 1))
413 if ((a & 0xfff0) == 0x5180) { // a15180
414 d = p32x_vdp_read16(a);
418 if ((a & 0xfe00) == 0x5200) { // a15200
419 d = Pico32xMem->pal[(a & 0x1ff) / 2];
424 if ((a & 0xfffc) == 0x30ec) { // a130ec
425 d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
429 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
433 elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
437 void PicoWrite8_32x(u32 a, u32 d)
439 if ((a & 0xfc00) == 0x5000)
440 elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
442 if ((a & 0xffc0) == 0x5100) { // a15100
443 p32x_reg_write8(a, d);
447 if (!(Pico32x.regs[0] & 1))
450 if ((a & 0xfff0) == 0x5180) { // a15180
451 p32x_vdp_write8(a, d);
456 if ((a & 0xfe00) == 0x5200) { // a15200
457 elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
458 ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
459 Pico32x.dirty_pal = 1;
464 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
467 void PicoWrite16_32x(u32 a, u32 d)
469 if ((a & 0xfc00) == 0x5000)
470 elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
472 if ((a & 0xffc0) == 0x5100) { // a15100
473 p32x_reg_write16(a, d);
477 if (!(Pico32x.regs[0] & 1))
480 if ((a & 0xfff0) == 0x5180) { // a15180
481 p32x_vdp_write16(a, d);
485 if ((a & 0xfe00) == 0x5200) { // a15200
486 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
487 Pico32x.dirty_pal = 1;
492 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
495 // hint vector is writeable
496 static void PicoWrite8_hint(u32 a, u32 d)
498 if ((a & 0xfffc) == 0x0070) {
499 Pico32xMem->m68k_rom[a ^ 1] = d;
503 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
506 static void PicoWrite16_hint(u32 a, u32 d)
508 if ((a & 0xfffc) == 0x0070) {
509 ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
513 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
516 void Pico32xSwapDRAM(int b)
518 cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
519 cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
520 cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
521 cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
524 static void bank_switch(int b)
526 unsigned int rs, bank;
529 if (bank >= Pico.romsize) {
530 elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
534 // 32X ROM (unbanked, XXX: consider mirroring?)
535 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
539 cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
540 cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
542 elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
545 // -----------------------------------------------------------------
547 // -----------------------------------------------------------------
549 u32 p32x_sh2_read8(u32 a)
554 if (a < sizeof(Pico32xMem->sh2_rom_m))
555 return Pico32xMem->sh2_rom_m[a ^ 1];
557 if ((a & 0x0ffc0000) == 0x06000000)
558 return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
560 if ((a & 0x0fc00000) == 0x02000000)
561 if ((a & 0x003fffff) < Pico.romsize)
562 return Pico.rom[(a & 0x3fffff) ^ 1];
564 if ((a & 0x0fffff00) == 0x4000) {
565 d = p32x_sh2reg_read16(a);
570 if ((a & 0x0fffff00) == 0x4100) {
571 d = p32x_vdp_read16(a);
572 pd = P32XF_MSH2VPOLL;
576 if ((a & 0x0fffff00) == 0x4200) {
577 d = Pico32xMem->pal[(a & 0x1ff) / 2];
581 elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc());
585 if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
594 elprintf(EL_32X, "sh2 r8 [%08x] %02x @%06x", a, d, ash2_pc());
598 u32 p32x_sh2_read16(u32 a)
603 if (a < sizeof(Pico32xMem->sh2_rom_m))
604 return *(u16 *)(Pico32xMem->sh2_rom_m + a);
606 if ((a & 0x0ffc0000) == 0x06000000)
607 return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
609 if ((a & 0x0fc00000) == 0x02000000)
610 if ((a & 0x003fffff) < Pico.romsize)
611 return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
613 if ((a & 0x0fffff00) == 0x4000) {
614 d = p32x_sh2reg_read16(a);
619 if ((a & 0x0fffff00) == 0x4100) {
620 d = p32x_vdp_read16(a);
621 pd = P32XF_MSH2VPOLL;
625 if ((a & 0x0fffff00) == 0x4200) {
626 d = Pico32xMem->pal[(a & 0x1ff) / 2];
630 elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc());
634 if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd))
638 elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc());
642 u32 p32x_sh2_read32(u32 a)
644 if ((a & 0xfffffe00) == 0xfffffe00)
645 return sh2_peripheral_read(a);
647 // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
648 return (p32x_sh2_read16(a) << 16) | p32x_sh2_read16(a + 2);
651 void p32x_sh2_write8(u32 a, u32 d)
653 if ((a & 0x0ffffc00) == 0x4000)
654 elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
656 if ((a & 0x0ffc0000) == 0x06000000) {
657 Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
661 if ((a & 0x0ffe0000) == 0x04000000) {
662 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
663 dram[(a & 0x1ffff) ^ 1] = d;
667 if ((a & 0x0fffff00) == 0x4100) {
668 p32x_vdp_write8(a, d);
672 if ((a & 0x0fffff00) == 0x4000) {
673 p32x_sh2reg_write8(a, d);
677 elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc());
680 void p32x_sh2_write16(u32 a, u32 d)
682 if ((a & 0x0ffffc00) == 0x4000)
683 elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
685 if ((a & 0x0ffc0000) == 0x06000000) {
686 ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
690 if ((a & 0x0ffe0000) == 0x04000000) {
691 Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d;
695 if ((a & 0x0fffff00) == 0x4100) {
696 p32x_vdp_write16(a, d);
700 if ((a & 0x0ffffe00) == 0x4200) {
701 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
702 Pico32x.dirty_pal = 1;
706 if ((a & 0x0fffff00) == 0x4000) {
707 p32x_sh2reg_write16(a, d);
711 elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc());
714 void p32x_sh2_write32(u32 a, u32 d)
716 if ((a & 0xfffffe00) == 0xfffffe00) {
717 sh2_peripheral_write(a, d);
721 // elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc());
722 p32x_sh2_write16(a, d >> 16);
723 p32x_sh2_write16(a + 2, d);
726 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
727 void PicoMemSetup32x(void)
734 Pico32xMem = calloc(1, sizeof(*Pico32xMem));
735 if (Pico32xMem == NULL) {
736 elprintf(EL_STATUS, "OOM");
740 dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
743 ps = (unsigned short *)Pico32xMem->m68k_rom;
744 pl = (unsigned int *)Pico32xMem->m68k_rom;
745 for (i = 1; i < 0xc0/4; i++)
746 pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
749 for (i = 0xc0/2; i < 0x100/2; i++)
754 ps[0xc2/2] = 0x2700; // move #0x2700,sr
755 ps[0xfe/2] = 0x60fe; // jump to self
757 ps[0xfe/2] = 0x4e75; // rts
760 // fill remaining mem with ROM
761 memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
766 FILE *f = fopen("32X_M_BIOS.BIN", "rb");
769 printf("missing BIOS\n");
772 fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
774 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
775 int t = Pico32xMem->sh2_rom_m[i];
776 Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
777 Pico32xMem->sh2_rom_m[i + 1] = t;
781 // cartridge area becomes unmapped
782 // XXX: we take the easy way and don't unmap ROM,
783 // so that we can avoid handling the RV bit.
784 // m68k_map_unmap(0x000000, 0x3fffff);
787 rs = sizeof(Pico32xMem->m68k_rom);
788 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
789 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
790 cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
791 cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
796 // 32X ROM (unbanked, XXX: consider mirroring?)
797 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
800 cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
801 cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);