1 #include "../pico_int.h"
4 static const char str_mars[] = "MARS";
6 struct Pico32xMem *Pico32xMem;
8 static void bank_switch(int b);
10 #define MSB8(x) ((x) >> 8)
13 #define POLL_THRESHOLD 6
16 int addr, pc, cnt, flag;
18 static struct poll_det m68k_poll, sh2_poll[2];
20 static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp)
22 int ret = 0, flag = pd->flag;
27 if (a - 2 <= pd->addr && pd->addr <= a + 2) { // && pd->pc == pc) {
29 if (pd->cnt > POLL_THRESHOLD) {
30 if (!(Pico32x.emu_flags & flag)) {
31 elprintf(EL_32X, "%s poll addr %08x @ %06x",
32 flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
35 Pico32x.emu_flags |= flag;
46 static int p32x_poll_undetect(struct poll_det *pd, int is_vdp)
48 int ret = 0, flag = pd->flag;
51 if (pd->cnt > POLL_THRESHOLD)
53 pd->addr = pd->cnt = 0;
54 Pico32x.emu_flags &= ~flag;
58 void p32x_poll_event(int cpu_mask, int is_vdp)
61 p32x_poll_undetect(&sh2_poll[0], is_vdp);
63 p32x_poll_undetect(&sh2_poll[1], is_vdp);
70 static const u16 comm_fakevals[] = {
71 0x4d5f, 0x4f4b, // M_OK
72 0x535f, 0x4f4b, // S_OK
73 0x4D41, 0x5346, // MASF - Brutal Unleashed
74 0x5331, 0x4d31, // Darxide
77 0x0000, 0x0000, // eq for doom
78 0x0002, // Mortal Kombat
82 static u32 sh2_comm_faker(u32 a)
85 if (a == 0x28 && !p32x_csum_faked) {
87 return *(unsigned short *)(Pico.rom + 0x18e);
89 if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
91 return comm_fakevals[f++];
97 unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
98 unsigned int chcr0; // chan ctl
99 unsigned int sar1, dar1, tcr1; // same for chan 1
105 static void dma_68k2sh2_do(void)
107 unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
110 if (dmac0->tcr0 != *dreqlen)
111 elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
113 for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
114 extern void p32x_sh2_write16(u32 a, u32 d, int id);
115 elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
116 p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
122 Pico32x.dmac_ptr = 0; // HACK
123 Pico32x.regs[6 / 2] &= ~P32XS_FULL;
125 Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
126 if (dmac0->tcr0 == 0)
127 dmac0->chcr0 |= 2; // DMA has ended normally
130 // ------------------------------------------------------------------
133 static u32 p32x_reg_read16(u32 a)
137 if (a == 2) // INTM, INTS
138 return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
140 if ((a & 0x30) == 0x20)
141 return sh2_comm_faker(a);
143 if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekPc, 0)) {
148 if ((a & 0x30) == 0x30)
149 return p32x_pwm_read16(a);
151 return Pico32x.regs[a / 2];
154 static void p32x_reg_write8(u32 a, u32 d)
156 u16 *r = Pico32x.regs;
159 // for things like bset on comm port
162 if (a == 1 && !(r[0] & 1)) {
172 case 0: // adapter ctl
173 r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
176 if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
177 Pico32x.sh2irqi[0] |= P32XI_CMD;
181 if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
182 Pico32x.sh2irqi[1] |= P32XI_CMD;
195 r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV));
203 static void p32x_reg_write16(u32 a, u32 d)
205 u16 *r = Pico32x.regs;
208 // for things like bset on comm port
212 case 0x00: // adapter ctl
213 r[0] = (r[0] & 0x83) | (d & P32XS_FM);
215 case 0x10: // DREQ len
218 case 0x12: // FIFO reg
219 if (!(r[6 / 2] & P32XS_68S)) {
220 elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
223 if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
224 Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
225 if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
227 if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
228 r[6 / 2] |= P32XS_FULL;
234 if ((a & 0x38) == 0x08) {
239 else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
241 if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0))
242 // if some SH2 is busy waiting, it needs to see the result ASAP
247 else if ((a & 0x30) == 0x30) {
248 p32x_pwm_write16(a, d);
252 p32x_reg_write8(a + 1, d);
255 // ------------------------------------------------------------------
257 static u32 p32x_vdp_read16(u32 a)
261 return Pico32x.vdp_regs[a / 2];
264 static void p32x_vdp_write8(u32 a, u32 d)
266 u16 *r = Pico32x.vdp_regs;
269 // for FEN checks between writes
272 // TODO: verify what's writeable
275 // priority inversion is handled in palette
276 if ((r[0] ^ d) & P32XV_PRI)
277 Pico32x.dirty_pal = 1;
278 r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
282 Pico32x.pending_fb = d;
283 // if we are blanking and FS bit is changing
284 if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
286 Pico32xSwapDRAM(d ^ 1);
287 elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
293 static void p32x_vdp_write16(u32 a, u32 d)
295 p32x_vdp_write8(a | 1, d);
298 // ------------------------------------------------------------------
301 static u32 p32x_sh2reg_read16(u32 a, int cpuid)
303 u16 *r = Pico32x.regs;
307 case 0x00: // adapter/irq ctl
308 return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid];
309 case 0x04: // H count
310 return Pico32x.sh2_regs[4 / 2];
311 case 0x10: // DREQ len
316 if ((a & 0x38) == 0x08)
319 if ((a & 0x30) == 0x20) {
320 if (p32x_poll_detect(&sh2_poll[cpuid], a, sh2_pc(cpuid), 0))
324 if ((a & 0x30) == 0x30) {
325 sh2_poll[cpuid].cnt = 0;
326 return p32x_pwm_read16(a);
332 static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
337 Pico32x.regs[0] &= ~P32XS_FM;
338 Pico32x.regs[0] |= (d << 8) & P32XS_FM;
341 Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
342 Pico32x.sh2_regs[0] &= ~0x80;
343 Pico32x.sh2_regs[0] |= d & 0x80;
347 Pico32x.sh2_regs[4 / 2] = d & 0xff;
352 static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
357 if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
358 Pico32x.regs[a / 2] = d;
359 p32x_poll_undetect(&m68k_poll, 0);
360 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
364 else if ((a & 0x30) == 0x30) {
365 p32x_pwm_write16(a, d);
371 Pico32x.regs[0] &= ~P32XS_FM;
372 Pico32x.regs[0] |= d & P32XS_FM;
374 case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
375 case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
376 case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
377 case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
378 case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
381 p32x_sh2reg_write8(a | 1, d, cpuid);
388 // ------------------------------------------------------------------
389 // SH2 internal peripherals
390 static u32 sh2_peripheral_read8(u32 a, int id)
392 u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
400 elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
404 static u32 sh2_peripheral_read32(u32 a, int id)
408 d = Pico32xMem->sh2_peri_regs[id][a / 4];
410 elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
414 static void sh2_peripheral_write8(u32 a, u32 d, int id)
416 u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
417 elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
423 static void sh2_peripheral_write32(u32 a, u32 d, int id)
425 unsigned int *r = Pico32xMem->sh2_peri_regs[id];
426 elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
433 case 0x104: // DVDNT: divident L, starts divide
434 elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
436 r[0x118 / 4] = r[0x110 / 4] = d % r[0x100 / 4];
437 r[0x11c / 4] = r[0x114 / 4] = d / r[0x100 / 4];
441 elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x",
442 id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
444 long long divident = (long long)r[0x110 / 4] << 32 | d;
445 // XXX: undocumented mirroring to 0x118,0x11c?
446 r[0x118 / 4] = r[0x110 / 4] = divident % r[0x100 / 4];
447 r[0x11c / 4] = r[0x114 / 4] = divident / r[0x100 / 4];
452 if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
453 elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
454 dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
455 dmac0->tcr0 &= 0xffffff;
456 // DREQ is only sent after first 4 words are written.
457 // we do multiple of 4 words to avoid messing up alignment
458 if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
459 elprintf(EL_32X, "68k -> sh2 DMA");
465 // ------------------------------------------------------------------
466 // default 32x handlers
467 u32 PicoRead8_32x(u32 a)
470 if ((a & 0xffc0) == 0x5100) { // a15100
471 d = p32x_reg_read16(a);
475 if (!(Pico32x.regs[0] & 1))
478 if ((a & 0xfff0) == 0x5180) { // a15180
479 d = p32x_vdp_read16(a);
483 if ((a & 0xfe00) == 0x5200) { // a15200
484 d = Pico32xMem->pal[(a & 0x1ff) / 2];
489 if ((a & 0xfffc) == 0x30ec) { // a130ec
494 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
504 elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
508 u32 PicoRead16_32x(u32 a)
511 if ((a & 0xffc0) == 0x5100) { // a15100
512 d = p32x_reg_read16(a);
516 if (!(Pico32x.regs[0] & 1))
519 if ((a & 0xfff0) == 0x5180) { // a15180
520 d = p32x_vdp_read16(a);
524 if ((a & 0xfe00) == 0x5200) { // a15200
525 d = Pico32xMem->pal[(a & 0x1ff) / 2];
530 if ((a & 0xfffc) == 0x30ec) { // a130ec
531 d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
535 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
539 elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
543 void PicoWrite8_32x(u32 a, u32 d)
545 if ((a & 0xfc00) == 0x5000)
546 elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
548 if ((a & 0xffc0) == 0x5100) { // a15100
549 p32x_reg_write8(a, d);
553 if (!(Pico32x.regs[0] & 1))
556 if ((a & 0xfff0) == 0x5180) { // a15180
557 p32x_vdp_write8(a, d);
562 if ((a & 0xfe00) == 0x5200) { // a15200
563 elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
564 ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
565 Pico32x.dirty_pal = 1;
570 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
573 void PicoWrite16_32x(u32 a, u32 d)
575 if ((a & 0xfc00) == 0x5000)
576 elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
578 if ((a & 0xffc0) == 0x5100) { // a15100
579 p32x_reg_write16(a, d);
583 if (!(Pico32x.regs[0] & 1))
586 if ((a & 0xfff0) == 0x5180) { // a15180
587 p32x_vdp_write16(a, d);
591 if ((a & 0xfe00) == 0x5200) { // a15200
592 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
593 Pico32x.dirty_pal = 1;
598 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
601 // hint vector is writeable
602 static void PicoWrite8_hint(u32 a, u32 d)
604 if ((a & 0xfffc) == 0x0070) {
605 Pico32xMem->m68k_rom[a ^ 1] = d;
609 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
612 static void PicoWrite16_hint(u32 a, u32 d)
614 if ((a & 0xfffc) == 0x0070) {
615 ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
619 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
622 void Pico32xSwapDRAM(int b)
624 cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
625 cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
626 cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
627 cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
630 static void bank_switch(int b)
632 unsigned int rs, bank;
635 if (bank >= Pico.romsize) {
636 elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
640 // 32X ROM (unbanked, XXX: consider mirroring?)
641 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
645 cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
646 cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
648 elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
651 // -----------------------------------------------------------------
653 // -----------------------------------------------------------------
655 u32 p32x_sh2_read8(u32 a, int id)
659 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
660 return Pico32xMem->sh2_rom_m[a ^ 1];
661 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
662 return Pico32xMem->sh2_rom_s[a ^ 1];
664 if ((a & 0xdffc0000) == 0x06000000)
665 return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
667 if ((a & 0xdfc00000) == 0x02000000)
668 if ((a & 0x003fffff) < Pico.romsize)
669 return Pico.rom[(a & 0x3fffff) ^ 1];
671 if ((a & ~0xfff) == 0xc0000000)
672 return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
674 if ((a & 0xdffe0000) == 0x04000000) {
675 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
676 return dram[(a & 0x1ffff) ^ 1];
679 if ((a & 0xdfffff00) == 0x4000) {
680 d = p32x_sh2reg_read16(a, id);
684 if ((a & 0xdfffff00) == 0x4100) {
685 d = p32x_vdp_read16(a);
686 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
691 if ((a & 0xdfffff00) == 0x4200) {
692 d = Pico32xMem->pal[(a & 0x1ff) / 2];
696 if ((a & 0xfffffe00) == 0xfffffe00)
697 return sh2_peripheral_read8(a, id);
699 elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
700 id ? 's' : 'm', a, d, sh2_pc(id));
709 elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
710 id ? 's' : 'm', a, d, sh2_pc(id));
714 u32 p32x_sh2_read16(u32 a, int id)
718 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
719 return *(u16 *)(Pico32xMem->sh2_rom_m + a);
720 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
721 return *(u16 *)(Pico32xMem->sh2_rom_s + a);
723 if ((a & 0xdffc0000) == 0x06000000)
724 return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
726 if ((a & 0xdfc00000) == 0x02000000)
727 if ((a & 0x003fffff) < Pico.romsize)
728 return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
730 if ((a & ~0xfff) == 0xc0000000)
731 return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
733 if ((a & 0xdffe0000) == 0x04000000)
734 return Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2];
736 if ((a & 0xdfffff00) == 0x4000) {
737 d = p32x_sh2reg_read16(a, id);
741 if ((a & 0xdfffff00) == 0x4100) {
742 d = p32x_vdp_read16(a);
743 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
748 if ((a & 0xdfffff00) == 0x4200) {
749 d = Pico32xMem->pal[(a & 0x1ff) / 2];
753 elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
754 id ? 's' : 'm', a, d, sh2_pc(id));
758 elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
759 id ? 's' : 'm', a, d, sh2_pc(id));
763 u32 p32x_sh2_read32(u32 a, int id)
765 if ((a & 0xfffffe00) == 0xfffffe00)
766 return sh2_peripheral_read32(a, id);
768 // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
769 return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id);
772 void p32x_sh2_write8(u32 a, u32 d, int id)
774 if ((a & 0xdffffc00) == 0x4000)
775 elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
776 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
778 if ((a & 0xdffc0000) == 0x06000000) {
779 Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
783 if ((a & 0xdffc0000) == 0x04000000) {
785 if (!(a & 0x20000) || d) {
786 dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
787 dram[(a & 0x1ffff) ^ 1] = d;
792 if ((a & ~0xfff) == 0xc0000000) {
793 Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d;
797 if ((a & 0xdfffff00) == 0x4100) {
798 p32x_vdp_write8(a, d);
802 if ((a & 0xdfffff00) == 0x4000) {
803 p32x_sh2reg_write8(a, d, id);
807 if ((a & 0xfffffe00) == 0xfffffe00) {
808 sh2_peripheral_write8(a, d, id);
812 elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
813 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
816 void p32x_sh2_write16(u32 a, u32 d, int id)
818 if ((a & 0xdffffc00) == 0x4000)
819 elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
820 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
822 // ignore "Associative purge space"
823 if ((a & 0xf8000000) == 0x40000000)
826 if ((a & 0xdffc0000) == 0x06000000) {
827 ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
831 if ((a & ~0xfff) == 0xc0000000) {
832 ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d;
836 if ((a & 0xdffc0000) == 0x04000000) {
837 u16 *pd = &Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2];
838 if (!(a & 0x20000)) {
843 if (!(d & 0xff00)) d |= *pd & 0xff00;
844 if (!(d & 0x00ff)) d |= *pd & 0x00ff;
849 if ((a & 0xdfffff00) == 0x4100) {
850 p32x_vdp_write16(a, d);
854 if ((a & 0xdffffe00) == 0x4200) {
855 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
856 Pico32x.dirty_pal = 1;
860 if ((a & 0xdfffff00) == 0x4000) {
861 p32x_sh2reg_write16(a, d, id);
865 elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
866 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
869 void p32x_sh2_write32(u32 a, u32 d, int id)
871 if ((a & 0xfffffe00) == 0xfffffe00) {
872 sh2_peripheral_write32(a, d, id);
876 p32x_sh2_write16(a, d >> 16, id);
877 p32x_sh2_write16(a + 2, d, id);
880 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
881 void PicoMemSetup32x(void)
888 Pico32xMem = calloc(1, sizeof(*Pico32xMem));
889 if (Pico32xMem == NULL) {
890 elprintf(EL_STATUS, "OOM");
894 dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
897 ps = (unsigned short *)Pico32xMem->m68k_rom;
898 pl = (unsigned int *)Pico32xMem->m68k_rom;
899 for (i = 1; i < 0xc0/4; i++)
900 pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
903 for (i = 0xc0/2; i < 0x100/2; i++)
908 ps[0xc2/2] = 0x2700; // move #0x2700,sr
909 ps[0xfe/2] = 0x60fe; // jump to self
911 ps[0xfe/2] = 0x4e75; // rts
914 // fill remaining mem with ROM
915 memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
920 FILE *f = fopen("32X_M_BIOS.BIN", "rb");
923 printf("missing 32X_M_BIOS.BIN\n");
926 fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
928 f = fopen("32X_S_BIOS.BIN", "rb");
930 printf("missing 32X_S_BIOS.BIN\n");
933 fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f);
936 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
937 int t = Pico32xMem->sh2_rom_m[i];
938 Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
939 Pico32xMem->sh2_rom_m[i + 1] = t;
941 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) {
942 int t = Pico32xMem->sh2_rom_s[i];
943 Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1];
944 Pico32xMem->sh2_rom_s[i + 1] = t;
948 // cartridge area becomes unmapped
949 // XXX: we take the easy way and don't unmap ROM,
950 // so that we can avoid handling the RV bit.
951 // m68k_map_unmap(0x000000, 0x3fffff);
954 rs = sizeof(Pico32xMem->m68k_rom);
955 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
956 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
957 cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
958 cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
963 // 32X ROM (unbanked, XXX: consider mirroring?)
964 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
967 cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
968 cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
973 // setup poll detector
974 m68k_poll.flag = P32XF_68KPOLL;
975 sh2_poll[0].flag = P32XF_MSH2POLL;
976 sh2_poll[1].flag = P32XF_SSH2POLL;