1 /****************************************************************************
3 * SPI Serial EEPROM (25xxx/95xxx) support
5 * Copyright (C) 2012 Eke-Eke (Genesis Plus GX)
7 * Redistribution and use of this code or any derivative works are permitted
8 * provided that the following conditions are met:
10 * - Redistributions may not be sold, nor may they be used in a commercial
11 * product or activity.
13 * - Redistributions that are modified from the original source must include the
14 * complete source code, including the source code for all components used by a
15 * binary built from the modified sources. However, as a special exception, the
16 * source code distributed need not include anything that is normally distributed
17 * (in either source or binary form) with the major components (compiler, kernel,
18 * and so on) of the operating system on which the executable runs, unless that
19 * component itself accompanies the executable.
21 * - Redistributions must reproduce the above copyright notice, this list of
22 * conditions and the following disclaimer in the documentation and/or other
23 * materials provided with the distribution.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
37 ****************************************************************************************/
39 #include "../pico_int.h"
40 #include "../cd/genplus_macros.h"
41 #include "eeprom_spi.h"
43 /* max supported size 64KB (25x512/95x512) */
44 #define SIZE_MASK 0xffff
45 #define PAGE_MASK 0x7f
47 /* hard-coded board implementation (!WP pin not used) */
64 uint8 cs; /* !CS line state */
65 uint8 clk; /* SCLK line state */
66 uint8 out; /* SO line state */
67 uint8 status; /* status register */
68 uint8 opcode; /* 8-bit opcode */
69 uint8 buffer; /* 8-bit data buffer */
70 uint16 addr; /* 16-bit address */
71 uint32 cycles; /* current operation cycle */
72 T_STATE_SPI state; /* current operation state */
75 static T_EEPROM_SPI spi_eeprom;
77 void *eeprom_spi_init(int *size)
79 /* reset eeprom state */
80 memset(&spi_eeprom, 0, sizeof(T_EEPROM_SPI));
82 spi_eeprom.state = GET_OPCODE;
85 *size = sizeof(T_EEPROM_SPI);
89 void eeprom_spi_write(unsigned char data)
91 /* Make sure !HOLD is high */
92 if (data & (1 << BIT_HOLD))
95 if (data & (1 << BIT_CS))
97 /* !CS high -> end of current operation */
98 spi_eeprom.cycles = 0;
100 spi_eeprom.opcode = 0;
101 spi_eeprom.state = GET_OPCODE;
105 /* !CS low -> process current operation */
106 switch (spi_eeprom.state)
110 /* latch data on CLK positive edge */
111 if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
113 /* 8-bit opcode buffer */
114 spi_eeprom.opcode |= ((data >> BIT_DATA) & 1);
118 if (spi_eeprom.cycles == 8)
120 /* reset cycles count */
121 spi_eeprom.cycles = 0;
123 /* Decode instruction */
124 switch (spi_eeprom.opcode)
129 spi_eeprom.buffer = 0;
130 spi_eeprom.state = WRITE_BYTE;
138 spi_eeprom.state = GET_ADDRESS;
146 spi_eeprom.state = GET_ADDRESS;
153 spi_eeprom.status &= ~0x02;
154 spi_eeprom.state = STANDBY;
161 spi_eeprom.buffer = spi_eeprom.status;
162 spi_eeprom.state = READ_BYTE;
169 spi_eeprom.status |= 0x02;
170 spi_eeprom.state = STANDBY;
176 /* specific instructions (not supported) */
177 spi_eeprom.state = STANDBY;
184 /* shift opcode value */
185 spi_eeprom.opcode = spi_eeprom.opcode << 1;
193 /* latch data on CLK positive edge */
194 if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
197 spi_eeprom.addr |= ((data >> BIT_DATA) & 1);
201 if (spi_eeprom.cycles == 16)
203 /* reset cycles count */
204 spi_eeprom.cycles = 0;
206 /* mask unused address bits */
207 spi_eeprom.addr &= SIZE_MASK;
210 if (spi_eeprom.opcode & 0x01)
213 spi_eeprom.buffer = Pico.sv.data[spi_eeprom.addr];
214 spi_eeprom.state = READ_BYTE;
218 /* WRITE operation */
219 spi_eeprom.buffer = 0;
220 spi_eeprom.state = WRITE_BYTE;
225 /* shift address value */
226 spi_eeprom.addr = spi_eeprom.addr << 1;
234 /* latch data on CLK positive edge */
235 if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
237 /* 8-bit data buffer */
238 spi_eeprom.buffer |= ((data >> BIT_DATA) & 1);
242 if (spi_eeprom.cycles == 8)
244 /* reset cycles count */
245 spi_eeprom.cycles = 0;
247 /* write data to destination */
248 if (spi_eeprom.opcode & 0x01)
250 /* update status register */
251 spi_eeprom.status = (spi_eeprom.status & 0x02) | (spi_eeprom.buffer & 0x0c);
253 /* wait for operation end */
254 spi_eeprom.state = STANDBY;
258 /* Memory Array (write-protected) */
259 if (spi_eeprom.status & 2)
261 /* check array protection bits (BP0, BP1) */
262 switch ((spi_eeprom.status >> 2) & 0x03)
266 /* $C000-$FFFF (sector #3) is protected */
267 if (spi_eeprom.addr < 0xC000)
269 Pico.sv.data[spi_eeprom.addr] = spi_eeprom.buffer;
276 /* $8000-$FFFF (sectors #2 and #3) is protected */
277 if (spi_eeprom.addr < 0x8000)
279 Pico.sv.data[spi_eeprom.addr] = spi_eeprom.buffer;
286 /* $0000-$FFFF (all sectors) is protected */
292 /* no sectors protected */
293 Pico.sv.data[spi_eeprom.addr] = spi_eeprom.buffer;
299 /* reset data buffer */
300 spi_eeprom.buffer = 0;
302 /* increase array address (sequential writes are limited within the same page) */
303 spi_eeprom.addr = (spi_eeprom.addr & ~PAGE_MASK) | ((spi_eeprom.addr + 1) & PAGE_MASK);
308 /* shift data buffer value */
309 spi_eeprom.buffer = spi_eeprom.buffer << 1;
317 /* output data on CLK positive edge */
318 if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk)
321 spi_eeprom.out = (spi_eeprom.buffer >> (7 - spi_eeprom.cycles)) & 1;
325 if (spi_eeprom.cycles == 8)
327 /* reset cycles count */
328 spi_eeprom.cycles = 0;
330 /* read from memory array ? */
331 if (spi_eeprom.opcode == 0x03)
333 /* read next array byte */
334 spi_eeprom.addr = (spi_eeprom.addr + 1) & SIZE_MASK;
335 spi_eeprom.buffer = Pico.sv.data[spi_eeprom.addr];
344 /* wait for !CS low->high transition */
351 /* update input lines */
352 spi_eeprom.cs = (data >> BIT_CS) & 1;
353 spi_eeprom.clk = (data >> BIT_CLK) & 1;
356 unsigned int eeprom_spi_read(unsigned int address)
358 return (spi_eeprom.out << BIT_DATA);