5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
9 #include "../pico_int.h"
10 #include "../sound/ym2612.h"
12 extern unsigned char formatted_bram[4*0x10];
14 static unsigned int m68k_cycle_mult;
16 void (*PicoMCDopenTray)(void) = NULL;
17 void (*PicoMCDcloseTray)(void) = NULL;
20 PICO_INTERNAL void PicoInitMCD(void)
27 PICO_INTERNAL void PicoExitMCD(void)
32 PICO_INTERNAL void PicoPowerMCD(void)
34 SekCycleCntS68k = SekCycleAimS68k = 0;
36 int fmt_size = sizeof(formatted_bram);
37 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
38 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
39 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
40 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
41 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
42 formatted_bram, fmt_size);
43 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
44 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
45 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
49 // cold reset state (tested)
50 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
51 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
52 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
53 memset(Pico_mcd->bios + 0x70, 0xff, 4);
56 void pcd_soft_reset(void)
58 // Reset_CD(); // breaks Fahrenheit CD swap
61 #ifdef _ASM_CD_MEMORY_C
62 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
65 pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
67 // TODO: test if register state/timers change
70 PICO_INTERNAL int PicoResetMCD(void)
72 // reset button doesn't affect MCD hardware
74 // use SRam.data for RAM cart
75 if (PicoOpt & POPT_EN_MCD_RAMCART) {
76 if (SRam.data == NULL)
77 SRam.data = calloc(1, 0x12000);
79 else if (SRam.data != NULL) {
83 SRam.start = SRam.end = 0; // unused
88 static __inline void SekRunS68k(unsigned int to)
93 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
96 if (SekShouldInterrupt())
97 Pico_mcd->m.s68k_poll_a = 0;
99 SekCycleCntS68k += cyc_do;
100 #if defined(EMU_C68K)
101 PicoCpuCS68k.cycles = cyc_do;
102 CycloneRun(&PicoCpuCS68k);
103 SekCycleCntS68k -= PicoCpuCS68k.cycles;
104 #elif defined(EMU_M68K)
105 m68k_set_context(&PicoCpuMS68k);
106 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
107 m68k_set_context(&PicoCpuMM68k);
108 #elif defined(EMU_F68K)
109 g_m68kcontext = &PicoCpuFS68k;
110 SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
111 g_m68kcontext = &PicoCpuFM68k;
115 static void pcd_set_cycle_mult(void)
117 // ~1.63 for NTSC, ~1.645 for PAL
119 m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
121 m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
124 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
126 return (long long)c * m68k_cycle_mult >> 16;
130 static void pcd_cdc_event(unsigned int now)
134 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
137 static void pcd_int3_timer_event(unsigned int now)
139 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
140 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
144 if (Pico_mcd->s68k_regs[0x31] != 0)
145 pcd_event_schedule(now, PCD_EVENT_TIMER3,
146 Pico_mcd->s68k_regs[0x31] * 384);
149 static void pcd_dma_event(unsigned int now)
151 int ddx = Pico_mcd->s68k_regs[4] & 7;
152 Update_CDC_TRansfer(ddx);
155 typedef void (event_cb)(unsigned int now);
157 /* times are in s68k (12.5MHz) cycles */
158 unsigned int pcd_event_times[PCD_EVENT_COUNT];
159 static unsigned int event_time_next;
160 static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
161 [PCD_EVENT_CDC] = pcd_cdc_event,
162 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
163 [PCD_EVENT_GFX] = gfx_update,
164 [PCD_EVENT_DMA] = pcd_dma_event,
167 void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
174 pcd_event_times[event] = 0;
180 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
181 pcd_event_times[event] = when;
183 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
184 event_time_next = when;
187 void pcd_event_schedule_s68k(enum pcd_event event, int after)
189 if (SekCyclesLeftS68k > after)
190 SekEndRunS68k(after);
192 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
195 static void pcd_run_events(unsigned int until)
197 int oldest, oldest_diff, time;
201 oldest = -1, oldest_diff = 0x7fffffff;
203 for (i = 0; i < PCD_EVENT_COUNT; i++) {
204 if (pcd_event_times[i]) {
205 diff = pcd_event_times[i] - until;
206 if (diff < oldest_diff) {
213 if (oldest_diff <= 0) {
214 time = pcd_event_times[oldest];
215 pcd_event_times[oldest] = 0;
216 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
217 pcd_event_cbs[oldest](time);
219 else if (oldest_diff < 0x7fffffff) {
220 event_time_next = pcd_event_times[oldest];
230 elprintf(EL_CD, "cd: next event #%d at %u",
231 oldest, event_time_next);
234 int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
236 #define now SekCycleCntS68k
237 unsigned int s68k_target =
238 (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
241 elprintf(EL_CD, "s68k sync to %u, %u->%u",
242 m68k_target, now, s68k_target);
244 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
245 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
246 pcd_run_events(m68k_target);
250 while (CYCLES_GT(s68k_target, now)) {
251 if (event_time_next && CYCLES_GE(now, event_time_next))
254 target = s68k_target;
255 if (event_time_next && CYCLES_GT(target, event_time_next))
256 target = event_time_next;
259 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
263 return s68k_target - now;
267 #define pcd_run_cpus_normal pcd_run_cpus
268 //#define pcd_run_cpus_lockstep pcd_run_cpus
270 static void SekSyncM68k(void);
272 void pcd_run_cpus_normal(int m68k_cycles)
274 SekCycleAim += m68k_cycles;
275 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
276 Pico_mcd->m.m68k_poll_cnt = 0;
277 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
278 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
279 if (s68k_left <= 0) {
280 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
281 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
282 SekCycleCnt = SekCycleAim;
285 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
291 void pcd_run_cpus_lockstep(int m68k_cycles)
293 unsigned int target = SekCycleAim + m68k_cycles;
297 pcd_sync_s68k(SekCycleAim, 0);
298 } while (CYCLES_GT(target, SekCycleAim));
300 SekCycleAim = target;
304 #define CPUS_RUN(m68k_cycles) \
305 pcd_run_cpus(m68k_cycles)
307 #include "../pico_cmn.c"
310 PICO_INTERNAL void PicoFrameMCD(void)
312 if (!(PicoOpt&POPT_ALT_RENDERER))
315 pcd_set_cycle_mult();
319 void pcd_state_loaded(void)
324 pcd_set_cycle_mult();
325 pcd_state_loaded_mem();
327 memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
328 Pico_mcd->pcm_mixbuf_dirty = 0;
329 Pico_mcd->pcm_mixpos = 0;
330 Pico_mcd->pcm_regs_dirty = 1;
333 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
334 diff = cycles - SekCycleAimS68k;
335 if (diff < -1000 || diff > 1000) {
336 SekCycleCntS68k = SekCycleAimS68k = cycles;
338 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
339 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
341 if (Pico_mcd->s68k_regs[0x31])
342 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
343 Pico_mcd->s68k_regs[0x31] * 384);
345 if (Pico_mcd->scd.Status_CDC & 0x08)
346 Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
349 diff = cycles - Pico_mcd->pcm.update_cycles;
350 if ((unsigned int)diff > 12500000/50)
351 Pico_mcd->pcm.update_cycles = cycles;
355 pcd_run_events(SekCycleCntS68k);
358 // vim:shiftwidth=2:ts=2:expandtab