5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
9 #include "../pico_int.h"
10 #include "../sound/ym2612.h"
12 extern unsigned char formatted_bram[4*0x10];
14 static unsigned int m68k_cycle_mult;
16 void (*PicoMCDopenTray)(void) = NULL;
17 void (*PicoMCDcloseTray)(void) = NULL;
20 PICO_INTERNAL void PicoInitMCD(void)
26 PICO_INTERNAL void PicoExitMCD(void)
31 PICO_INTERNAL void PicoPowerMCD(void)
33 int fmt_size = sizeof(formatted_bram);
34 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
35 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
36 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
37 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
38 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
39 formatted_bram, fmt_size);
40 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
41 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
42 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
44 // cold reset state (tested)
45 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
46 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
47 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
48 Pico_mcd->s68k_regs[6] = 0xff;
49 Pico_mcd->s68k_regs[7] = 0xff;
50 memset(Pico_mcd->bios + 0x70, 0xff, 4);
53 PICO_INTERNAL int PicoResetMCD(void)
59 #ifdef _ASM_CD_MEMORY_C
60 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
63 // use SRam.data for RAM cart
64 if (PicoOpt & POPT_EN_MCD_RAMCART) {
65 if (SRam.data == NULL)
66 SRam.data = calloc(1, 0x12000);
68 else if (SRam.data != NULL) {
72 SRam.start = SRam.end = 0; // unused
74 pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75);
79 static __inline void SekRunS68k(unsigned int to)
84 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
87 SekCycleCntS68k += cyc_do;
89 PicoCpuCS68k.cycles = cyc_do;
90 CycloneRun(&PicoCpuCS68k);
91 SekCycleCntS68k -= PicoCpuCS68k.cycles;
92 #elif defined(EMU_M68K)
93 m68k_set_context(&PicoCpuMS68k);
94 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
95 m68k_set_context(&PicoCpuMM68k);
96 #elif defined(EMU_F68K)
97 g_m68kcontext = &PicoCpuFS68k;
98 SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
99 g_m68kcontext = &PicoCpuFM68k;
104 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
106 return (long long)c * m68k_cycle_mult >> 16;
110 static void pcd_cdc_event(unsigned int now)
114 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
117 static void pcd_int3_timer_event(unsigned int now)
119 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
120 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
124 if (Pico_mcd->s68k_regs[0x31] != 0)
125 pcd_event_schedule(now, PCD_EVENT_TIMER3,
126 Pico_mcd->s68k_regs[0x31] * 384);
129 static void pcd_gfx_event(unsigned int now)
132 if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
133 Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
134 Pico_mcd->rot_comp.Reg_64 = 0;
135 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) {
136 elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1");
142 static void pcd_dma_event(unsigned int now)
144 int ddx = Pico_mcd->s68k_regs[4] & 7;
145 Update_CDC_TRansfer(ddx);
148 typedef void (event_cb)(unsigned int now);
150 /* times are in s68k (12.5MHz) cycles */
151 unsigned int pcd_event_times[PCD_EVENT_COUNT];
152 static unsigned int event_time_next;
153 static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
154 [PCD_EVENT_CDC] = pcd_cdc_event,
155 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
156 [PCD_EVENT_GFX] = pcd_gfx_event,
157 [PCD_EVENT_DMA] = pcd_dma_event,
160 void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
167 pcd_event_times[event] = 0;
173 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
174 pcd_event_times[event] = when;
176 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
177 event_time_next = when;
180 void pcd_event_schedule_s68k(enum pcd_event event, int after)
182 if (SekCyclesLeftS68k > after)
183 SekEndRunS68k(after);
185 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
188 static void pcd_run_events(unsigned int until)
190 int oldest, oldest_diff, time;
194 oldest = -1, oldest_diff = 0x7fffffff;
196 for (i = 0; i < PCD_EVENT_COUNT; i++) {
197 if (pcd_event_times[i]) {
198 diff = pcd_event_times[i] - until;
199 if (diff < oldest_diff) {
206 if (oldest_diff <= 0) {
207 time = pcd_event_times[oldest];
208 pcd_event_times[oldest] = 0;
209 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
210 pcd_event_cbs[oldest](time);
212 else if (oldest_diff < 0x7fffffff) {
213 event_time_next = pcd_event_times[oldest];
223 elprintf(EL_CD, "cd: next event #%d at %u",
224 oldest, event_time_next);
227 int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
229 #define now SekCycleCntS68k
230 unsigned int s68k_target =
231 (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
234 elprintf(EL_CD, "s68k sync to %u, %u->%u",
235 m68k_target, now, s68k_target);
237 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
238 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
239 pcd_run_events(m68k_target);
243 while (CYCLES_GT(s68k_target, now)) {
244 if (event_time_next && CYCLES_GE(now, event_time_next))
247 target = s68k_target;
248 if (event_time_next && CYCLES_GT(target, event_time_next))
249 target = event_time_next;
252 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
256 return s68k_target - now;
260 #define pcd_run_cpus_normal pcd_run_cpus
261 //#define pcd_run_cpus_lockstep pcd_run_cpus
263 static void SekSyncM68k(void);
265 static inline void pcd_run_cpus_normal(int m68k_cycles)
267 SekCycleAim += m68k_cycles;
268 if (Pico_mcd->m.m68k_poll_cnt >= 16 && !SekShouldInterrupt()) {
269 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
270 if (s68k_left <= 0) {
271 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
272 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
273 SekCycleCnt = SekCycleAim;
276 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
282 static inline void pcd_run_cpus_lockstep(int m68k_cycles)
284 unsigned int target = SekCycleAim + m68k_cycles;
288 pcd_sync_s68k(SekCycleAim, 0);
289 } while (CYCLES_GT(target, SekCycleAim));
293 #define CPUS_RUN(m68k_cycles) \
294 pcd_run_cpus(m68k_cycles)
296 #include "../pico_cmn.c"
299 PICO_INTERNAL void PicoFrameMCD(void)
301 if (!(PicoOpt&POPT_ALT_RENDERER))
304 // ~1.63 for NTSC, ~1.645 for PAL
306 m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
308 m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
313 void pcd_state_loaded(void)
318 pcd_state_loaded_mem();
321 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
322 diff = cycles - SekCycleAimS68k;
323 if (diff < -1000 || diff > 1000) {
324 SekCycleCntS68k = SekCycleAimS68k = cycles;
326 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
327 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
329 if (Pico_mcd->s68k_regs[0x31])
330 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
331 Pico_mcd->s68k_regs[0x31] * 384);
333 if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
334 Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
335 Pico_mcd->rot_comp.Reg_64 = 0;
336 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1)
339 if (Pico_mcd->scd.Status_CDC & 0x08)
340 Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
344 // vim:shiftwidth=2:ts=2:expandtab