1 // Memory I/O handlers for Sega/Mega CD.
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2 // Loosely based on Gens code.
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3 // (c) Copyright 2007, Grazvydas "notaz" Ignotas
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6 #include "../pico_int.h"
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8 #include "../sound/ym2612.h"
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9 #include "../sound/sn76496.h"
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14 #ifndef UTYPES_DEFINED
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15 typedef unsigned char u8;
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16 typedef unsigned short u16;
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17 typedef unsigned int u32;
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18 #define UTYPES_DEFINED
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26 //#define rdprintf dprintf
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27 #define rdprintf(...)
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28 //#define wrdprintf dprintf
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29 #define wrdprintf(...)
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30 //#define r3printf elprintf
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31 #define r3printf(...)
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34 #ifdef EMU_CORE_DEBUG
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35 extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];
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36 extern int lrp_cyc, lwp_cyc;
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37 #undef USE_POLL_DETECT
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40 // -----------------------------------------------------------------
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43 #define POLL_LIMIT 16
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44 #define POLL_CYCLES 124
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45 // int m68k_poll_addr, m68k_poll_cnt;
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46 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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48 #ifndef _ASM_CD_MEMORY_C
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49 static u32 m68k_reg_read16(u32 a)
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53 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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57 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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60 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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61 r3printf(EL_STATUS, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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64 d = Pico_mcd->s68k_regs[4]<<8;
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67 d = *(u16 *)(Pico_mcd->bios + 0x72);
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70 d = Read_CDC_Host(0);
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73 elprintf(EL_UIO, "m68k FIXME: reserved read");
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76 d = Pico_mcd->m.timer_stopwatch >> 16;
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77 dprintf("m68k stopwatch timer read (%04x)", d);
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82 // comm flag/cmd/status (0xE-0x2F)
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83 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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87 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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95 #ifndef _ASM_CD_MEMORY_C
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98 void m68k_reg_write8(u32 a, u32 d)
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101 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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106 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
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110 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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111 if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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112 if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
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113 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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114 SekResetS68k(); // S68k comes out of RESET or BRQ state
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115 Pico_mcd->m.state_flags&=~1;
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116 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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118 Pico_mcd->m.busreq = d;
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121 dprintf("m68k: prg wp=%02x", d);
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122 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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125 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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126 r3printf(EL_STATUS, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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128 if ((dold>>6) != ((d>>6)&3))
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129 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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130 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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131 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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132 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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133 if (dold & 4) { // 1M mode
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134 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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136 if ((d ^ dold) & d & 2) { // DMNA is being set
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137 dold &= ~1; // return word RAM to s68k
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138 /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
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139 SekEndRun(20+16+10+12+16);
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142 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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143 #ifdef USE_POLL_DETECT
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144 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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145 SekSetStopS68k(0); s68k_poll_adclk = 0;
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146 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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152 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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155 Pico_mcd->bios[0x72] = d;
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156 dprintf("hint vector set to %08x", PicoRead32(0x70));
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159 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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161 //dprintf("m68k: comm flag: %02x", d);
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162 Pico_mcd->s68k_regs[0xe] = d;
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163 #ifdef USE_POLL_DETECT
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164 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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165 SekSetStopS68k(0); s68k_poll_adclk = 0;
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166 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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172 if ((a&0xf0) == 0x10) {
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173 Pico_mcd->s68k_regs[a] = d;
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174 #ifdef USE_POLL_DETECT
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175 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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176 SekSetStopS68k(0); s68k_poll_adclk = 0;
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177 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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183 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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186 #ifndef _ASM_CD_MEMORY_C
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189 u32 s68k_poll_detect(u32 a, u32 d)
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191 #ifdef USE_POLL_DETECT
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192 // needed mostly for Cyclone, which doesn't always check it's cycle counter
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193 if (SekIsStoppedS68k()) return d;
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194 // polling detection
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195 if (a == (s68k_poll_adclk&0xff)) {
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196 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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197 if (clkdiff <= POLL_CYCLES) {
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199 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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200 if (s68k_poll_cnt > POLL_LIMIT) {
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202 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
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204 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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214 #define READ_FONT_DATA(basemask) \
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216 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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217 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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218 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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219 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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220 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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221 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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225 #ifndef _ASM_CD_MEMORY_C
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228 u32 s68k_reg_read16(u32 a)
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232 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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236 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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238 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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239 r3printf(EL_STATUS, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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240 return s68k_poll_detect(a, d);
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242 return CDC_Read_Reg();
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244 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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246 d = Pico_mcd->m.timer_stopwatch >> 16;
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247 dprintf("s68k stopwatch timer read (%04x)", d);
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250 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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251 return Pico_mcd->s68k_regs[31];
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252 case 0x34: // fader
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253 return 0; // no busy bit
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254 case 0x50: // font data (check: Lunar 2, Silpheed)
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255 READ_FONT_DATA(0x00100000);
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258 READ_FONT_DATA(0x00010000);
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261 READ_FONT_DATA(0x10000000);
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264 READ_FONT_DATA(0x01000000);
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268 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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270 if (a >= 0x0e && a < 0x30)
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271 return s68k_poll_detect(a, d);
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276 #ifndef _ASM_CD_MEMORY_C
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279 void s68k_reg_write8(u32 a, u32 d)
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281 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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283 // Warning: d might have upper bits set
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286 return; // only m68k can change WP
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288 int dold = Pico_mcd->s68k_regs[3];
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289 r3printf(EL_STATUS, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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294 if ((d ^ dold) & 5) {
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295 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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298 #ifdef _ASM_CD_MEMORY_C
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299 if ((d ^ dold) & 0x1d)
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300 PicoMemResetCDdecode(d);
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303 r3printf(EL_STATUS, "wram mode 2M->1M");
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304 wram_2M_to_1M(Pico_mcd->word_ram2M);
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310 r3printf(EL_STATUS, "wram mode 1M->2M");
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311 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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313 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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315 wram_1M_to_2M(Pico_mcd->word_ram2M);
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318 // s68k can only set RET, writing 0 has no effect
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319 else if ((dold ^ d) & d & 1) { // RET being set
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320 SekEndRunS68k(20+16+10+12+16); // see DMNA case
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324 d &= ~2; // DMNA clears
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329 dprintf("s68k CDC dest: %x", d&7);
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330 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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333 //dprintf("s68k CDC reg addr: %x", d&0xf);
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339 dprintf("s68k set CDC dma addr");
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343 dprintf("s68k set stopwatch timer");
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344 Pico_mcd->m.timer_stopwatch = 0;
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347 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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350 dprintf("s68k set int3 timer: %02x", d);
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351 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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353 case 0x33: // IRQ mask
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354 dprintf("s68k irq mask: %02x", d);
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355 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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356 CDD_Export_Status();
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359 case 0x34: // fader
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360 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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363 return; // d/m bit is unsetable
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365 u32 d_old = Pico_mcd->s68k_regs[0x37];
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366 Pico_mcd->s68k_regs[0x37] = d&7;
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367 if ((d&4) && !(d_old&4)) {
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368 CDD_Export_Status();
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373 Pico_mcd->s68k_regs[a] = (u8) d;
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374 CDD_Import_Command();
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378 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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380 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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384 Pico_mcd->s68k_regs[a] = (u8) d;
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388 static u32 OtherRead16End(u32 a, int realsize)
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392 #ifndef _ASM_CD_MEMORY_C
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393 if ((a&0xffffc0)==0xa12000) {
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394 d=m68k_reg_read16(a);
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399 if (SRam.data != NULL) d=3; // 64k cart
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403 if ((a&0xfe0000)==0x600000) {
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404 if (SRam.data != NULL) {
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405 d=SRam.data[((a>>1)&0xffff)+0x2000];
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406 if (realsize == 8) d|=d<<8;
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412 d=Pico_mcd->m.bcram_reg;
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417 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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419 #ifndef _ASM_CD_MEMORY_C
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426 static void OtherWrite8End(u32 a, u32 d, int realsize)
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428 #ifndef _ASM_CD_MEMORY_C
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429 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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431 if ((a&0xfe0000)==0x600000) {
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432 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {
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433 SRam.data[((a>>1)&0xffff)+0x2000]=d;
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440 Pico_mcd->m.bcram_reg=d;
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445 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
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448 #ifndef _ASM_CD_MEMORY_C
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449 #define _CD_MEMORY_C
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450 #undef _ASM_MEMORY_C
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451 #include "../memory_cmn.c"
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452 #include "cell_map.c"
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456 // -----------------------------------------------------------------
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457 // Read Rom and read Ram
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459 #ifdef _ASM_CD_MEMORY_C
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460 u32 PicoReadM68k8(u32 a);
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462 u32 PicoReadM68k8(u32 a)
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470 case 0x00>>1: // BIOS: 000000 - 020000
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471 d = *(u8 *)(Pico_mcd->bios+(a^1));
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473 case 0x02>>1: // prg RAM
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474 if ((Pico_mcd->m.busreq&3)!=1) {
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475 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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476 d = *(prg_bank+((a^1)&0x1ffff));
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479 case 0x20>>1: // word RAM: 200000 - 220000
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480 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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482 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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483 int bank = Pico_mcd->s68k_regs[3]&1;
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484 d = Pico_mcd->word_ram1M[bank][a^1];
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486 // allow access in any mode, like Gens does
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487 d = Pico_mcd->word_ram2M[a^1];
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489 wrdprintf("ret = %02x", (u8)d);
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491 case 0x22>>1: // word RAM: 220000 - 240000
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492 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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493 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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494 int bank = Pico_mcd->s68k_regs[3]&1;
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495 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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496 d = Pico_mcd->word_ram1M[bank][a^1];
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498 // allow access in any mode, like Gens does
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499 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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501 wrdprintf("ret = %02x", (u8)d);
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503 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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504 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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505 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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506 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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508 if ((a&0xe700e0)==0xc00000)
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509 d=PicoVideoRead8(a);
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511 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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512 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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513 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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514 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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516 d = *(u8 *)(Pico.ram+((a^1)&0xffff));
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519 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram
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520 if ((a&0xffffc0)==0xa12000)
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521 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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523 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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525 if ((a&0xffffc0)==0xa12000)
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526 rdprintf("ret = %02x", (u8)d);
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531 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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532 #ifdef EMU_CORE_DEBUG
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533 if (a>=Pico.romsize) {
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535 lastread_d[lrp_cyc++&15] = d;
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543 #ifdef _ASM_CD_MEMORY_C
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544 u32 PicoReadM68k16(u32 a);
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546 static u32 PicoReadM68k16(u32 a)
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554 case 0x00>>1: // BIOS: 000000 - 020000
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555 d = *(u16 *)(Pico_mcd->bios+a);
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557 case 0x02>>1: // prg RAM
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558 if ((Pico_mcd->m.busreq&3)!=1) {
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559 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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560 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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561 d = *(u16 *)(prg_bank+(a&0x1fffe));
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562 wrdprintf("ret = %04x", d);
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565 case 0x20>>1: // word RAM: 200000 - 220000
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566 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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568 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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569 int bank = Pico_mcd->s68k_regs[3]&1;
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570 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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572 // allow access in any mode, like Gens does
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573 d = *(u16 *)(Pico_mcd->word_ram2M+a);
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575 wrdprintf("ret = %04x", d);
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577 case 0x22>>1: // word RAM: 220000 - 240000
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578 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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579 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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580 int bank = Pico_mcd->s68k_regs[3]&1;
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581 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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582 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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584 // allow access in any mode, like Gens does
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585 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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587 wrdprintf("ret = %04x", d);
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589 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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590 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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591 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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592 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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594 if ((a&0xe700e0)==0xc00000)
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595 d=PicoVideoRead(a);
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597 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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598 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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599 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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600 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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602 d=*(u16 *)(Pico.ram+(a&0xfffe));
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605 if ((a&0xffffc0)==0xa12000)
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606 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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608 d = OtherRead16(a, 16);
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610 if ((a&0xffffc0)==0xa12000)
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611 rdprintf("ret = %04x", d);
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616 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
617 #ifdef EMU_CORE_DEBUG
\r
618 if (a>=Pico.romsize) {
\r
620 lastread_d[lrp_cyc++&15] = d;
\r
628 #ifdef _ASM_CD_MEMORY_C
\r
629 u32 PicoReadM68k32(u32 a);
\r
631 static u32 PicoReadM68k32(u32 a)
\r
639 case 0x00>>1: { // BIOS: 000000 - 020000
\r
640 u16 *pm=(u16 *)(Pico_mcd->bios+a);
\r
641 d = (pm[0]<<16)|pm[1];
\r
644 case 0x02>>1: // prg RAM
\r
645 if ((Pico_mcd->m.busreq&3)!=1) {
\r
646 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
647 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
648 d = (pm[0]<<16)|pm[1];
\r
651 case 0x20>>1: // word RAM: 200000 - 220000
\r
652 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
654 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
655 int bank = Pico_mcd->s68k_regs[3]&1;
\r
656 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);
\r
657 d = (pm[0]<<16)|pm[1];
\r
659 // allow access in any mode, like Gens does
\r
660 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);
\r
661 d = (pm[0]<<16)|pm[1];
\r
663 wrdprintf("ret = %08x", d);
\r
665 case 0x22>>1: // word RAM: 220000 - 240000
\r
666 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
667 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?
\r
669 int bank = Pico_mcd->s68k_regs[3]&1;
\r
670 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
671 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
673 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
\r
674 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
\r
676 // allow access in any mode, like Gens does
\r
677 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
678 d = (pm[0]<<16)|pm[1];
\r
680 wrdprintf("ret = %08x", d);
\r
682 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
\r
683 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
\r
684 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
\r
685 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
\r
687 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);
\r
689 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
\r
690 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
\r
691 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
\r
692 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {
\r
694 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
695 d = (pm[0]<<16)|pm[1];
\r
699 if ((a&0xffffc0)==0xa12000)
\r
700 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
\r
702 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
704 if ((a&0xffffc0)==0xa12000)
\r
705 rdprintf("ret = %08x", d);
\r
710 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
711 #ifdef EMU_CORE_DEBUG
\r
712 if (a>=Pico.romsize) {
\r
714 lastread_d[lrp_cyc++&15] = d;
\r
722 // -----------------------------------------------------------------
\r
724 #ifdef _ASM_CD_MEMORY_C
\r
725 void PicoWriteM68k8(u32 a,u8 d);
\r
727 void PicoWriteM68k8(u32 a,u8 d)
\r
729 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
730 #ifdef EMU_CORE_DEBUG
\r
731 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
734 if ((a&0xe00000)==0xe00000) { // Ram
\r
735 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
740 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
741 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
742 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
749 if ((a&0xfc0000)==0x200000) {
\r
750 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
751 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
752 int bank = Pico_mcd->s68k_regs[3]&1;
\r
754 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
756 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
\r
758 // allow access in any mode, like Gens does
\r
759 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
764 if ((a&0xffffc0)==0xa12000) {
\r
765 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
766 m68k_reg_write8(a, d);
\r
775 #ifdef _ASM_CD_MEMORY_C
\r
776 void PicoWriteM68k16(u32 a,u16 d);
\r
778 static void PicoWriteM68k16(u32 a,u16 d)
\r
780 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);
\r
781 #ifdef EMU_CORE_DEBUG
\r
782 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
785 if ((a&0xe00000)==0xe00000) { // Ram
\r
786 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
791 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
792 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
793 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
794 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
801 if ((a&0xfc0000)==0x200000) {
\r
802 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
803 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
804 int bank = Pico_mcd->s68k_regs[3]&1;
\r
806 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
808 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
810 // allow access in any mode, like Gens does
\r
811 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
817 if ((a&0xffffc0)==0xa12000) {
\r
818 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
819 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
820 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
821 #ifdef USE_POLL_DETECT
\r
822 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
823 SekSetStopS68k(0); s68k_poll_adclk = 0;
\r
824 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
\r
829 m68k_reg_write8(a, d>>8);
\r
830 m68k_reg_write8(a+1,d&0xff);
\r
835 if ((a&0xe700e0)==0xc00000) {
\r
836 PicoVideoWrite(a,(u16)d);
\r
845 #ifdef _ASM_CD_MEMORY_C
\r
846 void PicoWriteM68k32(u32 a,u32 d);
\r
848 static void PicoWriteM68k32(u32 a,u32 d)
\r
850 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);
\r
851 #ifdef EMU_CORE_DEBUG
\r
852 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
855 if ((a&0xe00000)==0xe00000)
\r
858 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
859 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
864 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
865 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
866 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
867 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
874 if ((a&0xfc0000)==0x200000) {
\r
875 if (d != 0) // don't log clears
\r
876 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
877 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
878 int bank = Pico_mcd->s68k_regs[3]&1;
\r
879 if (a >= 0x220000) { // cell arranged
\r
881 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
882 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
884 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
885 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
887 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
888 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
891 // allow access in any mode, like Gens does
\r
892 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
893 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
898 if ((a&0xffffc0)==0xa12000) {
\r
899 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
900 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);
\r
904 if ((a&0xe700e0)==0xc00000)
\r
906 PicoVideoWrite(a, (u16)(d>>16));
\r
907 PicoVideoWrite(a+2,(u16)d);
\r
911 OtherWrite16(a, (u16)(d>>16));
\r
912 OtherWrite16(a+2,(u16)d);
\r
917 // -----------------------------------------------------------------
\r
919 // -----------------------------------------------------------------
\r
921 #ifdef _ASM_CD_MEMORY_C
\r
922 u32 PicoReadS68k8(u32 a);
\r
924 static u32 PicoReadS68k8(u32 a)
\r
928 #ifdef EMU_CORE_DEBUG
\r
935 d = *(Pico_mcd->prg_ram+(a^1));
\r
940 if ((a&0xfffe00) == 0xff8000) {
\r
942 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
943 if (a >= 0x0e && a < 0x30) {
\r
944 d = Pico_mcd->s68k_regs[a];
\r
945 s68k_poll_detect(a, d);
\r
946 rdprintf("ret = %02x", (u8)d);
\r
949 else if (a >= 0x58 && a < 0x68)
\r
950 d = gfx_cd_read(a&~1);
\r
951 else d = s68k_reg_read16(a&~1);
\r
952 if ((a&1)==0) d>>=8;
\r
953 rdprintf("ret = %02x", (u8)d);
\r
957 // word RAM (2M area)
\r
958 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
959 // test: batman returns
\r
960 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
961 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
962 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
963 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
964 if (a&1) d &= 0x0f;
\r
967 // allow access in any mode, like Gens does
\r
968 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
970 wrdprintf("ret = %02x", (u8)d);
\r
974 // word RAM (1M area)
\r
975 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
977 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
978 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
979 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
980 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
981 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
982 wrdprintf("ret = %02x", (u8)d);
\r
987 if ((a&0xff8000)==0xff0000) {
\r
988 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
991 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
992 else if (a >= 0x20) {
\r
994 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
995 if (a & 2) d >>= 8;
\r
997 elprintf(EL_IO, "ret = %02x", (u8)d);
\r
1002 if ((a&0xff0000)==0xfe0000) {
\r
1003 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
1007 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
1011 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
1012 #ifdef EMU_CORE_DEBUG
\r
1014 lastread_d[lrp_cyc++&15] = d;
\r
1021 #ifdef _ASM_CD_MEMORY_C
\r
1022 u32 PicoReadS68k16(u32 a);
\r
1024 static u32 PicoReadS68k16(u32 a)
\r
1028 #ifdef EMU_CORE_DEBUG
\r
1029 u32 ab=a&0xfffffe;
\r
1034 if (a < 0x80000) {
\r
1035 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
1036 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
1037 wrdprintf("ret = %04x", d);
\r
1042 if ((a&0xfffe00) == 0xff8000) {
\r
1044 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
1045 if (a >= 0x58 && a < 0x68)
\r
1046 d = gfx_cd_read(a);
\r
1047 else d = s68k_reg_read16(a);
\r
1048 rdprintf("ret = %04x", d);
\r
1052 // word RAM (2M area)
\r
1053 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1054 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
1055 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1056 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1057 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
1058 d |= d << 4; d &= ~0xf0;
\r
1060 // allow access in any mode, like Gens does
\r
1061 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1063 wrdprintf("ret = %04x", d);
\r
1067 // word RAM (1M area)
\r
1068 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1070 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
1071 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1072 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1073 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1074 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1075 wrdprintf("ret = %04x", d);
\r
1080 if ((a&0xff0000)==0xfe0000) {
\r
1081 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
1082 a = (a>>1)&0x1fff;
\r
1083 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
1084 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
1085 dprintf("ret = %04x", d);
\r
1090 if ((a&0xff8000)==0xff0000) {
\r
1091 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
1094 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
1095 else if (a >= 0x20) {
\r
1097 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1098 if (a & 2) d >>= 8;
\r
1100 dprintf("ret = %04x", d);
\r
1104 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1108 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1109 #ifdef EMU_CORE_DEBUG
\r
1111 lastread_d[lrp_cyc++&15] = d;
\r
1118 #ifdef _ASM_CD_MEMORY_C
\r
1119 u32 PicoReadS68k32(u32 a);
\r
1121 static u32 PicoReadS68k32(u32 a)
\r
1125 #ifdef EMU_CORE_DEBUG
\r
1126 u32 ab=a&0xfffffe;
\r
1131 if (a < 0x80000) {
\r
1132 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1133 d = (pm[0]<<16)|pm[1];
\r
1138 if ((a&0xfffe00) == 0xff8000) {
\r
1140 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
1141 if (a >= 0x58 && a < 0x68)
\r
1142 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
1143 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
1144 rdprintf("ret = %08x", d);
\r
1148 // word RAM (2M area)
\r
1149 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1150 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
1151 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1152 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1154 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
1155 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
1156 d |= d << 4; d &= 0x0f0f0f0f;
\r
1158 // allow access in any mode, like Gens does
\r
1159 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
1161 wrdprintf("ret = %08x", d);
\r
1165 // word RAM (1M area)
\r
1166 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1169 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1170 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1171 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1172 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1173 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1174 wrdprintf("ret = %08x", d);
\r
1179 if ((a&0xff8000)==0xff0000) {
\r
1180 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1182 if (a >= 0x2000) {
\r
1184 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1185 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1186 } else if (a >= 0x20) {
\r
1190 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1191 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1193 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1194 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1197 dprintf("ret = %08x", d);
\r
1202 if ((a&0xff0000)==0xfe0000) {
\r
1203 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1204 a = (a>>1)&0x1fff;
\r
1205 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1206 d|= Pico_mcd->bram[a++] << 24;
\r
1207 d|= Pico_mcd->bram[a++];
\r
1208 d|= Pico_mcd->bram[a++] << 8;
\r
1209 dprintf("ret = %08x", d);
\r
1213 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1217 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1218 #ifdef EMU_CORE_DEBUG
\r
1219 if (ab > 0x78) { // not vectors and stuff
\r
1221 lastread_d[lrp_cyc++&15] = d;
\r
1229 #ifndef _ASM_CD_MEMORY_C
\r
1230 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1231 static void decode_write8(u32 a, u8 d, int r3)
\r
1233 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1234 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1238 if (!(a&1)) d <<= 4;
\r
1241 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1242 } else if (r3 > 8) {
\r
1243 if (d) goto do_it;
\r
1250 *pd = d | (*pd & oldmask);
\r
1254 static void decode_write16(u32 a, u16 d, int r3)
\r
1256 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1258 //if ((a & 0x3ffff) < 0x28000) return;
\r
1266 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1267 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1269 } else if (r3 > 8) {
\r
1271 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1272 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1280 // -----------------------------------------------------------------
\r
1282 #ifdef _ASM_CD_MEMORY_C
\r
1283 void PicoWriteS68k8(u32 a,u8 d);
\r
1285 static void PicoWriteS68k8(u32 a,u8 d)
\r
1287 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1291 #ifdef EMU_CORE_DEBUG
\r
1292 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1296 if (a < 0x80000) {
\r
1297 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1298 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;
\r
1303 if ((a&0xfffe00) == 0xff8000) {
\r
1305 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1306 if (a >= 0x58 && a < 0x68)
\r
1307 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1308 else s68k_reg_write8(a,d);
\r
1312 // word RAM (2M area)
\r
1313 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1314 int r3 = Pico_mcd->s68k_regs[3];
\r
1315 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1316 if (r3 & 4) { // 1M decode mode?
\r
1317 decode_write8(a, d, r3);
\r
1319 // allow access in any mode, like Gens does
\r
1320 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1325 // word RAM (1M area)
\r
1326 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1327 // Wing Commander tries to write here in wrong mode
\r
1330 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1331 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1332 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1333 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1334 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1339 if ((a&0xff8000)==0xff0000) {
\r
1342 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1343 else if (a < 0x12)
\r
1344 pcm_write(a>>1, d);
\r
1349 if ((a&0xff0000)==0xfe0000) {
\r
1350 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1355 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1360 #ifdef _ASM_CD_MEMORY_C
\r
1361 void PicoWriteS68k16(u32 a,u16 d);
\r
1363 static void PicoWriteS68k16(u32 a,u16 d)
\r
1365 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1369 #ifdef EMU_CORE_DEBUG
\r
1370 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1374 if (a < 0x80000) {
\r
1375 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1376 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer
\r
1377 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1382 if ((a&0xfffe00) == 0xff8000) {
\r
1384 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1385 if (a >= 0x58 && a < 0x68)
\r
1386 gfx_cd_write16(a, d);
\r
1388 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1389 Pico_mcd->s68k_regs[0xf] = d;
\r
1392 s68k_reg_write8(a, d>>8);
\r
1393 s68k_reg_write8(a+1,d&0xff);
\r
1398 // word RAM (2M area)
\r
1399 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1400 int r3 = Pico_mcd->s68k_regs[3];
\r
1401 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1402 if (r3 & 4) { // 1M decode mode?
\r
1403 decode_write16(a, d, r3);
\r
1405 // allow access in any mode, like Gens does
\r
1406 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1411 // word RAM (1M area)
\r
1412 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1415 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1416 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1417 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1418 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1419 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1424 if ((a&0xff8000)==0xff0000) {
\r
1427 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1428 else if (a < 0x12)
\r
1429 pcm_write(a>>1, d & 0xff);
\r
1434 if ((a&0xff0000)==0xfe0000) {
\r
1435 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1436 a = (a>>1)&0x1fff;
\r
1437 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1438 Pico_mcd->bram[a++] = d >> 8;
\r
1443 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1448 #ifdef _ASM_CD_MEMORY_C
\r
1449 void PicoWriteS68k32(u32 a,u32 d);
\r
1451 static void PicoWriteS68k32(u32 a,u32 d)
\r
1453 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1457 #ifdef EMU_CORE_DEBUG
\r
1458 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1462 if (a < 0x80000) {
\r
1463 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {
\r
1464 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1465 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1471 if ((a&0xfffe00) == 0xff8000) {
\r
1473 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1474 if (a >= 0x58 && a < 0x68) {
\r
1475 gfx_cd_write16(a, d>>16);
\r
1476 gfx_cd_write16(a+2, d&0xffff);
\r
1478 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);
\r
1479 s68k_reg_write8(a, d>>24);
\r
1480 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1481 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1482 s68k_reg_write8(a+3, d &0xff);
\r
1487 // word RAM (2M area)
\r
1488 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1489 int r3 = Pico_mcd->s68k_regs[3];
\r
1490 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1491 if (r3 & 4) { // 1M decode mode?
\r
1492 decode_write16(a , d >> 16, r3);
\r
1493 decode_write16(a+2, d , r3);
\r
1495 // allow access in any mode, like Gens does
\r
1496 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1497 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1502 // word RAM (1M area)
\r
1503 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1507 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1508 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1509 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1510 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1511 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1512 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1517 if ((a&0xff8000)==0xff0000) {
\r
1519 if (a >= 0x2000) {
\r
1521 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1522 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1523 } else if (a < 0x12) {
\r
1525 pcm_write(a, (d>>16) & 0xff);
\r
1526 pcm_write(a+1, d & 0xff);
\r
1532 if ((a&0xff0000)==0xfe0000) {
\r
1533 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1534 a = (a>>1)&0x1fff;
\r
1535 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1536 Pico_mcd->bram[a++] = d >> 24;
\r
1537 Pico_mcd->bram[a++] = d;
\r
1538 Pico_mcd->bram[a++] = d >> 8;
\r
1543 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1548 // -----------------------------------------------------------------
\r
1552 static __inline int PicoMemBaseM68k(u32 pc)
\r
1554 if ((pc&0xe00000)==0xe00000)
\r
1555 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1558 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1560 if ((pc&0xfc0000)==0x200000)
\r
1562 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1563 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1564 if (pc < 0x220000) {
\r
1565 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1566 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1570 // Error - Program Counter is invalid
\r
1571 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);
\r
1573 return (int)Pico_mcd->bios;
\r
1577 static u32 PicoCheckPcM68k(u32 pc)
\r
1579 pc-=PicoCpuCM68k.membase; // Get real pc
\r
1582 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
\r
1584 return PicoCpuCM68k.membase+pc;
\r
1588 static __inline int PicoMemBaseS68k(u32 pc)
\r
1590 if (pc < 0x80000) // PRG RAM
\r
1591 return (int)Pico_mcd->prg_ram;
\r
1593 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1594 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1596 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1597 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1598 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1601 // Error - Program Counter is invalid
\r
1602 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);
\r
1604 return (int)Pico_mcd->prg_ram;
\r
1608 static u32 PicoCheckPcS68k(u32 pc)
\r
1610 pc-=PicoCpuCS68k.membase; // Get real pc
\r
1613 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
\r
1615 return PicoCpuCS68k.membase+pc;
\r
1619 #ifndef _ASM_CD_MEMORY_C
\r
1620 void PicoMemResetCD(int r3)
\r
1623 // update fetchmap..
\r
1627 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1628 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
\r
1632 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1633 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1634 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1635 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1642 static void m68k_mem_setup_cd(void);
\r
1645 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1647 // additional handlers for common code
\r
1648 PicoRead16Hook = OtherRead16End;
\r
1649 PicoWrite8Hook = OtherWrite8End;
\r
1652 // Setup m68k memory callbacks:
\r
1653 PicoCpuCM68k.checkpc=PicoCheckPcM68k;
\r
1654 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;
\r
1655 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;
\r
1656 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;
\r
1657 PicoCpuCM68k.write8 =PicoWriteM68k8;
\r
1658 PicoCpuCM68k.write16=PicoWriteM68k16;
\r
1659 PicoCpuCM68k.write32=PicoWriteM68k32;
\r
1661 PicoCpuCS68k.checkpc=PicoCheckPcS68k;
\r
1662 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;
\r
1663 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;
\r
1664 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;
\r
1665 PicoCpuCS68k.write8 =PicoWriteS68k8;
\r
1666 PicoCpuCS68k.write16=PicoWriteS68k16;
\r
1667 PicoCpuCS68k.write32=PicoWriteS68k32;
\r
1671 PicoCpuFM68k.read_byte =PicoReadM68k8;
\r
1672 PicoCpuFM68k.read_word =PicoReadM68k16;
\r
1673 PicoCpuFM68k.read_long =PicoReadM68k32;
\r
1674 PicoCpuFM68k.write_byte=PicoWriteM68k8;
\r
1675 PicoCpuFM68k.write_word=PicoWriteM68k16;
\r
1676 PicoCpuFM68k.write_long=PicoWriteM68k32;
\r
1678 PicoCpuFS68k.read_byte =PicoReadS68k8;
\r
1679 PicoCpuFS68k.read_word =PicoReadS68k16;
\r
1680 PicoCpuFS68k.read_long =PicoReadS68k32;
\r
1681 PicoCpuFS68k.write_byte=PicoWriteS68k8;
\r
1682 PicoCpuFS68k.write_word=PicoWriteS68k16;
\r
1683 PicoCpuFS68k.write_long=PicoWriteS68k32;
\r
1685 // setup FAME fetchmap
\r
1689 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1690 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1691 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1692 // now real ROM (BIOS)
\r
1693 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1694 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
1696 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1697 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1699 // PRG RAM is default
\r
1700 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1701 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1703 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1704 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
\r
1705 // WORD RAM 2M area
\r
1706 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1707 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
\r
1708 // PicoMemResetCD() will setup word ram for both
\r
1712 m68k_mem_setup_cd();
\r
1716 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1717 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1722 static unsigned int PicoReadCD8w (unsigned int a) {
\r
1723 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1725 static unsigned int PicoReadCD16w(unsigned int a) {
\r
1726 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1728 static unsigned int PicoReadCD32w(unsigned int a) {
\r
1729 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1731 static void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1732 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1734 static void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1735 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1737 static void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1738 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1741 // these are allowed to access RAM
\r
1742 static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)
\r
1745 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1746 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1747 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1748 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1749 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1750 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1751 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1753 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1755 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1756 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1757 if((a&0xfc0000)==0x200000) { // word RAM
\r
1758 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1759 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1760 else if (a < 0x220000) {
\r
1761 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1762 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1765 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1767 return 0;//(u8) lastread_d;
\r
1769 static unsigned int m68k_read_pcrelative_CD16(unsigned int a)
\r
1772 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1773 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1774 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1775 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1776 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1777 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1778 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1780 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1782 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1783 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1784 if((a&0xfc0000)==0x200000) { // word RAM
\r
1785 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1786 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1787 else if (a < 0x220000) {
\r
1788 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1789 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1792 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1796 static unsigned int m68k_read_pcrelative_CD32(unsigned int a)
\r
1800 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1801 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1802 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1803 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1804 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1805 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1806 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1807 return (pm[0]<<16)|pm[1];
\r
1809 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1811 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1812 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1813 if((a&0xfc0000)==0x200000) { // word RAM
\r
1814 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1815 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1816 else if (a < 0x220000) {
\r
1817 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1818 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1819 return (pm[0]<<16)|pm[1];
\r
1822 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1827 extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
\r
1828 extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
\r
1829 extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
\r
1830 extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
\r
1831 extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
\r
1832 extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
\r
1833 extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);
\r
1834 extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);
\r
1835 extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);
\r
1837 static void m68k_mem_setup_cd(void)
\r
1839 pm68k_read_memory_8 = PicoReadCD8w;
\r
1840 pm68k_read_memory_16 = PicoReadCD16w;
\r
1841 pm68k_read_memory_32 = PicoReadCD32w;
\r
1842 pm68k_write_memory_8 = PicoWriteCD8w;
\r
1843 pm68k_write_memory_16 = PicoWriteCD16w;
\r
1844 pm68k_write_memory_32 = PicoWriteCD32w;
\r
1845 pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;
\r
1846 pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;
\r
1847 pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;
\r
1849 #endif // EMU_M68K
\r