2 * Memory I/O handlers for Sega/Mega CD.
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3 * (C) notaz, 2007-2009
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5 * This work is licensed under the terms of MAME license.
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6 * See COPYING file in the top-level directory.
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9 #include "../pico_int.h"
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10 #include "../memory.h"
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15 uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
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16 uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
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17 uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
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18 uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
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20 MAKE_68K_READ8(s68k_read8, s68k_read8_map)
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21 MAKE_68K_READ16(s68k_read16, s68k_read16_map)
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22 MAKE_68K_READ32(s68k_read32, s68k_read16_map)
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23 MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
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24 MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
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25 MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
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27 // -----------------------------------------------------------------
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29 // provided by ASM code:
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30 #ifdef _ASM_CD_MEMORY_C
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31 u32 PicoReadM68k8_io(u32 a);
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32 u32 PicoReadM68k16_io(u32 a);
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33 void PicoWriteM68k8_io(u32 a, u32 d);
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34 void PicoWriteM68k16_io(u32 a, u32 d);
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36 u32 PicoReadS68k8_pr(u32 a);
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37 u32 PicoReadS68k16_pr(u32 a);
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38 void PicoWriteS68k8_pr(u32 a, u32 d);
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39 void PicoWriteS68k16_pr(u32 a, u32 d);
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41 u32 PicoReadM68k8_cell0(u32 a);
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42 u32 PicoReadM68k8_cell1(u32 a);
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43 u32 PicoReadM68k16_cell0(u32 a);
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44 u32 PicoReadM68k16_cell1(u32 a);
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45 void PicoWriteM68k8_cell0(u32 a, u32 d);
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46 void PicoWriteM68k8_cell1(u32 a, u32 d);
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47 void PicoWriteM68k16_cell0(u32 a, u32 d);
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48 void PicoWriteM68k16_cell1(u32 a, u32 d);
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50 u32 PicoReadS68k8_dec0(u32 a);
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51 u32 PicoReadS68k8_dec1(u32 a);
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52 u32 PicoReadS68k16_dec0(u32 a);
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53 u32 PicoReadS68k16_dec1(u32 a);
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54 void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);
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55 void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);
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56 void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);
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57 void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);
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58 void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);
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59 void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);
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60 void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);
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61 void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);
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62 void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);
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63 void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);
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64 void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
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65 void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
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68 static void remap_prg_window(u32 r1, u32 r3);
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69 static void remap_word_ram(u32 r3);
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72 #define POLL_LIMIT 16
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73 #define POLL_CYCLES 124
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75 u32 m68k_comm_check(u32 a, u32 d)
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77 pcd_sync_s68k(SekCyclesDone(), 0);
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78 if (a != Pico_mcd->m.m68k_poll_a) {
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79 Pico_mcd->m.m68k_poll_a = a;
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80 Pico_mcd->m.m68k_poll_cnt = 0;
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83 Pico_mcd->m.m68k_poll_cnt++;
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87 #ifndef _ASM_CD_MEMORY_C
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88 static u32 m68k_reg_read16(u32 a)
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95 // here IFL2 is always 0, just like in Gens
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96 d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)
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97 | Pico_mcd->m.busreq;
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100 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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101 elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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104 d = Pico_mcd->s68k_regs[4]<<8;
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107 d = *(u16 *)(Pico_mcd->bios + 0x72);
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110 d = Read_CDC_Host(0);
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113 elprintf(EL_UIO, "m68k FIXME: reserved read");
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115 case 0xC: // 384 cycle stopwatch timer
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117 d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
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118 d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
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120 elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
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125 // comm flag/cmd/status (0xE-0x2F)
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126 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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130 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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136 return m68k_comm_check(a, d);
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140 #ifndef _ASM_CD_MEMORY_C
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143 void m68k_reg_write8(u32 a, u32 d)
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148 Pico_mcd->m.m68k_poll_a =
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149 Pico_mcd->m.m68k_poll_cnt = 0;
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154 if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
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155 elprintf(EL_INTS, "m68k: s68k irq 2");
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156 pcd_sync_s68k(SekCyclesDone(), 0);
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157 SekInterruptS68k(2);
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162 dold = Pico_mcd->m.busreq;
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164 d |= 2; // verified: can't release bus on reset
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168 pcd_sync_s68k(SekCyclesDone(), 0);
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170 if ((dold ^ d) & 1)
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171 elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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173 Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;
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174 else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {
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175 Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;
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176 elprintf(EL_CDREGS, "m68k: resetting s68k");
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179 if ((dold ^ d) & 2) {
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180 elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
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181 remap_prg_window(d, Pico_mcd->s68k_regs[3]);
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183 Pico_mcd->m.busreq = d;
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186 elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
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187 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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190 dold = Pico_mcd->s68k_regs[3];
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191 elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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192 if ((d ^ dold) & 0xc0) {
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193 elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
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194 (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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195 remap_prg_window(Pico_mcd->m.busreq, d);
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198 // 2M mode state is tracked regardless of current mode
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200 Pico_mcd->m.dmna_ret_2m |= 2;
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201 Pico_mcd->m.dmna_ret_2m &= ~1;
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203 if (dold & 4) { // 1M mode
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204 d ^= 2; // 0 sets DMNA, 1 does nothing
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205 d = (d & 0xc2) | (dold & 0x1f);
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208 d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
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212 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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215 Pico_mcd->bios[0x72] = d;
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216 elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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217 ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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225 if ((a&0xf0) == 0x10)
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228 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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232 if (d == Pico_mcd->s68k_regs[a])
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235 Pico_mcd->s68k_regs[a] = d;
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236 pcd_sync_s68k(SekCyclesDone(), 0);
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237 if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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239 Pico_mcd->m.s68k_poll_a = 0;
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240 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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244 #ifndef _ASM_CD_MEMORY_C
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247 u32 s68k_poll_detect(u32 a, u32 d)
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249 #ifdef USE_POLL_DETECT
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250 u32 cycles, cnt = 0;
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251 if (SekIsStoppedS68k())
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254 cycles = SekCyclesDoneS68k();
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255 if (a == Pico_mcd->m.s68k_poll_a) {
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256 u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
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257 if (clkdiff <= POLL_CYCLES) {
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258 cnt = Pico_mcd->m.s68k_poll_cnt + 1;
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259 //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
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260 if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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262 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",
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267 Pico_mcd->m.s68k_poll_a = a;
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268 Pico_mcd->m.s68k_poll_clk = cycles;
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269 Pico_mcd->m.s68k_poll_cnt = cnt;
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274 #define READ_FONT_DATA(basemask) \
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276 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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277 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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278 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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279 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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280 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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281 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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285 #ifndef _ASM_CD_MEMORY_C
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288 u32 s68k_reg_read16(u32 a)
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294 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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296 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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297 elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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298 return s68k_poll_detect(a, d);
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300 return CDC_Read_Reg();
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302 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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304 d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
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307 elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
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310 elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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311 return Pico_mcd->s68k_regs[31];
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312 case 0x34: // fader
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313 return 0; // no busy bit
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314 case 0x50: // font data (check: Lunar 2, Silpheed)
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315 READ_FONT_DATA(0x00100000);
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318 READ_FONT_DATA(0x00010000);
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321 READ_FONT_DATA(0x10000000);
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324 READ_FONT_DATA(0x01000000);
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328 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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330 if (a >= 0x0e && a < 0x30)
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331 return s68k_poll_detect(a, d);
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336 #ifndef _ASM_CD_MEMORY_C
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339 void s68k_reg_write8(u32 a, u32 d)
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341 // Warning: d might have upper bits set
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344 return; // only m68k can change WP
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346 int dold = Pico_mcd->s68k_regs[3];
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347 elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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353 Pico_mcd->m.dmna_ret_2m |= 1;
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354 Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears
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360 elprintf(EL_CDREG3, "wram mode 2M->1M");
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361 wram_2M_to_1M(Pico_mcd->word_ram2M);
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364 if ((d ^ dold) & 0x1d)
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367 if ((d ^ dold) & 0x05)
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368 d &= ~2; // clear DMNA - swap complete
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373 elprintf(EL_CDREG3, "wram mode 1M->2M");
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374 wram_1M_to_2M(Pico_mcd->word_ram2M);
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377 d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;
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382 elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
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383 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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386 //dprintf("s68k CDC reg addr: %x", d&0xf);
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392 elprintf(EL_CDREGS, "s68k set CDC dma addr");
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395 case 0xd: // 384 cycle stopwatch timer
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396 elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
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397 // does this also reset internal 384 cycle counter?
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398 Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
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404 case 0x31: // 384 cycle int3 timer
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406 elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
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407 Pico_mcd->s68k_regs[a] = (u8) d;
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408 if (d) // d or d+1??
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409 pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
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411 pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
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413 case 0x33: // IRQ mask
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414 elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
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416 if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
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417 if (Pico_mcd->s68k_regs[0x37] & 4)
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418 CDD_Export_Status();
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421 case 0x34: // fader
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422 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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425 return; // d/m bit is unsetable
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427 u32 d_old = Pico_mcd->s68k_regs[0x37];
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428 Pico_mcd->s68k_regs[0x37] = d&7;
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429 if ((d&4) && !(d_old&4)) {
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430 CDD_Export_Status();
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435 Pico_mcd->s68k_regs[a] = (u8) d;
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436 CDD_Import_Command();
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440 if ((a&0x1f0) == 0x20)
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443 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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445 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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449 Pico_mcd->s68k_regs[a] = (u8) d;
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453 Pico_mcd->s68k_regs[a] = (u8) d;
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454 if (Pico_mcd->m.m68k_poll_cnt)
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456 Pico_mcd->m.m68k_poll_cnt = 0;
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459 // -----------------------------------------------------------------
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461 // -----------------------------------------------------------------
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463 #ifndef _ASM_CD_MEMORY_C
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464 #include "cell_map.c"
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466 // WORD RAM, cell aranged area (220000 - 23ffff)
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467 static u32 PicoReadM68k8_cell0(u32 a)
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469 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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470 return Pico_mcd->word_ram1M[0][a ^ 1];
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473 static u32 PicoReadM68k8_cell1(u32 a)
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475 a = (a&3) | (cell_map(a >> 2) << 2);
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476 return Pico_mcd->word_ram1M[1][a ^ 1];
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479 static u32 PicoReadM68k16_cell0(u32 a)
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481 a = (a&2) | (cell_map(a >> 2) << 2);
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482 return *(u16 *)(Pico_mcd->word_ram1M[0] + a);
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485 static u32 PicoReadM68k16_cell1(u32 a)
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487 a = (a&2) | (cell_map(a >> 2) << 2);
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488 return *(u16 *)(Pico_mcd->word_ram1M[1] + a);
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491 static void PicoWriteM68k8_cell0(u32 a, u32 d)
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493 a = (a&3) | (cell_map(a >> 2) << 2);
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494 Pico_mcd->word_ram1M[0][a ^ 1] = d;
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497 static void PicoWriteM68k8_cell1(u32 a, u32 d)
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499 a = (a&3) | (cell_map(a >> 2) << 2);
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500 Pico_mcd->word_ram1M[1][a ^ 1] = d;
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503 static void PicoWriteM68k16_cell0(u32 a, u32 d)
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505 a = (a&3) | (cell_map(a >> 2) << 2);
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506 *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;
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509 static void PicoWriteM68k16_cell1(u32 a, u32 d)
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511 a = (a&3) | (cell_map(a >> 2) << 2);
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512 *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;
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516 // RAM cart (40000 - 7fffff, optional)
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517 static u32 PicoReadM68k8_ramc(u32 a)
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520 if (a == 0x400001) {
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521 if (SRam.data != NULL)
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526 if ((a & 0xfe0000) == 0x600000) {
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527 if (SRam.data != NULL)
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528 d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
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533 return Pico_mcd->m.bcram_reg;
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535 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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539 static u32 PicoReadM68k16_ramc(u32 a)
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541 elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
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542 return PicoReadM68k8_ramc(a + 1);
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545 static void PicoWriteM68k8_ramc(u32 a, u32 d)
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547 if ((a & 0xfe0000) == 0x600000) {
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548 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
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549 SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
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555 if (a == 0x7fffff) {
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556 Pico_mcd->m.bcram_reg = d;
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560 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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563 static void PicoWriteM68k16_ramc(u32 a, u32 d)
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565 elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);
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566 PicoWriteM68k8_ramc(a + 1, d);
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569 // IO/control/cd registers (a10000 - ...)
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570 #ifndef _ASM_CD_MEMORY_C
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571 static u32 PicoReadM68k8_io(u32 a)
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574 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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575 d = m68k_reg_read16(a); // TODO: m68k_reg_read8
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579 elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);
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583 // fallback to default MD handler
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584 return PicoRead8_io(a);
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587 static u32 PicoReadM68k16_io(u32 a)
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590 if ((a & 0xff00) == 0x2000) {
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591 d = m68k_reg_read16(a);
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592 elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);
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596 return PicoRead16_io(a);
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599 static void PicoWriteM68k8_io(u32 a, u32 d)
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601 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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602 elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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603 m68k_reg_write8(a, d);
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607 PicoWrite16_io(a, d);
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610 static void PicoWriteM68k16_io(u32 a, u32 d)
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612 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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613 elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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615 m68k_reg_write8(a, d >> 8);
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616 if ((a & 0x3e) != 0x0e) // special case
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617 m68k_reg_write8(a + 1, d & 0xff);
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621 PicoWrite16_io(a, d);
\r
625 // -----------------------------------------------------------------
\r
627 // -----------------------------------------------------------------
\r
629 static u32 s68k_unmapped_read8(u32 a)
\r
631 elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
\r
635 static u32 s68k_unmapped_read16(u32 a)
\r
637 elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
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641 static void s68k_unmapped_write8(u32 a, u32 d)
\r
643 elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
\r
646 static void s68k_unmapped_write16(u32 a, u32 d)
\r
648 elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
\r
651 // PRG RAM protected range (000000 - 01fdff)?
\r
652 // XXX verify: ff00 or 1fe00 max?
\r
653 static void PicoWriteS68k8_prgwp(u32 a, u32 d)
\r
655 if (a >= (Pico_mcd->s68k_regs[2] << 9))
\r
656 Pico_mcd->prg_ram[a ^ 1] = d;
\r
659 static void PicoWriteS68k16_prgwp(u32 a, u32 d)
\r
661 if (a >= (Pico_mcd->s68k_regs[2] << 9))
\r
662 *(u16 *)(Pico_mcd->prg_ram + a) = d;
\r
665 #ifndef _ASM_CD_MEMORY_C
\r
667 // decode (080000 - 0bffff, in 1M mode)
\r
668 static u32 PicoReadS68k8_dec0(u32 a)
\r
670 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
\r
678 static u32 PicoReadS68k8_dec1(u32 a)
\r
680 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
\r
688 static u32 PicoReadS68k16_dec0(u32 a)
\r
690 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
\r
696 static u32 PicoReadS68k16_dec1(u32 a)
\r
698 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
\r
704 /* check: jaguar xj 220 (draws entire world using decode) */
\r
705 #define mk_decode_w8(bank) \
\r
706 static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \
\r
708 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
711 *pd = (*pd & 0x0f) | (d << 4); \
\r
713 *pd = (*pd & 0xf0) | (d & 0x0f); \
\r
716 static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \
\r
718 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
719 u8 mask = (a & 1) ? 0x0f : 0xf0; \
\r
721 if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \
\r
722 PicoWriteS68k8_dec_m0b##bank(a, d); \
\r
725 static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \
\r
727 if (d & 0x0f) /* overwrite */ \
\r
728 PicoWriteS68k8_dec_m0b##bank(a, d); \
\r
734 #define mk_decode_w16(bank) \
\r
735 static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \
\r
737 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
740 *pd = d | (d >> 4); \
\r
743 static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \
\r
745 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
747 d &= 0x0f0f; /* underwrite */ \
\r
748 if (!(*pd & 0xf0)) *pd |= d >> 4; \
\r
749 if (!(*pd & 0x0f)) *pd |= d; \
\r
752 static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \
\r
754 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
756 d &= 0x0f0f; /* overwrite */ \
\r
759 if (!(d & 0xf0)) d |= *pd & 0xf0; \
\r
760 if (!(d & 0x0f)) d |= *pd & 0x0f; \
\r
769 // backup RAM (fe0000 - feffff)
\r
770 static u32 PicoReadS68k8_bram(u32 a)
\r
772 return Pico_mcd->bram[(a>>1)&0x1fff];
\r
775 static u32 PicoReadS68k16_bram(u32 a)
\r
778 elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
779 a = (a >> 1) & 0x1fff;
\r
780 d = Pico_mcd->bram[a++];
\r
781 d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
\r
785 static void PicoWriteS68k8_bram(u32 a, u32 d)
\r
787 Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
\r
791 static void PicoWriteS68k16_bram(u32 a, u32 d)
\r
793 elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
794 a = (a >> 1) & 0x1fff;
\r
795 Pico_mcd->bram[a++] = d;
\r
796 Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
\r
800 #ifndef _ASM_CD_MEMORY_C
\r
802 // PCM and registers (ff0000 - ffffff)
\r
803 static u32 PicoReadS68k8_pr(u32 a)
\r
808 if ((a & 0xfe00) == 0x8000) {
\r
810 if (a >= 0x0e && a < 0x30) {
\r
811 d = Pico_mcd->s68k_regs[a];
\r
812 s68k_poll_detect(a, d);
\r
815 else if (a >= 0x58 && a < 0x68)
\r
816 d = gfx_cd_read(a & ~1);
\r
817 else d = s68k_reg_read16(a & ~1);
\r
823 elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @ %06x",
\r
829 // XXX: verify: probably odd addrs only?
\r
830 if ((a & 0x8000) == 0x0000) {
\r
833 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
\r
834 else if (a >= 0x20) {
\r
836 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
843 return s68k_unmapped_read8(a);
\r
846 static u32 PicoReadS68k16_pr(u32 a)
\r
851 if ((a & 0xfe00) == 0x8000) {
\r
853 if (0x58 <= a && a < 0x68)
\r
854 d = gfx_cd_read(a);
\r
855 else d = s68k_reg_read16(a);
\r
857 elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @ %06x",
\r
863 if ((a & 0x8000) == 0x0000) {
\r
864 //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
867 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
868 else if (a >= 0x20) {
\r
870 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
871 if (a & 2) d >>= 8;
\r
873 elprintf(EL_CDREGS, "ret = %04x", d);
\r
877 return s68k_unmapped_read16(a);
\r
880 static void PicoWriteS68k8_pr(u32 a, u32 d)
\r
883 if ((a & 0xfe00) == 0x8000) {
\r
885 elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
886 if (0x58 <= a && a < 0x68)
\r
887 gfx_cd_write16(a&~1, (d<<8)|d);
\r
888 else s68k_reg_write8(a,d);
\r
893 if ((a & 0x8000) == 0x0000) {
\r
896 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
898 pcm_write(a>>1, d);
\r
902 s68k_unmapped_write8(a, d);
\r
905 static void PicoWriteS68k16_pr(u32 a, u32 d)
\r
908 if ((a & 0xfe00) == 0x8000) {
\r
910 elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
911 if (a >= 0x58 && a < 0x68)
\r
912 gfx_cd_write16(a, d);
\r
915 // special case, 2 byte writes would be handled differently
\r
917 Pico_mcd->s68k_regs[0xf] = d;
\r
920 s68k_reg_write8(a, d >> 8);
\r
921 s68k_reg_write8(a + 1, d & 0xff);
\r
927 if ((a & 0x8000) == 0x0000) {
\r
930 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
932 pcm_write(a>>1, d & 0xff);
\r
936 s68k_unmapped_write16(a, d);
\r
941 static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };
\r
942 static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };
\r
943 static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };
\r
944 static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };
\r
946 static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };
\r
947 static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };
\r
949 static const void *s68k_dec_write8[2][4] = {
\r
950 { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },
\r
951 { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },
\r
954 static const void *s68k_dec_write16[2][4] = {
\r
955 { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },
\r
956 { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },
\r
959 // -----------------------------------------------------------------
\r
961 static void remap_prg_window(u32 r1, u32 r3)
\r
965 void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];
\r
966 cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
\r
969 m68k_map_unmap(0x020000, 0x03ffff);
\r
973 static void remap_word_ram(u32 r3)
\r
979 // 2M mode. XXX: allowing access in all cases for simplicity
\r
980 bank = Pico_mcd->word_ram2M;
\r
981 cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
\r
982 cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
\r
983 // TODO: handle 0x0c0000
\r
987 int m = (r3 & 0x18) >> 3;
\r
988 bank = Pico_mcd->word_ram1M[b0];
\r
989 cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
\r
990 bank = Pico_mcd->word_ram1M[b0 ^ 1];
\r
991 cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
\r
992 // "cell arrange" on m68k
\r
993 cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
\r
994 cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
\r
995 cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
\r
996 cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
\r
997 // "decode format" on s68k
\r
998 cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
\r
999 cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
\r
1000 cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
\r
1001 cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
\r
1005 // update fetchmap..
\r
1009 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1010 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;
\r
1014 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1015 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1016 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1017 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1022 void pcd_state_loaded_mem(void)
\r
1024 u32 r3 = Pico_mcd->s68k_regs[3];
\r
1026 /* after load events */
\r
1027 if (r3 & 4) // 1M mode?
\r
1028 wram_2M_to_1M(Pico_mcd->word_ram2M);
\r
1029 remap_word_ram(r3);
\r
1030 remap_prg_window(Pico_mcd->m.busreq, r3);
\r
1031 Pico_mcd->m.dmna_ret_2m &= 3;
\r
1033 // restore hint vector
\r
1034 *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
\r
1038 static void m68k_mem_setup_cd(void);
\r
1041 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1043 // setup default main68k map
\r
1046 // main68k map (BIOS mapped by PicoMemSetup()):
\r
1048 if (PicoOpt & POPT_EN_MCD_RAMCART) {
\r
1049 cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
\r
1050 cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
\r
1051 cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
\r
1052 cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
\r
1056 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);
\r
1057 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);
\r
1058 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);
\r
1059 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);
\r
1062 cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
\r
1063 cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
\r
1064 cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
\r
1065 cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
\r
1068 cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1069 cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1070 cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1071 cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1072 cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);
\r
1073 cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);
\r
1076 cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
\r
1077 cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
\r
1078 cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
\r
1079 cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
\r
1082 cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
\r
1083 cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
\r
1084 cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
\r
1085 cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
\r
1088 remap_word_ram(1);
\r
1092 PicoCpuCS68k.read8 = (void *)s68k_read8_map;
\r
1093 PicoCpuCS68k.read16 = (void *)s68k_read16_map;
\r
1094 PicoCpuCS68k.read32 = (void *)s68k_read16_map;
\r
1095 PicoCpuCS68k.write8 = (void *)s68k_write8_map;
\r
1096 PicoCpuCS68k.write16 = (void *)s68k_write16_map;
\r
1097 PicoCpuCS68k.write32 = (void *)s68k_write16_map;
\r
1098 PicoCpuCS68k.checkpc = NULL; /* unused */
\r
1099 PicoCpuCS68k.fetch8 = NULL;
\r
1100 PicoCpuCS68k.fetch16 = NULL;
\r
1101 PicoCpuCS68k.fetch32 = NULL;
\r
1105 PicoCpuFS68k.read_byte = s68k_read8;
\r
1106 PicoCpuFS68k.read_word = s68k_read16;
\r
1107 PicoCpuFS68k.read_long = s68k_read32;
\r
1108 PicoCpuFS68k.write_byte = s68k_write8;
\r
1109 PicoCpuFS68k.write_word = s68k_write16;
\r
1110 PicoCpuFS68k.write_long = s68k_write32;
\r
1112 // setup FAME fetchmap
\r
1116 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1117 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1118 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1119 // now real ROM (BIOS)
\r
1120 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1121 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
\r
1123 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1124 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1126 // PRG RAM is default
\r
1127 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1128 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1130 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1131 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;
\r
1132 // WORD RAM 2M area
\r
1133 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1134 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;
\r
1135 // remap_word_ram() will setup word ram for both
\r
1139 m68k_mem_setup_cd();
\r
1145 u32 m68k_read8(u32 a);
\r
1146 u32 m68k_read16(u32 a);
\r
1147 u32 m68k_read32(u32 a);
\r
1148 void m68k_write8(u32 a, u8 d);
\r
1149 void m68k_write16(u32 a, u16 d);
\r
1150 void m68k_write32(u32 a, u32 d);
\r
1152 static unsigned int PicoReadCD8w (unsigned int a) {
\r
1153 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
\r
1155 static unsigned int PicoReadCD16w(unsigned int a) {
\r
1156 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
\r
1158 static unsigned int PicoReadCD32w(unsigned int a) {
\r
1159 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
\r
1161 static void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1162 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
\r
1164 static void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1165 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
\r
1167 static void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1168 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
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1171 extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
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1172 extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
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1173 extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
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1174 extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
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1175 extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
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1176 extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
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1178 static void m68k_mem_setup_cd(void)
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1180 pm68k_read_memory_8 = PicoReadCD8w;
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1181 pm68k_read_memory_16 = PicoReadCD16w;
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1182 pm68k_read_memory_32 = PicoReadCD32w;
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1183 pm68k_write_memory_8 = PicoWriteCD8w;
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1184 pm68k_write_memory_16 = PicoWriteCD16w;
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1185 pm68k_write_memory_32 = PicoWriteCD32w;
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1187 #endif // EMU_M68K
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1189 // vim:shiftwidth=2:ts=2:expandtab
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