1 // Memory I/O handlers for Sega/Mega CD.
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2 // Loosely based on Gens code.
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3 // (c) Copyright 2007, Grazvydas "notaz" Ignotas
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6 #include "../pico_int.h"
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8 #include "../sound/ym2612.h"
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9 #include "../sound/sn76496.h"
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14 #ifndef UTYPES_DEFINED
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15 typedef unsigned char u8;
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16 typedef unsigned short u16;
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17 typedef unsigned int u32;
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18 #define UTYPES_DEFINED
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26 //#define rdprintf dprintf
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27 #define rdprintf(...)
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28 //#define wrdprintf dprintf
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29 #define wrdprintf(...)
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30 //#define r3printf elprintf
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31 #define r3printf(...)
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34 #ifdef EMU_CORE_DEBUG
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35 extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];
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36 extern int lrp_cyc, lwp_cyc;
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37 #undef USE_POLL_DETECT
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40 // -----------------------------------------------------------------
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43 #define POLL_LIMIT 16
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44 #define POLL_CYCLES 124
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45 // int m68k_poll_addr, m68k_poll_cnt;
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46 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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48 #ifndef _ASM_CD_MEMORY_C
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49 static u32 m68k_reg_read16(u32 a)
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53 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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57 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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60 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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61 r3printf(EL_STATUS, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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64 d = Pico_mcd->s68k_regs[4]<<8;
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67 d = *(u16 *)(Pico_mcd->bios + 0x72);
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70 d = Read_CDC_Host(0);
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73 elprintf(EL_UIO, "m68k FIXME: reserved read");
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76 d = Pico_mcd->m.timer_stopwatch >> 16;
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77 dprintf("m68k stopwatch timer read (%04x)", d);
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82 // comm flag/cmd/status (0xE-0x2F)
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83 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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87 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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95 #ifndef _ASM_CD_MEMORY_C
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98 void m68k_reg_write8(u32 a, u32 d)
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101 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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106 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
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110 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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111 if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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112 if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
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113 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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114 SekResetS68k(); // S68k comes out of RESET or BRQ state
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115 Pico_mcd->m.state_flags&=~1;
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116 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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118 Pico_mcd->m.busreq = d;
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121 dprintf("m68k: prg wp=%02x", d);
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122 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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125 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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126 r3printf(EL_STATUS, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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128 if ((dold>>6) != ((d>>6)&3))
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129 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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130 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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131 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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132 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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133 if (dold & 4) { // 1M mode
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134 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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136 if ((d ^ dold) & d & 2) { // DMNA is being set
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137 dold &= ~1; // return word RAM to s68k
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138 /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
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139 SekEndRun(20+16+10+12+16);
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142 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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143 #ifdef USE_POLL_DETECT
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144 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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145 SekSetStopS68k(0); s68k_poll_adclk = 0;
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146 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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152 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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155 Pico_mcd->bios[0x72] = d;
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156 dprintf("hint vector set to %08x", PicoRead32(0x70));
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159 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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161 //dprintf("m68k: comm flag: %02x", d);
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162 Pico_mcd->s68k_regs[0xe] = d;
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163 #ifdef USE_POLL_DETECT
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164 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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165 SekSetStopS68k(0); s68k_poll_adclk = 0;
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166 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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172 if ((a&0xf0) == 0x10) {
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173 Pico_mcd->s68k_regs[a] = d;
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174 #ifdef USE_POLL_DETECT
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175 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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176 SekSetStopS68k(0); s68k_poll_adclk = 0;
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177 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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183 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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186 #ifndef _ASM_CD_MEMORY_C
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189 u32 s68k_poll_detect(u32 a, u32 d)
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191 #ifdef USE_POLL_DETECT
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192 // needed mostly for Cyclone, which doesn't always check it's cycle counter
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193 if (SekIsStoppedS68k()) return d;
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194 // polling detection
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195 if (a == (s68k_poll_adclk&0xff)) {
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196 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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197 if (clkdiff <= POLL_CYCLES) {
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199 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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200 if (s68k_poll_cnt > POLL_LIMIT) {
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202 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
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204 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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214 #define READ_FONT_DATA(basemask) \
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216 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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217 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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218 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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219 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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220 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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221 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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225 #ifndef _ASM_CD_MEMORY_C
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228 u32 s68k_reg_read16(u32 a)
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232 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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236 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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238 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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239 r3printf(EL_STATUS, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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240 return s68k_poll_detect(a, d);
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242 return CDC_Read_Reg();
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244 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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246 d = Pico_mcd->m.timer_stopwatch >> 16;
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247 dprintf("s68k stopwatch timer read (%04x)", d);
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250 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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251 return Pico_mcd->s68k_regs[31];
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252 case 0x34: // fader
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253 return 0; // no busy bit
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254 case 0x50: // font data (check: Lunar 2, Silpheed)
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255 READ_FONT_DATA(0x00100000);
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258 READ_FONT_DATA(0x00010000);
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261 READ_FONT_DATA(0x10000000);
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264 READ_FONT_DATA(0x01000000);
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268 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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270 if (a >= 0x0e && a < 0x30)
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271 return s68k_poll_detect(a, d);
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276 #ifndef _ASM_CD_MEMORY_C
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279 void s68k_reg_write8(u32 a, u32 d)
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281 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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283 // Warning: d might have upper bits set
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286 return; // only m68k can change WP
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288 int dold = Pico_mcd->s68k_regs[3];
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289 r3printf(EL_STATUS, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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294 if ((d ^ dold) & 5) {
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295 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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298 #ifdef _ASM_CD_MEMORY_C
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299 if ((d ^ dold) & 0x1d)
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300 PicoMemResetCDdecode(d);
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303 r3printf(EL_STATUS, "wram mode 2M->1M");
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304 wram_2M_to_1M(Pico_mcd->word_ram2M);
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310 r3printf(EL_STATUS, "wram mode 1M->2M");
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311 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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313 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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315 wram_1M_to_2M(Pico_mcd->word_ram2M);
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320 // s68k can only set RET, writing 0 has no effect
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321 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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326 dprintf("s68k CDC dest: %x", d&7);
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327 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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330 //dprintf("s68k CDC reg addr: %x", d&0xf);
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336 dprintf("s68k set CDC dma addr");
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340 dprintf("s68k set stopwatch timer");
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341 Pico_mcd->m.timer_stopwatch = 0;
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344 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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347 dprintf("s68k set int3 timer: %02x", d);
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348 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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350 case 0x33: // IRQ mask
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351 dprintf("s68k irq mask: %02x", d);
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352 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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353 CDD_Export_Status();
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356 case 0x34: // fader
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357 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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360 return; // d/m bit is unsetable
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362 u32 d_old = Pico_mcd->s68k_regs[0x37];
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363 Pico_mcd->s68k_regs[0x37] = d&7;
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364 if ((d&4) && !(d_old&4)) {
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365 CDD_Export_Status();
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370 Pico_mcd->s68k_regs[a] = (u8) d;
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371 CDD_Import_Command();
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375 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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377 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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381 Pico_mcd->s68k_regs[a] = (u8) d;
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385 static u32 OtherRead16End(u32 a, int realsize)
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389 #ifndef _ASM_CD_MEMORY_C
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390 if ((a&0xffffc0)==0xa12000) {
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391 d=m68k_reg_read16(a);
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396 if (SRam.data != NULL) d=3; // 64k cart
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400 if ((a&0xfe0000)==0x600000) {
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401 if (SRam.data != NULL) {
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402 d=SRam.data[((a>>1)&0xffff)+0x2000];
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403 if (realsize == 8) d|=d<<8;
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409 d=Pico_mcd->m.bcram_reg;
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414 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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416 #ifndef _ASM_CD_MEMORY_C
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423 static void OtherWrite8End(u32 a, u32 d, int realsize)
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425 #ifndef _ASM_CD_MEMORY_C
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426 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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428 if ((a&0xfe0000)==0x600000) {
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429 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {
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430 SRam.data[((a>>1)&0xffff)+0x2000]=d;
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437 Pico_mcd->m.bcram_reg=d;
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442 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
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445 #ifndef _ASM_CD_MEMORY_C
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446 #define _CD_MEMORY_C
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447 #undef _ASM_MEMORY_C
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448 #include "../memory_cmn.c"
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449 #include "cell_map.c"
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453 // -----------------------------------------------------------------
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454 // Read Rom and read Ram
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456 #ifdef _ASM_CD_MEMORY_C
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457 u32 PicoReadM68k8(u32 a);
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459 u32 PicoReadM68k8(u32 a)
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467 case 0x00>>1: // BIOS: 000000 - 020000
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468 d = *(u8 *)(Pico_mcd->bios+(a^1));
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470 case 0x02>>1: // prg RAM
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471 if ((Pico_mcd->m.busreq&3)!=1) {
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472 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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473 d = *(prg_bank+((a^1)&0x1ffff));
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476 case 0x20>>1: // word RAM: 200000 - 220000
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477 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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479 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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480 int bank = Pico_mcd->s68k_regs[3]&1;
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481 d = Pico_mcd->word_ram1M[bank][a^1];
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483 // allow access in any mode, like Gens does
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484 d = Pico_mcd->word_ram2M[a^1];
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486 wrdprintf("ret = %02x", (u8)d);
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488 case 0x22>>1: // word RAM: 220000 - 240000
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489 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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490 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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491 int bank = Pico_mcd->s68k_regs[3]&1;
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492 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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493 d = Pico_mcd->word_ram1M[bank][a^1];
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495 // allow access in any mode, like Gens does
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496 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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498 wrdprintf("ret = %02x", (u8)d);
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500 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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501 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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502 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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503 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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505 if ((a&0xe700e0)==0xc00000)
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506 d=PicoVideoRead8(a);
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508 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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509 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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510 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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511 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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513 d = *(u8 *)(Pico.ram+((a^1)&0xffff));
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516 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram
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517 if ((a&0xffffc0)==0xa12000)
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518 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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520 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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522 if ((a&0xffffc0)==0xa12000)
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523 rdprintf("ret = %02x", (u8)d);
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528 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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529 #ifdef EMU_CORE_DEBUG
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530 if (a>=Pico.romsize) {
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532 lastread_d[lrp_cyc++&15] = d;
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540 #ifdef _ASM_CD_MEMORY_C
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541 u32 PicoReadM68k16(u32 a);
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543 static u32 PicoReadM68k16(u32 a)
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551 case 0x00>>1: // BIOS: 000000 - 020000
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552 d = *(u16 *)(Pico_mcd->bios+a);
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554 case 0x02>>1: // prg RAM
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555 if ((Pico_mcd->m.busreq&3)!=1) {
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556 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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557 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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558 d = *(u16 *)(prg_bank+(a&0x1fffe));
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559 wrdprintf("ret = %04x", d);
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562 case 0x20>>1: // word RAM: 200000 - 220000
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563 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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565 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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566 int bank = Pico_mcd->s68k_regs[3]&1;
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567 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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569 // allow access in any mode, like Gens does
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570 d = *(u16 *)(Pico_mcd->word_ram2M+a);
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572 wrdprintf("ret = %04x", d);
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574 case 0x22>>1: // word RAM: 220000 - 240000
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575 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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576 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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577 int bank = Pico_mcd->s68k_regs[3]&1;
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578 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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579 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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581 // allow access in any mode, like Gens does
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582 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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584 wrdprintf("ret = %04x", d);
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586 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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587 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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588 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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589 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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591 if ((a&0xe700e0)==0xc00000)
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592 d=PicoVideoRead(a);
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594 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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595 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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596 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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597 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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599 d=*(u16 *)(Pico.ram+(a&0xfffe));
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602 if ((a&0xffffc0)==0xa12000)
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603 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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605 d = OtherRead16(a, 16);
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607 if ((a&0xffffc0)==0xa12000)
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608 rdprintf("ret = %04x", d);
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613 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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614 #ifdef EMU_CORE_DEBUG
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615 if (a>=Pico.romsize) {
\r
617 lastread_d[lrp_cyc++&15] = d;
\r
625 #ifdef _ASM_CD_MEMORY_C
\r
626 u32 PicoReadM68k32(u32 a);
\r
628 static u32 PicoReadM68k32(u32 a)
\r
636 case 0x00>>1: { // BIOS: 000000 - 020000
\r
637 u16 *pm=(u16 *)(Pico_mcd->bios+a);
\r
638 d = (pm[0]<<16)|pm[1];
\r
641 case 0x02>>1: // prg RAM
\r
642 if ((Pico_mcd->m.busreq&3)!=1) {
\r
643 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
644 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
645 d = (pm[0]<<16)|pm[1];
\r
648 case 0x20>>1: // word RAM: 200000 - 220000
\r
649 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
651 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
652 int bank = Pico_mcd->s68k_regs[3]&1;
\r
653 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);
\r
654 d = (pm[0]<<16)|pm[1];
\r
656 // allow access in any mode, like Gens does
\r
657 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);
\r
658 d = (pm[0]<<16)|pm[1];
\r
660 wrdprintf("ret = %08x", d);
\r
662 case 0x22>>1: // word RAM: 220000 - 240000
\r
663 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
664 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?
\r
666 int bank = Pico_mcd->s68k_regs[3]&1;
\r
667 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
668 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
670 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
\r
671 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
\r
673 // allow access in any mode, like Gens does
\r
674 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
675 d = (pm[0]<<16)|pm[1];
\r
677 wrdprintf("ret = %08x", d);
\r
679 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
\r
680 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
\r
681 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
\r
682 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
\r
684 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);
\r
686 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
\r
687 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
\r
688 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
\r
689 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {
\r
691 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
692 d = (pm[0]<<16)|pm[1];
\r
696 if ((a&0xffffc0)==0xa12000)
\r
697 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
\r
699 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
701 if ((a&0xffffc0)==0xa12000)
\r
702 rdprintf("ret = %08x", d);
\r
707 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
708 #ifdef EMU_CORE_DEBUG
\r
709 if (a>=Pico.romsize) {
\r
711 lastread_d[lrp_cyc++&15] = d;
\r
719 // -----------------------------------------------------------------
\r
721 #ifdef _ASM_CD_MEMORY_C
\r
722 void PicoWriteM68k8(u32 a,u8 d);
\r
724 void PicoWriteM68k8(u32 a,u8 d)
\r
726 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
727 #ifdef EMU_CORE_DEBUG
\r
728 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
731 if ((a&0xe00000)==0xe00000) { // Ram
\r
732 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
737 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
738 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
739 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
746 if ((a&0xfc0000)==0x200000) {
\r
747 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
748 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
749 int bank = Pico_mcd->s68k_regs[3]&1;
\r
751 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
753 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
\r
755 // allow access in any mode, like Gens does
\r
756 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
761 if ((a&0xffffc0)==0xa12000) {
\r
762 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
763 m68k_reg_write8(a, d);
\r
772 #ifdef _ASM_CD_MEMORY_C
\r
773 void PicoWriteM68k16(u32 a,u16 d);
\r
775 static void PicoWriteM68k16(u32 a,u16 d)
\r
777 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);
\r
778 #ifdef EMU_CORE_DEBUG
\r
779 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
782 if ((a&0xe00000)==0xe00000) { // Ram
\r
783 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
788 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
789 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
790 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
791 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
798 if ((a&0xfc0000)==0x200000) {
\r
799 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
800 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
801 int bank = Pico_mcd->s68k_regs[3]&1;
\r
803 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
805 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
807 // allow access in any mode, like Gens does
\r
808 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
814 if ((a&0xffffc0)==0xa12000) {
\r
815 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
816 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
817 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
818 #ifdef USE_POLL_DETECT
\r
819 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
820 SekSetStopS68k(0); s68k_poll_adclk = 0;
\r
821 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
\r
826 m68k_reg_write8(a, d>>8);
\r
827 m68k_reg_write8(a+1,d&0xff);
\r
832 if ((a&0xe700e0)==0xc00000) {
\r
833 PicoVideoWrite(a,(u16)d);
\r
842 #ifdef _ASM_CD_MEMORY_C
\r
843 void PicoWriteM68k32(u32 a,u32 d);
\r
845 static void PicoWriteM68k32(u32 a,u32 d)
\r
847 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);
\r
848 #ifdef EMU_CORE_DEBUG
\r
849 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
852 if ((a&0xe00000)==0xe00000)
\r
855 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
856 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
861 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
862 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
863 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
864 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
871 if ((a&0xfc0000)==0x200000) {
\r
872 if (d != 0) // don't log clears
\r
873 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
874 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
875 int bank = Pico_mcd->s68k_regs[3]&1;
\r
876 if (a >= 0x220000) { // cell arranged
\r
878 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
879 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
881 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
882 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
884 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
885 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
888 // allow access in any mode, like Gens does
\r
889 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
890 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
895 if ((a&0xffffc0)==0xa12000) {
\r
896 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
897 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);
\r
901 if ((a&0xe700e0)==0xc00000)
\r
903 PicoVideoWrite(a, (u16)(d>>16));
\r
904 PicoVideoWrite(a+2,(u16)d);
\r
908 OtherWrite16(a, (u16)(d>>16));
\r
909 OtherWrite16(a+2,(u16)d);
\r
914 // -----------------------------------------------------------------
\r
916 // -----------------------------------------------------------------
\r
918 #ifdef _ASM_CD_MEMORY_C
\r
919 u32 PicoReadS68k8(u32 a);
\r
921 static u32 PicoReadS68k8(u32 a)
\r
925 #ifdef EMU_CORE_DEBUG
\r
932 d = *(Pico_mcd->prg_ram+(a^1));
\r
937 if ((a&0xfffe00) == 0xff8000) {
\r
939 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
940 if (a >= 0x0e && a < 0x30) {
\r
941 d = Pico_mcd->s68k_regs[a];
\r
942 s68k_poll_detect(a, d);
\r
943 rdprintf("ret = %02x", (u8)d);
\r
946 else if (a >= 0x58 && a < 0x68)
\r
947 d = gfx_cd_read(a&~1);
\r
948 else d = s68k_reg_read16(a&~1);
\r
949 if ((a&1)==0) d>>=8;
\r
950 rdprintf("ret = %02x", (u8)d);
\r
954 // word RAM (2M area)
\r
955 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
956 // test: batman returns
\r
957 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
958 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
959 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
960 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
961 if (a&1) d &= 0x0f;
\r
964 // allow access in any mode, like Gens does
\r
965 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
967 wrdprintf("ret = %02x", (u8)d);
\r
971 // word RAM (1M area)
\r
972 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
974 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
975 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
976 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
977 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
978 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
979 wrdprintf("ret = %02x", (u8)d);
\r
984 if ((a&0xff8000)==0xff0000) {
\r
985 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
988 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
989 else if (a >= 0x20) {
\r
991 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
992 if (a & 2) d >>= 8;
\r
994 elprintf(EL_IO, "ret = %02x", (u8)d);
\r
999 if ((a&0xff0000)==0xfe0000) {
\r
1000 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
1004 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
1008 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
1009 #ifdef EMU_CORE_DEBUG
\r
1011 lastread_d[lrp_cyc++&15] = d;
\r
1018 #ifdef _ASM_CD_MEMORY_C
\r
1019 u32 PicoReadS68k16(u32 a);
\r
1021 static u32 PicoReadS68k16(u32 a)
\r
1025 #ifdef EMU_CORE_DEBUG
\r
1026 u32 ab=a&0xfffffe;
\r
1031 if (a < 0x80000) {
\r
1032 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
1033 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
1034 wrdprintf("ret = %04x", d);
\r
1039 if ((a&0xfffe00) == 0xff8000) {
\r
1041 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
1042 if (a >= 0x58 && a < 0x68)
\r
1043 d = gfx_cd_read(a);
\r
1044 else d = s68k_reg_read16(a);
\r
1045 rdprintf("ret = %04x", d);
\r
1049 // word RAM (2M area)
\r
1050 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1051 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
1052 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1053 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1054 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
1055 d |= d << 4; d &= ~0xf0;
\r
1057 // allow access in any mode, like Gens does
\r
1058 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1060 wrdprintf("ret = %04x", d);
\r
1064 // word RAM (1M area)
\r
1065 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1067 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
1068 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1069 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1070 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1071 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1072 wrdprintf("ret = %04x", d);
\r
1077 if ((a&0xff0000)==0xfe0000) {
\r
1078 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
1079 a = (a>>1)&0x1fff;
\r
1080 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
1081 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
1082 dprintf("ret = %04x", d);
\r
1087 if ((a&0xff8000)==0xff0000) {
\r
1088 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
1091 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
1092 else if (a >= 0x20) {
\r
1094 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1095 if (a & 2) d >>= 8;
\r
1097 dprintf("ret = %04x", d);
\r
1101 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1105 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1106 #ifdef EMU_CORE_DEBUG
\r
1108 lastread_d[lrp_cyc++&15] = d;
\r
1115 #ifdef _ASM_CD_MEMORY_C
\r
1116 u32 PicoReadS68k32(u32 a);
\r
1118 static u32 PicoReadS68k32(u32 a)
\r
1122 #ifdef EMU_CORE_DEBUG
\r
1123 u32 ab=a&0xfffffe;
\r
1128 if (a < 0x80000) {
\r
1129 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1130 d = (pm[0]<<16)|pm[1];
\r
1135 if ((a&0xfffe00) == 0xff8000) {
\r
1137 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
1138 if (a >= 0x58 && a < 0x68)
\r
1139 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
1140 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
1141 rdprintf("ret = %08x", d);
\r
1145 // word RAM (2M area)
\r
1146 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1147 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
1148 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1149 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1151 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
1152 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
1153 d |= d << 4; d &= 0x0f0f0f0f;
\r
1155 // allow access in any mode, like Gens does
\r
1156 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
1158 wrdprintf("ret = %08x", d);
\r
1162 // word RAM (1M area)
\r
1163 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1166 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1167 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1168 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1169 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1170 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1171 wrdprintf("ret = %08x", d);
\r
1176 if ((a&0xff8000)==0xff0000) {
\r
1177 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1179 if (a >= 0x2000) {
\r
1181 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1182 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1183 } else if (a >= 0x20) {
\r
1187 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1188 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1190 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1191 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1194 dprintf("ret = %08x", d);
\r
1199 if ((a&0xff0000)==0xfe0000) {
\r
1200 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1201 a = (a>>1)&0x1fff;
\r
1202 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1203 d|= Pico_mcd->bram[a++] << 24;
\r
1204 d|= Pico_mcd->bram[a++];
\r
1205 d|= Pico_mcd->bram[a++] << 8;
\r
1206 dprintf("ret = %08x", d);
\r
1210 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1214 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1215 #ifdef EMU_CORE_DEBUG
\r
1216 if (ab > 0x78) { // not vectors and stuff
\r
1218 lastread_d[lrp_cyc++&15] = d;
\r
1226 #ifndef _ASM_CD_MEMORY_C
\r
1227 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1228 static void decode_write8(u32 a, u8 d, int r3)
\r
1230 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1231 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1235 if (!(a&1)) d <<= 4;
\r
1238 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1239 } else if (r3 > 8) {
\r
1240 if (d) goto do_it;
\r
1247 *pd = d | (*pd & oldmask);
\r
1251 static void decode_write16(u32 a, u16 d, int r3)
\r
1253 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1255 //if ((a & 0x3ffff) < 0x28000) return;
\r
1263 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1264 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1266 } else if (r3 > 8) {
\r
1268 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1269 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1277 // -----------------------------------------------------------------
\r
1279 #ifdef _ASM_CD_MEMORY_C
\r
1280 void PicoWriteS68k8(u32 a,u8 d);
\r
1282 static void PicoWriteS68k8(u32 a,u8 d)
\r
1284 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1288 #ifdef EMU_CORE_DEBUG
\r
1289 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1293 if (a < 0x80000) {
\r
1294 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1295 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;
\r
1300 if ((a&0xfffe00) == 0xff8000) {
\r
1302 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1303 if (a >= 0x58 && a < 0x68)
\r
1304 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1305 else s68k_reg_write8(a,d);
\r
1309 // word RAM (2M area)
\r
1310 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1311 int r3 = Pico_mcd->s68k_regs[3];
\r
1312 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1313 if (r3 & 4) { // 1M decode mode?
\r
1314 decode_write8(a, d, r3);
\r
1316 // allow access in any mode, like Gens does
\r
1317 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1322 // word RAM (1M area)
\r
1323 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1324 // Wing Commander tries to write here in wrong mode
\r
1327 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1328 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1329 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1330 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1331 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1336 if ((a&0xff8000)==0xff0000) {
\r
1339 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1340 else if (a < 0x12)
\r
1341 pcm_write(a>>1, d);
\r
1346 if ((a&0xff0000)==0xfe0000) {
\r
1347 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1352 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1357 #ifdef _ASM_CD_MEMORY_C
\r
1358 void PicoWriteS68k16(u32 a,u16 d);
\r
1360 static void PicoWriteS68k16(u32 a,u16 d)
\r
1362 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1366 #ifdef EMU_CORE_DEBUG
\r
1367 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1371 if (a < 0x80000) {
\r
1372 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1373 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer
\r
1374 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1379 if ((a&0xfffe00) == 0xff8000) {
\r
1381 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1382 if (a >= 0x58 && a < 0x68)
\r
1383 gfx_cd_write16(a, d);
\r
1385 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1386 Pico_mcd->s68k_regs[0xf] = d;
\r
1389 s68k_reg_write8(a, d>>8);
\r
1390 s68k_reg_write8(a+1,d&0xff);
\r
1395 // word RAM (2M area)
\r
1396 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1397 int r3 = Pico_mcd->s68k_regs[3];
\r
1398 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1399 if (r3 & 4) { // 1M decode mode?
\r
1400 decode_write16(a, d, r3);
\r
1402 // allow access in any mode, like Gens does
\r
1403 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1408 // word RAM (1M area)
\r
1409 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1412 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1413 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1414 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1415 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1416 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1421 if ((a&0xff8000)==0xff0000) {
\r
1424 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1425 else if (a < 0x12)
\r
1426 pcm_write(a>>1, d & 0xff);
\r
1431 if ((a&0xff0000)==0xfe0000) {
\r
1432 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1433 a = (a>>1)&0x1fff;
\r
1434 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1435 Pico_mcd->bram[a++] = d >> 8;
\r
1440 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1445 #ifdef _ASM_CD_MEMORY_C
\r
1446 void PicoWriteS68k32(u32 a,u32 d);
\r
1448 static void PicoWriteS68k32(u32 a,u32 d)
\r
1450 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1454 #ifdef EMU_CORE_DEBUG
\r
1455 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1459 if (a < 0x80000) {
\r
1460 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {
\r
1461 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1462 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1468 if ((a&0xfffe00) == 0xff8000) {
\r
1470 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1471 if (a >= 0x58 && a < 0x68) {
\r
1472 gfx_cd_write16(a, d>>16);
\r
1473 gfx_cd_write16(a+2, d&0xffff);
\r
1475 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);
\r
1476 s68k_reg_write8(a, d>>24);
\r
1477 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1478 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1479 s68k_reg_write8(a+3, d &0xff);
\r
1484 // word RAM (2M area)
\r
1485 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1486 int r3 = Pico_mcd->s68k_regs[3];
\r
1487 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1488 if (r3 & 4) { // 1M decode mode?
\r
1489 decode_write16(a , d >> 16, r3);
\r
1490 decode_write16(a+2, d , r3);
\r
1492 // allow access in any mode, like Gens does
\r
1493 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1494 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1499 // word RAM (1M area)
\r
1500 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1504 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1505 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1506 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1507 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1508 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1509 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1514 if ((a&0xff8000)==0xff0000) {
\r
1516 if (a >= 0x2000) {
\r
1518 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1519 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1520 } else if (a < 0x12) {
\r
1522 pcm_write(a, (d>>16) & 0xff);
\r
1523 pcm_write(a+1, d & 0xff);
\r
1529 if ((a&0xff0000)==0xfe0000) {
\r
1530 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1531 a = (a>>1)&0x1fff;
\r
1532 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1533 Pico_mcd->bram[a++] = d >> 24;
\r
1534 Pico_mcd->bram[a++] = d;
\r
1535 Pico_mcd->bram[a++] = d >> 8;
\r
1540 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1545 // -----------------------------------------------------------------
\r
1549 static __inline int PicoMemBaseM68k(u32 pc)
\r
1551 if ((pc&0xe00000)==0xe00000)
\r
1552 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1555 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1557 if ((pc&0xfc0000)==0x200000)
\r
1559 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1560 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1561 if (pc < 0x220000) {
\r
1562 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1563 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1567 // Error - Program Counter is invalid
\r
1568 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);
\r
1570 return (int)Pico_mcd->bios;
\r
1574 static u32 PicoCheckPcM68k(u32 pc)
\r
1576 pc-=PicoCpuCM68k.membase; // Get real pc
\r
1579 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
\r
1581 return PicoCpuCM68k.membase+pc;
\r
1585 static __inline int PicoMemBaseS68k(u32 pc)
\r
1587 if (pc < 0x80000) // PRG RAM
\r
1588 return (int)Pico_mcd->prg_ram;
\r
1590 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1591 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1593 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1594 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1595 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1598 // Error - Program Counter is invalid
\r
1599 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);
\r
1601 return (int)Pico_mcd->prg_ram;
\r
1605 static u32 PicoCheckPcS68k(u32 pc)
\r
1607 pc-=PicoCpuCS68k.membase; // Get real pc
\r
1610 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
\r
1612 return PicoCpuCS68k.membase+pc;
\r
1616 #ifndef _ASM_CD_MEMORY_C
\r
1617 void PicoMemResetCD(int r3)
\r
1620 // update fetchmap..
\r
1624 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1625 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
\r
1629 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1630 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1631 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1632 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1639 static void m68k_mem_setup_cd(void);
\r
1642 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1644 // additional handlers for common code
\r
1645 PicoRead16Hook = OtherRead16End;
\r
1646 PicoWrite8Hook = OtherWrite8End;
\r
1649 // Setup m68k memory callbacks:
\r
1650 PicoCpuCM68k.checkpc=PicoCheckPcM68k;
\r
1651 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;
\r
1652 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;
\r
1653 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;
\r
1654 PicoCpuCM68k.write8 =PicoWriteM68k8;
\r
1655 PicoCpuCM68k.write16=PicoWriteM68k16;
\r
1656 PicoCpuCM68k.write32=PicoWriteM68k32;
\r
1658 PicoCpuCS68k.checkpc=PicoCheckPcS68k;
\r
1659 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;
\r
1660 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;
\r
1661 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;
\r
1662 PicoCpuCS68k.write8 =PicoWriteS68k8;
\r
1663 PicoCpuCS68k.write16=PicoWriteS68k16;
\r
1664 PicoCpuCS68k.write32=PicoWriteS68k32;
\r
1668 PicoCpuFM68k.read_byte =PicoReadM68k8;
\r
1669 PicoCpuFM68k.read_word =PicoReadM68k16;
\r
1670 PicoCpuFM68k.read_long =PicoReadM68k32;
\r
1671 PicoCpuFM68k.write_byte=PicoWriteM68k8;
\r
1672 PicoCpuFM68k.write_word=PicoWriteM68k16;
\r
1673 PicoCpuFM68k.write_long=PicoWriteM68k32;
\r
1675 PicoCpuFS68k.read_byte =PicoReadS68k8;
\r
1676 PicoCpuFS68k.read_word =PicoReadS68k16;
\r
1677 PicoCpuFS68k.read_long =PicoReadS68k32;
\r
1678 PicoCpuFS68k.write_byte=PicoWriteS68k8;
\r
1679 PicoCpuFS68k.write_word=PicoWriteS68k16;
\r
1680 PicoCpuFS68k.write_long=PicoWriteS68k32;
\r
1682 // setup FAME fetchmap
\r
1686 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1687 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1688 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1689 // now real ROM (BIOS)
\r
1690 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1691 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
1693 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1694 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1696 // PRG RAM is default
\r
1697 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1698 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1700 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1701 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
\r
1702 // WORD RAM 2M area
\r
1703 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1704 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
\r
1705 // PicoMemResetCD() will setup word ram for both
\r
1709 m68k_mem_setup_cd();
\r
1712 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1713 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1718 static unsigned int PicoReadCD8w (unsigned int a) {
\r
1719 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1721 static unsigned int PicoReadCD16w(unsigned int a) {
\r
1722 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1724 static unsigned int PicoReadCD32w(unsigned int a) {
\r
1725 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1727 static void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1728 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1730 static void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1731 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1733 static void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1734 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1737 // these are allowed to access RAM
\r
1738 static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)
\r
1741 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1742 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1743 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1744 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1745 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1746 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1747 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1749 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1751 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1752 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1753 if((a&0xfc0000)==0x200000) { // word RAM
\r
1754 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1755 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1756 else if (a < 0x220000) {
\r
1757 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1758 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1761 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1763 return 0;//(u8) lastread_d;
\r
1765 static unsigned int m68k_read_pcrelative_CD16(unsigned int a)
\r
1768 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1769 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1770 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1771 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1772 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1773 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1774 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1776 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1778 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1779 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1780 if((a&0xfc0000)==0x200000) { // word RAM
\r
1781 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1782 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1783 else if (a < 0x220000) {
\r
1784 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1785 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1788 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1792 static unsigned int m68k_read_pcrelative_CD32(unsigned int a)
\r
1796 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1797 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1798 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1799 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1800 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1801 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1802 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1803 return (pm[0]<<16)|pm[1];
\r
1805 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1807 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1808 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1809 if((a&0xfc0000)==0x200000) { // word RAM
\r
1810 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1811 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1812 else if (a < 0x220000) {
\r
1813 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1814 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1815 return (pm[0]<<16)|pm[1];
\r
1818 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1823 extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
\r
1824 extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
\r
1825 extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
\r
1826 extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
\r
1827 extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
\r
1828 extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
\r
1829 extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);
\r
1830 extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);
\r
1831 extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);
\r
1833 static void m68k_mem_setup_cd(void)
\r
1835 pm68k_read_memory_8 = PicoReadCD8w;
\r
1836 pm68k_read_memory_16 = PicoReadCD16w;
\r
1837 pm68k_read_memory_32 = PicoReadCD32w;
\r
1838 pm68k_write_memory_8 = PicoWriteCD8w;
\r
1839 pm68k_write_memory_16 = PicoWriteCD16w;
\r
1840 pm68k_write_memory_32 = PicoWriteCD32w;
\r
1841 pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;
\r
1842 pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;
\r
1843 pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;
\r
1845 #endif // EMU_M68K
\r