1 // (c) Copyright 2007 notaz, All rights reserved.
4 #include "../pico_int.h"
5 #include "../sound/ym2612.h"
7 extern unsigned char formatted_bram[4*0x10];
8 extern unsigned int s68k_poll_adclk;
10 void (*PicoMCDopenTray)(void) = NULL;
11 void (*PicoMCDcloseTray)(void) = NULL;
14 PICO_INTERNAL void PicoInitMCD(void)
20 PICO_INTERNAL void PicoExitMCD(void)
25 PICO_INTERNAL void PicoPowerMCD(void)
27 int fmt_size = sizeof(formatted_bram);
28 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
29 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
30 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
31 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
32 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
35 PICO_INTERNAL int PicoResetMCD(void)
37 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
38 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
39 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
41 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
42 Pico_mcd->m.state_flags |= 1; // s68k reset pending
43 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
48 #ifdef _ASM_CD_MEMORY_C
49 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
52 // use SRam.data for RAM cart
53 if (PicoOpt & POPT_EN_MCD_RAMCART) {
54 if (SRam.data == NULL)
55 SRam.data = calloc(1, 0x12000);
57 else if (SRam.data != NULL) {
61 SRam.start = SRam.end = 0; // unused
66 static __inline void SekRunM68k(int cyc)
73 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
74 #if defined(EMU_CORE_DEBUG)
75 SekCycleCnt+=CM_compareRun(cyc_do, 0);
76 #elif defined(EMU_C68K)
77 PicoCpuCM68k.cycles=cyc_do;
78 CycloneRun(&PicoCpuCM68k);
79 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
80 #elif defined(EMU_M68K)
81 m68k_set_context(&PicoCpuMM68k);
82 SekCycleCnt+=m68k_execute(cyc_do);
83 #elif defined(EMU_F68K)
84 g_m68kcontext=&PicoCpuFM68k;
85 SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
90 static __inline void SekRunS68k(int cyc)
94 if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
95 #if defined(EMU_CORE_DEBUG)
96 SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
97 #elif defined(EMU_C68K)
98 PicoCpuCS68k.cycles=cyc_do;
99 CycloneRun(&PicoCpuCS68k);
100 SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
101 #elif defined(EMU_M68K)
102 m68k_set_context(&PicoCpuMS68k);
103 SekCycleCntS68k+=m68k_execute(cyc_do);
104 #elif defined(EMU_F68K)
105 g_m68kcontext=&PicoCpuFS68k;
106 SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
110 #define PS_STEP_M68K ((488<<16)/20) // ~24
111 //#define PS_STEP_S68K 13
113 #if defined(_ASM_CD_PICO_C)
114 extern void SekRunPS(int cyc_m68k, int cyc_s68k);
115 #elif defined(EMU_F68K)
116 static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
118 SekCycleAim+=cyc_m68k;
119 SekCycleAimS68k+=cyc_s68k;
120 fm68k_emulate(0, 1, 0);
123 static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
125 int cycn, cycn_s68k, cyc_do;
126 SekCycleAim+=cyc_m68k;
127 SekCycleAimS68k+=cyc_s68k;
129 // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
130 // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
132 /* loop 488 downto 0 in steps of PS_STEP */
133 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
135 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
136 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
137 #if defined(EMU_C68K)
138 PicoCpuCM68k.cycles = cyc_do;
139 CycloneRun(&PicoCpuCM68k);
140 SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
141 #elif defined(EMU_M68K)
142 m68k_set_context(&PicoCpuMM68k);
143 SekCycleCnt += m68k_execute(cyc_do);
144 #elif defined(EMU_F68K)
145 g_m68kcontext = &PicoCpuFM68k;
146 SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
149 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
150 #if defined(EMU_C68K)
151 PicoCpuCS68k.cycles = cyc_do;
152 CycloneRun(&PicoCpuCS68k);
153 SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
154 #elif defined(EMU_M68K)
155 m68k_set_context(&PicoCpuMS68k);
156 SekCycleCntS68k += m68k_execute(cyc_do);
157 #elif defined(EMU_F68K)
158 g_m68kcontext = &PicoCpuFS68k;
159 SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
167 static __inline void check_cd_dma(void)
171 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
173 ddx = Pico_mcd->s68k_regs[4] & 7;
174 if (ddx < 2) return; // invalid
176 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
179 if (ddx == 6) return; // invalid
181 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
184 static __inline void update_chips(void)
186 int counter_timer, int3_set;
187 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
190 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
191 Pico_mcd->m.counter75hz -= counter75hz_lim;
196 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
197 Pico_mcd->m.timer_stopwatch += counter_timer;
198 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
199 Pico_mcd->m.timer_int3 -= counter_timer;
200 if (Pico_mcd->m.timer_int3 < 0) {
201 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
202 elprintf(EL_INTS, "s68k: timer irq 3");
204 Pico_mcd->m.timer_int3 += int3_set << 16;
206 // is this really what happens if irq3 is masked out?
207 Pico_mcd->m.timer_int3 &= 0xffffff;
212 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
218 #define CPUS_RUN(m68k_cycles,s68k_cycles) \
220 if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
221 SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
223 SekRunM68k(m68k_cycles); \
224 if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
225 SekRunS68k(s68k_cycles); \
228 #include "../pico_cmn.c"
231 PICO_INTERNAL void PicoFrameMCD(void)
233 if (!(PicoOpt&POPT_ALT_RENDERER))