1 // Pico Library - Internal Header File
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006-2008 Grazvydas "notaz" Ignotas, all rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 #ifndef PICO_INTERNAL_INCLUDED
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10 #define PICO_INTERNAL_INCLUDED
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16 #include "carthw/carthw.h"
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19 #define USE_POLL_DETECT
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21 #ifndef PICO_INTERNAL
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22 #define PICO_INTERNAL
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24 #ifndef PICO_INTERNAL_ASM
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25 #define PICO_INTERNAL_ASM
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28 // to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project
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35 // ----------------------- 68000 CPU -----------------------
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37 #include "../cpu/Cyclone/Cyclone.h"
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38 extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
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39 #define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run
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40 #define SekCyclesLeft \
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41 (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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42 #define SekCyclesLeftS68k \
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43 ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)
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44 #define SekEndTimeslice(after) PicoCpuCM68k.cycles=after
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45 #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
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46 #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
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47 #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
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48 #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
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49 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
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50 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
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51 #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
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53 #define SekInterrupt(i) PicoCpuCM68k.irq=i
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56 #define EMU_CORE_DEBUG
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61 #include "../cpu/fame/fame.h"
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62 extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
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63 #define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter
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64 #define SekCyclesLeft \
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65 (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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66 #define SekCyclesLeftS68k \
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67 ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)
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68 #define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after
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69 #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
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70 #define SekPc fm68k_get_pc(&PicoCpuFM68k)
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71 #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
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72 #define SekSetStop(x) { \
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73 PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
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74 if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
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76 #define SekSetStopS68k(x) { \
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77 PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \
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78 if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \
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80 #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
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81 #define SekShouldInterrupt fm68k_would_interrupt()
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83 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
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86 #define EMU_CORE_DEBUG
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91 #include "../cpu/musashi/m68kcpu.h"
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92 extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
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93 #ifndef SekCyclesLeft
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94 #define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles
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95 #define SekCyclesLeft \
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96 (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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97 #define SekCyclesLeftS68k \
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98 ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)
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99 #define SekEndTimeslice(after) SET_CYCLES(after)
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100 #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after
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101 #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
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102 #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
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103 #define SekSetStop(x) { \
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104 if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
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105 else PicoCpuMM68k.stopped=0; \
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107 #define SekSetStopS68k(x) { \
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108 if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \
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109 else PicoCpuMS68k.stopped=0; \
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111 #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
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112 #define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)
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114 #define SekInterrupt(irq) { \
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115 void *oldcontext = m68ki_cpu_p; \
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116 m68k_set_context(&PicoCpuMM68k); \
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117 m68k_set_irq(irq); \
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118 m68k_set_context(oldcontext); \
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124 extern int SekCycleCnt; // cycles done in this frame
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125 extern int SekCycleAim; // cycle aim
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126 extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
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128 #define SekCyclesReset() { \
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129 SekCycleCntT+=SekCycleAim; \
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130 SekCycleCnt-=SekCycleAim; \
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133 #define SekCyclesBurn(c) SekCycleCnt+=c
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134 #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere)
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135 #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
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137 #define SekEndRun(after) { \
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138 SekCycleCnt -= SekCyclesLeft - (after); \
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139 if (SekCycleCnt < 0) SekCycleCnt = 0; \
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140 SekEndTimeslice(after); \
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143 #define SekEndRunS68k(after) { \
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144 SekCycleCntS68k -= SekCyclesLeftS68k - (after); \
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145 if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \
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146 SekEndTimesliceS68k(after); \
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149 extern int SekCycleCntS68k;
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150 extern int SekCycleAimS68k;
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152 #define SekCyclesResetS68k() { \
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153 SekCycleCntS68k-=SekCycleAimS68k; \
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154 SekCycleAimS68k=0; \
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156 #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
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158 #ifdef EMU_CORE_DEBUG
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159 extern int dbg_irq_level;
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160 #undef SekEndTimeslice
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161 #undef SekCyclesBurn
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163 #undef SekInterrupt
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164 #define SekEndTimeslice(c)
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165 #define SekCyclesBurn(c) c
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166 #define SekEndRun(c)
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167 #define SekInterrupt(irq) dbg_irq_level=irq
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170 // ----------------------- Z80 CPU -----------------------
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172 #if defined(_USE_MZ80)
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173 #include "../cpu/mz80/mz80.h"
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175 #define z80_run(cycles) { mz80GetElapsedTicks(1); mz80_run(cycles) }
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176 #define z80_run_nr(cycles) mz80_run(cycles)
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177 #define z80_int() mz80int(0)
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179 #elif defined(_USE_DRZ80)
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180 #include "../cpu/DrZ80/drz80.h"
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182 extern struct DrZ80 drZ80;
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184 #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))
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185 #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)
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186 #define z80_int() drZ80.Z80_IRQ = 1
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188 #define z80_cyclesLeft drZ80.cycles
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189 #define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)
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191 #elif defined(_USE_CZ80)
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192 #include "../cpu/cz80/cz80.h"
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194 #define z80_run(cycles) Cz80_Exec(&CZ80, cycles)
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195 #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)
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196 #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)
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198 #define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)
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199 #define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)
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203 #define z80_run(cycles) (cycles)
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204 #define z80_run_nr(cycles)
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209 extern int z80stopCycle; /* in 68k cycles */
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210 extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */
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211 extern int z80_cycle_aim;
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212 extern int z80_scanline;
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213 extern int z80_scanline_cycles; /* cycles done until z80_scanline */
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215 #define z80_resetCycles() \
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216 z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0;
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218 #define z80_cyclesDone() \
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219 (z80_cycle_aim - z80_cyclesLeft)
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221 #define cycles_68k_to_z80(x) ((x)*957 >> 11)
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223 #define Z80_MEM_SHIFT 13
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224 extern unsigned long z80_read_map [0x10000 >> Z80_MEM_SHIFT];
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225 extern unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
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226 typedef unsigned char (z80_read_f)(unsigned short a);
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227 typedef void (z80_write_f)(unsigned int a, unsigned char data);
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229 // ---------------------------------------------------------
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231 // main oscillator clock which controls timing
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232 #define OSC_NTSC 53693100
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233 #define OSC_PAL 53203424
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237 unsigned char reg[0x20];
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238 unsigned int command; // 32-bit Command
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239 unsigned char pending; // 1 if waiting for second half of 32-bit command
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240 unsigned char type; // Command type (v/c/vsram read/write)
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241 unsigned short addr; // Read/Write address
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242 int status; // Status bits
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243 unsigned char pending_ints; // pending interrupts: ??VH????
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244 signed char lwrite_cnt; // VDP write count during active display line
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245 unsigned short v_counter; // V-counter
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246 unsigned char pad[0x10];
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251 unsigned char rotate;
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252 unsigned char z80Run;
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253 unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
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254 unsigned short scanline; // 04 0 to 261||311
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255 char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
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256 unsigned char hardware; // 07 Hardware value for country
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257 unsigned char pal; // 08 1=PAL 0=NTSC
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258 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)
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259 unsigned short z80_bank68k; // 0a
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260 unsigned short z80_lastaddr; // this is for Z80 faking
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261 unsigned char z80_fakeval;
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262 unsigned char z80_reset; // z80 reset held
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263 unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
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264 unsigned short eeprom_addr; // EEPROM address register
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265 unsigned char eeprom_cycle; // EEPROM SRAM cycle number
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266 unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
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267 unsigned char prot_bytes[2]; // simple protection faking
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268 unsigned short dma_xfers; // 18
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269 unsigned char pad[2];
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270 unsigned int frame_count; // 1c for movies and idle det
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273 // some assembly stuff depend on these, do not touch!
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276 unsigned char ram[0x10000]; // 0x00000 scratch ram
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277 union { // vram is byteswapped for easier reads when drawing
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278 unsigned short vram[0x8000]; // 0x10000
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279 unsigned char vramb[0x4000]; // VRAM in SMS mode
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281 unsigned char zram[0x2000]; // 0x20000 Z80 ram
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282 unsigned char ioports[0x10];
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283 unsigned char sms_io_ctl;
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284 unsigned char pad[0xef]; // unused
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285 unsigned short cram[0x40]; // 0x22100
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286 unsigned short vsram[0x40]; // 0x22180
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288 unsigned char *rom; // 0x22200
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289 unsigned int romsize; // 0x22204
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292 struct PicoVideo video;
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298 unsigned char *data; // actual data
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299 unsigned int start; // start address in 68k address space
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301 unsigned char unused1; // 0c: unused
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302 unsigned char unused2;
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303 unsigned char changed;
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304 unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words
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305 unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out
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306 unsigned char eeprom_bit_cl; // bit number for cl
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307 unsigned char eeprom_bit_in; // bit number for in
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308 unsigned char eeprom_bit_out; // bit number for out
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312 #include "cd/cd_sys.h"
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313 #include "cd/LC89510.h"
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314 #include "cd/gfx_cd.h"
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318 unsigned char control; // reg7
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319 unsigned char enabled; // reg8
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320 unsigned char cur_ch;
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321 unsigned char bank;
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324 struct pcm_chan // 08, size 0x10
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326 unsigned char regs[8];
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327 unsigned int addr; // .08: played sample address
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334 unsigned short hint_vector;
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335 unsigned char busreq;
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336 unsigned char s68k_pend_ints;
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337 unsigned int state_flags; // 04: emu state: reset_pending
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338 unsigned int counter75hz;
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340 int timer_int3; // 10
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341 unsigned int timer_stopwatch;
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342 unsigned char bcram_reg; // 18: battery-backed RAM cart register
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343 unsigned char pad2;
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344 unsigned short pad3;
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350 unsigned char bios[0x20000]; // 000000: 128K
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351 union { // 020000: 512K
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352 unsigned char prg_ram[0x80000];
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353 unsigned char prg_ram_b[4][0x20000];
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355 union { // 0a0000: 256K
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357 unsigned char word_ram2M[0x40000];
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358 unsigned char unused0[0x20000];
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361 unsigned char unused1[0x20000];
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362 unsigned char word_ram1M[2][0x20000];
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365 union { // 100000: 64K
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366 unsigned char pcm_ram[0x10000];
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367 unsigned char pcm_ram_b[0x10][0x1000];
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369 unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
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370 unsigned char bram[0x2000]; // 110200: 8K
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371 struct mcd_misc m; // 112200: misc
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372 struct mcd_pcm pcm; // 112240:
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373 _scd_toc TOC; // not to be saved
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380 #define Pico_mcd ((mcd_state *)Pico.rom)
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384 PICO_INTERNAL void PicoAreaPackCpu(unsigned char *cpu, int is_sub);
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385 PICO_INTERNAL void PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
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386 extern void (*PicoLoadStateHook)(void);
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389 PICO_INTERNAL int PicoCdSaveState(void *file);
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390 PICO_INTERNAL int PicoCdLoadState(void *file);
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396 } carthw_state_chunk;
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397 extern carthw_state_chunk *carthw_chunks;
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398 #define CHUNK_CARTHW 64
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401 typedef size_t (arearw)(void *p, size_t _size, size_t _n, void *file);
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402 typedef size_t (areaeof)(void *file);
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403 typedef int (areaseek)(void *file, long offset, int whence);
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404 typedef int (areaclose)(void *file);
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405 extern arearw *areaRead; // external read and write function pointers for
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406 extern arearw *areaWrite; // gzip save state ability
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407 extern areaeof *areaEof;
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408 extern areaseek *areaSeek;
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409 extern areaclose *areaClose;
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412 extern void (*PicoCartUnloadHook)(void);
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415 int CM_compareRun(int cyc, int is_sub);
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418 PICO_INTERNAL void PicoFrameStart(void);
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419 void PicoDrawSync(int to, int blank_last_line);
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420 void BackFill(int reg7, int sh);
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421 void FinalizeLineRGB555(int sh);
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422 extern int DrawScanline;
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423 #define MAX_LINE_SPRITES 29
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424 extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES];
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427 PICO_INTERNAL void PicoFrameFull();
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430 void PicoFrameStartMode4(void);
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431 void PicoLineMode4(int line);
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432 void PicoDoHighPal555M4(void);
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433 void PicoDrawSetColorFormatMode4(int which);
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436 PICO_INTERNAL void PicoInitPc(unsigned int pc);
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437 PICO_INTERNAL unsigned int PicoCheckPc(unsigned int pc);
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438 PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a);
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439 PICO_INTERNAL void PicoMemSetup(void);
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440 PICO_INTERNAL_ASM void PicoMemReset(void);
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441 PICO_INTERNAL void PicoMemResetHooks(void);
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442 PICO_INTERNAL int PadRead(int i);
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443 PICO_INTERNAL int ym2612_write_local(unsigned int a, unsigned int d, int is_from_z80);
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444 void z80_mem_setup(void);
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445 extern unsigned int (*PicoRead16Hook)(unsigned int a, int realsize);
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446 extern void (*PicoWrite8Hook) (unsigned int a,unsigned int d,int realsize);
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447 extern void (*PicoWrite16Hook)(unsigned int a,unsigned int d,int realsize);
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450 PICO_INTERNAL void PicoMemSetupCD(void);
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451 PICO_INTERNAL_ASM void PicoMemResetCD(int r3);
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452 PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);
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455 PICO_INTERNAL void PicoMemSetupPico(void);
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456 PICO_INTERNAL unsigned int ym2612_read_local_68k(void);
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459 extern struct Pico Pico;
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460 extern struct PicoSRAM SRam;
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461 extern int PicoPadInt[2];
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462 extern int emustatus;
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463 extern void (*PicoResetHook)(void);
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464 extern void (*PicoLineHook)(void);
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465 PICO_INTERNAL int CheckDMA(void);
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466 PICO_INTERNAL void PicoDetectRegion(void);
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467 PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done);
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470 PICO_INTERNAL void PicoInitMCD(void);
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471 PICO_INTERNAL void PicoExitMCD(void);
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472 PICO_INTERNAL void PicoPowerMCD(void);
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473 PICO_INTERNAL int PicoResetMCD(void);
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474 PICO_INTERNAL void PicoFrameMCD(void);
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477 PICO_INTERNAL void PicoInitPico(void);
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478 PICO_INTERNAL void PicoReratePico(void);
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481 PICO_INTERNAL void PicoPicoPCMUpdate(short *buffer, int length, int stereo);
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482 PICO_INTERNAL void PicoPicoPCMReset(void);
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483 PICO_INTERNAL void PicoPicoPCMRerate(int xpcm_rate);
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486 PICO_INTERNAL void SekInit(void);
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487 PICO_INTERNAL int SekReset(void);
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488 PICO_INTERNAL void SekState(int *data);
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489 PICO_INTERNAL void SekSetRealTAS(int use_real);
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490 void SekStepM68k(void);
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491 void SekInitIdleDet(void);
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492 void SekFinishIdleDet(void);
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495 PICO_INTERNAL void SekInitS68k(void);
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496 PICO_INTERNAL int SekResetS68k(void);
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497 PICO_INTERNAL int SekInterruptS68k(int irq);
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500 PICO_INTERNAL void cdda_start_play();
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501 extern short cdda_out_buffer[2*1152];
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502 extern int PsndLen_exc_cnt;
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503 extern int PsndLen_exc_add;
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504 extern int timer_a_next_oflow, timer_a_step; // in z80 cycles
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505 extern int timer_b_next_oflow, timer_b_step;
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507 void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new);
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508 void ym2612_pack_state(void);
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509 void ym2612_unpack_state(void);
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511 #define TIMER_NO_OFLOW 0x70000000
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512 // tA = 72 * (1024 - NA) / M
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513 #define TIMER_A_TICK_ZCYCLES 17203
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514 // tB = 1152 * (256 - NA) / M
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515 #define TIMER_B_TICK_ZCYCLES 262800 // 275251 broken, see Dai Makaimura
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517 #define timers_cycle() \
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518 if (timer_a_next_oflow > 0 && timer_a_next_oflow < TIMER_NO_OFLOW) \
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519 timer_a_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
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520 if (timer_b_next_oflow > 0 && timer_b_next_oflow < TIMER_NO_OFLOW) \
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521 timer_b_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
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522 ym2612_sync_timers(0, ym2612.OPN.ST.mode, ym2612.OPN.ST.mode);
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524 #define timers_reset() \
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525 timer_a_next_oflow = timer_b_next_oflow = TIMER_NO_OFLOW; \
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526 timer_a_step = TIMER_A_TICK_ZCYCLES * 1024; \
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527 timer_b_step = TIMER_B_TICK_ZCYCLES * 256;
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531 PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
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532 PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
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533 PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a);
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534 extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **srcp, unsigned short **limitp);
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537 PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);
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538 PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);
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539 PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);
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540 PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);
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541 PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);
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542 PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count
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543 PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);
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545 // z80 functionality wrappers
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546 PICO_INTERNAL void z80_init(void);
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547 PICO_INTERNAL void z80_pack(unsigned char *data);
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548 PICO_INTERNAL void z80_unpack(unsigned char *data);
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549 PICO_INTERNAL void z80_reset(void);
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550 PICO_INTERNAL void z80_exit(void);
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551 void z80_map_set(unsigned long *map, int start_addr,
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552 int end_addr, void *func_or_mh, int is_func);
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555 PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);
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556 PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);
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559 PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);
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562 PICO_INTERNAL void PsndReset(void);
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563 PICO_INTERNAL void PsndDoDAC(int line_to);
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564 PICO_INTERNAL void PsndClear(void);
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565 PICO_INTERNAL void PsndGetSamples(int y);
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566 PICO_INTERNAL void PsndGetSamplesMS(void);
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567 extern int PsndDacLine;
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570 void PicoPowerMS(void);
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571 void PicoResetMS(void);
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572 void PicoMemSetupMS(void);
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573 void PicoFrameMS(void);
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574 void PicoFrameDrawOnlyMS(void);
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576 // emulation event logging
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578 #define EL_LOGMASK 0
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581 #define EL_HVCNT 0x00000001 /* hv counter reads */
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582 #define EL_SR 0x00000002 /* SR reads */
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583 #define EL_INTS 0x00000004 /* ints and acks */
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584 #define EL_YMTIMER 0x00000008 /* ym2612 timer stuff */
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585 #define EL_INTSW 0x00000010 /* log irq switching on/off */
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586 #define EL_ASVDP 0x00000020 /* VDP accesses during active scan */
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587 #define EL_VDPDMA 0x00000040 /* VDP DMA transfers and their timing */
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588 #define EL_BUSREQ 0x00000080 /* z80 busreq r/w or reset w */
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589 #define EL_Z80BNK 0x00000100 /* z80 i/o through bank area */
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590 #define EL_SRAMIO 0x00000200 /* sram i/o */
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591 #define EL_EEPROM 0x00000400 /* eeprom debug */
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592 #define EL_UIO 0x00000800 /* unmapped i/o */
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593 #define EL_IO 0x00001000 /* all i/o */
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594 #define EL_CDPOLL 0x00002000 /* MCD: log poll detection */
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595 #define EL_SVP 0x00004000 /* SVP stuff */
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596 #define EL_PICOHW 0x00008000 /* Pico stuff */
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597 #define EL_IDLE 0x00010000 /* idle loop det. */
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599 #define EL_STATUS 0x40000000 /* status messages */
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600 #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
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603 extern void lprintf(const char *fmt, ...);
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604 #define elprintf(w,f,...) \
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606 if ((w) & EL_LOGMASK) \
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607 lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
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609 #elif defined(_MSC_VER)
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612 #define elprintf(w,f,...)
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618 #define cdprintf(x...)
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621 #if defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 3
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622 #define MEMH_FUNC __attribute__((aligned(4)))
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628 } // End of extern "C"
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631 #endif // PICO_INTERNAL_INCLUDED
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